Lines Matching refs:sca_out
53 #define sca_out(value, reg, card) writeb(value, card->scabase + (reg)) macro
156 sca_out(0, DSR_RX(port->chan), card); in sca_init_port()
157 sca_out(0, DSR_TX(port->chan), card); in sca_init_port()
160 sca_out(DCR_ABORT, DCR_RX(port->chan), card); in sca_init_port()
161 sca_out(DCR_ABORT, DCR_TX(port->chan), card); in sca_init_port()
171 sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card); in sca_init_port()
172 sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card); in sca_init_port()
176 sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */ in sca_init_port()
177 sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */ in sca_init_port()
178 sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */ in sca_init_port()
181 sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */ in sca_init_port()
182 sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */ in sca_init_port()
197 sca_out(ST1_CDCD, msci + ST1, card); in sca_msci_intr()
243 sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE, in sca_rx_done()
284 sca_out(DSR_DE, DSR_RX(port->chan), card); in sca_rx_done()
302 sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE, in sca_tx_done()
408 sca_out(port->tmc, msci + TMCR, card); in sca_set_port()
409 sca_out(port->tmc, msci + TMCT, card); in sca_set_port()
412 sca_out(port->rxs, msci + RXS, card); in sca_set_port()
413 sca_out(port->txs, msci + TXS, card); in sca_set_port()
420 sca_out(md2, msci + MD2, card); in sca_set_port()
451 sca_out(CMD_RESET, msci + CMD, card); in sca_open()
452 sca_out(md0, msci + MD0, card); in sca_open()
453 sca_out(0x00, msci + MD1, card); /* no address field check */ in sca_open()
454 sca_out(md2, msci + MD2, card); in sca_open()
455 sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */ in sca_open()
457 sca_out(CTL_IDLE | CTL_URCT | CTL_URSKP, msci + CTL, card); in sca_open()
458 sca_out(0x0F, msci + RNR, card); /* +1=RX DMA activation condition */ in sca_open()
459 sca_out(0x3C, msci + TFS, card); /* +1 = TX start */ in sca_open()
460 sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */ in sca_open()
461 sca_out(0x38, msci + TNR0, card); /* =TX DMA activation condition */ in sca_open()
462 sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/ in sca_open()
470 sca_out(port->tmc, msci + TMCR, card); in sca_open()
471 sca_out(port->tmc, msci + TMCT, card); in sca_open()
472 sca_out(port->rxs, msci + RXS, card); in sca_open()
473 sca_out(port->txs, msci + TXS, card); in sca_open()
474 sca_out(CMD_TX_ENABLE, msci + CMD, card); in sca_open()
475 sca_out(CMD_RX_ENABLE, msci + CMD, card); in sca_open()
489 sca_out(CMD_RESET, get_msci(port) + CMD, port->card); in sca_close()
595 sca_out(DSR_DE, DSR_TX(port->chan), card); /* Enable TX DMA */ in sca_xmit()
629 sca_out(wait_states, WCRL, card); /* Wait Control */ in sca_init()
630 sca_out(wait_states, WCRM, card); in sca_init()
631 sca_out(wait_states, WCRH, card); in sca_init()
633 sca_out(0, DMER, card); /* DMA Master disable */ in sca_init()
634 sca_out(0x03, PCR, card); /* DMA priority */ in sca_init()
635 sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */ in sca_init()
636 sca_out(0, DSR_TX(0), card); in sca_init()
637 sca_out(0, DSR_RX(1), card); in sca_init()
638 sca_out(0, DSR_TX(1), card); in sca_init()
639 sca_out(DMER_DME, DMER, card); /* DMA Master enable */ in sca_init()