Lines Matching refs:base_addr
179 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_read() local
182 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, in dino_cfg_read()
187 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_read()
191 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3)); in dino_cfg_read()
193 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2)); in dino_cfg_read()
195 *val = readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_read()
214 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_write() local
217 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, in dino_cfg_write()
222 __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
223 __raw_readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
226 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
229 writeb(val, base_addr + DINO_CONFIG_DATA + (where & 3)); in dino_cfg_write()
231 writew(val, base_addr + DINO_CONFIG_DATA + (where & 2)); in dino_cfg_write()
233 writel(val, base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
262 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
264 v = read##type(d->base_addr+DINO_IO_DATA+(addr&mask)); \
279 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
281 write##type(val, d->base_addr+DINO_IO_DATA+(addr&mask)); \
307 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); in dino_mask_irq()
324 __raw_readl(dino_dev->hba.base_addr+DINO_IPR); in dino_unmask_irq()
328 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); in dino_unmask_irq()
339 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR); in dino_unmask_irq()
370 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK; in dino_isr()
392 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr; in dino_isr()
397 dino_dev->hba.base_addr, mask); in dino_isr()
458 dino_card_setup(struct pci_bus *bus, void __iomem *base_addr) in dino_card_setup() argument
500 i, res->start, base_addr + DINO_IO_ADDR_EN); in dino_card_setup()
501 __raw_writel(1 << i, base_addr + DINO_IO_ADDR_EN); in dino_card_setup()
559 dino_card_setup(bus, dino_dev->hba.base_addr); in dino_fixup_bus()
658 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS); in dino_card_init()
661 dino_dev->hba.base_addr+DINO_IO_COMMAND); in dino_card_init()
665 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK); in dino_card_init()
666 __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN); in dino_card_init()
667 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR); in dino_card_init()
677 __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT); in dino_card_init()
684 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN); in dino_card_init()
686 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE); in dino_card_init()
687 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR); in dino_card_init()
688 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR); in dino_card_init()
690 __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM); in dino_card_init()
691 __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL); in dino_card_init()
692 __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM); in dino_card_init()
695 __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR); in dino_card_init()
696 __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR); in dino_card_init()
697 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR); in dino_card_init()
704 __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD); in dino_card_init()
725 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN); in dino_bridge_init()
832 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0); in dino_common_init()
838 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0); in dino_common_init()
854 dino_dev->hba.base_addr); in dino_common_init()
953 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096); in dino_probe()