Lines Matching refs:offset
228 static int u300_gpio_request(struct gpio_chip *chip, unsigned offset) in u300_gpio_request() argument
234 int gpio = chip->base + offset; in u300_gpio_request()
239 static void u300_gpio_free(struct gpio_chip *chip, unsigned offset) in u300_gpio_free() argument
241 int gpio = chip->base + offset; in u300_gpio_free()
246 static int u300_gpio_get(struct gpio_chip *chip, unsigned offset) in u300_gpio_get() argument
250 return readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset); in u300_gpio_get()
253 static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value) in u300_gpio_set() argument
261 val = readl(U300_PIN_REG(offset, dor)); in u300_gpio_set()
263 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); in u300_gpio_set()
265 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); in u300_gpio_set()
270 static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset) in u300_gpio_direction_input() argument
277 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
279 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); in u300_gpio_direction_input()
280 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
285 static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in u300_gpio_direction_output() argument
294 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
300 ((offset & 0x07) << 1)); in u300_gpio_direction_output()
304 ((offset & 0x07) << 1)); in u300_gpio_direction_output()
306 << ((offset & 0x07) << 1)); in u300_gpio_direction_output()
307 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
309 u300_gpio_set(chip, offset, value); in u300_gpio_direction_output()
314 static int u300_gpio_to_irq(struct gpio_chip *chip, unsigned offset) in u300_gpio_to_irq() argument
317 int portno = offset >> 3; in u300_gpio_to_irq()
332 offset); in u300_gpio_to_irq()
340 retirq = irq_find_mapping(port->domain, (offset & 0x7)); in u300_gpio_to_irq()
343 offset, retirq, port->number); in u300_gpio_to_irq()
349 unsigned offset, in u300_gpio_config_get() argument
358 biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset)); in u300_gpio_config_get()
361 drmode = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_get()
362 drmode &= (U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); in u300_gpio_config_get()
363 drmode >>= ((offset & 0x07) << 1); in u300_gpio_config_get()
407 int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset, in u300_gpio_config_set() argument
418 val = readl(U300_PIN_REG(offset, per)); in u300_gpio_config_set()
419 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); in u300_gpio_config_set()
422 val = readl(U300_PIN_REG(offset, per)); in u300_gpio_config_set()
423 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); in u300_gpio_config_set()
426 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
428 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
430 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
431 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
434 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
436 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
438 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
439 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
442 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
444 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
446 << ((offset & 0x07) << 1)); in u300_gpio_config_set()
447 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
470 static void u300_toggle_trigger(struct u300_gpio *gpio, unsigned offset) in u300_toggle_trigger() argument
474 val = readl(U300_PIN_REG(offset, icr)); in u300_toggle_trigger()
476 if (u300_gpio_get(&gpio->chip, offset)) { in u300_toggle_trigger()
478 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_toggle_trigger()
480 offset); in u300_toggle_trigger()
483 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_toggle_trigger()
485 offset); in u300_toggle_trigger()
493 int offset = (port->number << 3) + d->hwirq; in u300_gpio_irq_type() local
505 offset); in u300_gpio_irq_type()
506 port->toggle_edge_mode |= U300_PIN_BIT(offset); in u300_gpio_irq_type()
507 u300_toggle_trigger(gpio, offset); in u300_gpio_irq_type()
510 offset); in u300_gpio_irq_type()
511 val = readl(U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
512 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
513 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); in u300_gpio_irq_type()
516 offset); in u300_gpio_irq_type()
517 val = readl(U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
518 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); in u300_gpio_irq_type()
519 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); in u300_gpio_irq_type()
529 int offset = (port->number << 3) + d->hwirq; in u300_gpio_irq_enable() local
534 d->hwirq, port->name, offset); in u300_gpio_irq_enable()
536 val = readl(U300_PIN_REG(offset, ien)); in u300_gpio_irq_enable()
537 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); in u300_gpio_irq_enable()
545 int offset = (port->number << 3) + d->hwirq; in u300_gpio_irq_disable() local
550 val = readl(U300_PIN_REG(offset, ien)); in u300_gpio_irq_disable()
551 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); in u300_gpio_irq_disable()
584 int offset = pinoffset + irqoffset; in u300_gpio_irq_handler() local
587 pin_irq, offset); in u300_gpio_irq_handler()
593 if (port->toggle_edge_mode & U300_PIN_BIT(offset)) in u300_gpio_irq_handler()
594 u300_toggle_trigger(gpio, offset); in u300_gpio_irq_handler()
602 int offset, in u300_gpio_init_pin() argument
607 u300_gpio_direction_output(&gpio->chip, offset, conf->outval); in u300_gpio_init_pin()
610 u300_gpio_config_set(&gpio->chip, offset, in u300_gpio_init_pin()
614 u300_gpio_config_set(&gpio->chip, offset, in u300_gpio_init_pin()
618 offset, conf->outval); in u300_gpio_init_pin()
620 u300_gpio_direction_input(&gpio->chip, offset); in u300_gpio_init_pin()
623 u300_gpio_set(&gpio->chip, offset, 0); in u300_gpio_init_pin()
626 u300_gpio_config_set(&gpio->chip, offset, conf->bias_mode); in u300_gpio_init_pin()
629 offset, conf->bias_mode); in u300_gpio_init_pin()
642 int offset = (i*8) + j; in u300_gpio_init_coh901571() local
645 u300_gpio_init_pin(gpio, offset, conf); in u300_gpio_init_coh901571()
670 unsigned int offset; member
674 #define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
823 p->offset, p->pin_base, 1); in u300_gpio_probe()