37 	struct sh_pfc *pfc;  member
47 	return pmx->pfc->info->nr_groups;  in sh_pfc_get_groups_count()
55 	return pmx->pfc->info->groups[selector].name;  in sh_pfc_get_group_name()
63 	*pins = pmx->pfc->info->groups[selector].pins;  in sh_pfc_get_group_pins()
64 	*num_pins = pmx->pfc->info->groups[selector].nr_pins;  in sh_pfc_get_group_pins()
86 	return pmx->pfc->info->nr_functions;  in sh_pfc_get_functions_count()
94 	return pmx->pfc->info->functions[selector].name;  in sh_pfc_get_function_name()
104 	*groups = pmx->pfc->info->functions[selector].groups;  in sh_pfc_get_function_groups()
105 	*num_groups = pmx->pfc->info->functions[selector].nr_groups;  in sh_pfc_get_function_groups()
114 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_func_enable()  local
115 	const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];  in sh_pfc_func_enable()
120 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_func_enable()
123 		int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);  in sh_pfc_func_enable()
133 		ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);  in sh_pfc_func_enable()
139 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_func_enable()
147 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_func_disable()  local
148 	const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];  in sh_pfc_func_disable()
152 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_func_disable()
155 		int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);  in sh_pfc_func_disable()
161 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_func_disable()
169 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_request_enable()  local
170 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_request_enable()
175 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_request_enable()
178 		dev_err(pfc->dev,  in sh_pfc_gpio_request_enable()
185 	if (!pfc->gpio) {  in sh_pfc_gpio_request_enable()
189 		const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_gpio_request_enable()
191 		ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);  in sh_pfc_gpio_request_enable()
201 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_request_enable()
211 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_disable_free()  local
212 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_disable_free()
216 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_disable_free()
218 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_disable_free()
226 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_set_direction()  local
228 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_set_direction()
229 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_gpio_set_direction()
244 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_set_direction()
246 	ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);  in sh_pfc_gpio_set_direction()
253 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_set_direction()
269 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,  in sh_pfc_pinconf_validate()  argument
272 	int idx = sh_pfc_get_pin_index(pfc, _pin);  in sh_pfc_pinconf_validate()
273 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_pinconf_validate()
294 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_get()  local
299 	if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_get()
306 		if (!pfc->info->ops || !pfc->info->ops->get_bias)  in sh_pfc_pinconf_get()
309 		spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_get()
310 		bias = pfc->info->ops->get_bias(pfc, _pin);  in sh_pfc_pinconf_get()
311 		spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_get()
330 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_set()  local
334 	if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_set()
341 		if (!pfc->info->ops || !pfc->info->ops->set_bias)  in sh_pfc_pinconf_set()
344 		spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_set()
345 		pfc->info->ops->set_bias(pfc, _pin, param);  in sh_pfc_pinconf_set()
346 		spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_set()
365 	pins = pmx->pfc->info->groups[group].pins;  in sh_pfc_pinconf_group_set()
366 	num_pins = pmx->pfc->info->groups[group].nr_pins;  in sh_pfc_pinconf_group_set()
383 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)  in sh_pfc_map_pins()  argument
391 	if (pfc->info->ranges == NULL) {  in sh_pfc_map_pins()
393 		def_range.end = pfc->info->nr_pins - 1;  in sh_pfc_map_pins()
397 		ranges = pfc->info->ranges;  in sh_pfc_map_pins()
398 		nr_ranges = pfc->info->nr_ranges;  in sh_pfc_map_pins()
401 	pmx->pins = devm_kzalloc(pfc->dev,  in sh_pfc_map_pins()
402 				 sizeof(*pmx->pins) * pfc->info->nr_pins,  in sh_pfc_map_pins()
407 	pmx->configs = devm_kzalloc(pfc->dev,  in sh_pfc_map_pins()
408 				    sizeof(*pmx->configs) * pfc->info->nr_pins,  in sh_pfc_map_pins()
422 				&pfc->info->pins[nr_pins];  in sh_pfc_map_pins()
430 	pfc->nr_pins = ranges[nr_ranges-1].end + 1;  in sh_pfc_map_pins()
435 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)  in sh_pfc_register_pinctrl()  argument
440 	pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);  in sh_pfc_register_pinctrl()
444 	pmx->pfc = pfc;  in sh_pfc_register_pinctrl()
445 	pfc->pinctrl = pmx;  in sh_pfc_register_pinctrl()
447 	nr_ranges = sh_pfc_map_pins(pfc, pmx);  in sh_pfc_register_pinctrl()
457 	pmx->pctl_desc.npins = pfc->info->nr_pins;  in sh_pfc_register_pinctrl()
459 	pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);  in sh_pfc_register_pinctrl()
466 int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)  in sh_pfc_unregister_pinctrl()  argument
468 	struct sh_pfc_pinctrl *pmx = pfc->pinctrl;  in sh_pfc_unregister_pinctrl()
472 	pfc->pinctrl = NULL;  in sh_pfc_unregister_pinctrl()