Lines Matching refs:rb
186 void __iomem *rb; in bfa_ioc_ct_reg_init() local
189 rb = bfa_ioc_bar0(ioc); in bfa_ioc_ct_reg_init()
191 ioc->ioc_regs.hfn_mbox = rb + ct_fnreg[pcifn].hfn_mbox; in bfa_ioc_ct_reg_init()
192 ioc->ioc_regs.lpu_mbox = rb + ct_fnreg[pcifn].lpu_mbox; in bfa_ioc_ct_reg_init()
193 ioc->ioc_regs.host_page_num_fn = rb + ct_fnreg[pcifn].hfn_pgn; in bfa_ioc_ct_reg_init()
196 ioc->ioc_regs.heartbeat = rb + BFA_IOC0_HBEAT_REG; in bfa_ioc_ct_reg_init()
197 ioc->ioc_regs.ioc_fwstate = rb + BFA_IOC0_STATE_REG; in bfa_ioc_ct_reg_init()
198 ioc->ioc_regs.alt_ioc_fwstate = rb + BFA_IOC1_STATE_REG; in bfa_ioc_ct_reg_init()
199 ioc->ioc_regs.hfn_mbox_cmd = rb + ct_p0reg[pcifn].hfn; in bfa_ioc_ct_reg_init()
200 ioc->ioc_regs.lpu_mbox_cmd = rb + ct_p0reg[pcifn].lpu; in bfa_ioc_ct_reg_init()
201 ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P0; in bfa_ioc_ct_reg_init()
202 ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P1; in bfa_ioc_ct_reg_init()
204 ioc->ioc_regs.heartbeat = (rb + BFA_IOC1_HBEAT_REG); in bfa_ioc_ct_reg_init()
205 ioc->ioc_regs.ioc_fwstate = (rb + BFA_IOC1_STATE_REG); in bfa_ioc_ct_reg_init()
206 ioc->ioc_regs.alt_ioc_fwstate = rb + BFA_IOC0_STATE_REG; in bfa_ioc_ct_reg_init()
207 ioc->ioc_regs.hfn_mbox_cmd = rb + ct_p1reg[pcifn].hfn; in bfa_ioc_ct_reg_init()
208 ioc->ioc_regs.lpu_mbox_cmd = rb + ct_p1reg[pcifn].lpu; in bfa_ioc_ct_reg_init()
209 ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P1; in bfa_ioc_ct_reg_init()
210 ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P0; in bfa_ioc_ct_reg_init()
216 ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG); in bfa_ioc_ct_reg_init()
217 ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG); in bfa_ioc_ct_reg_init()
218 ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_LCLK_CTL_REG); in bfa_ioc_ct_reg_init()
219 ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_SCLK_CTL_REG); in bfa_ioc_ct_reg_init()
224 ioc->ioc_regs.ioc_sem_reg = (rb + HOST_SEM0_REG); in bfa_ioc_ct_reg_init()
225 ioc->ioc_regs.ioc_usage_sem_reg = (rb + HOST_SEM1_REG); in bfa_ioc_ct_reg_init()
226 ioc->ioc_regs.ioc_init_sem_reg = (rb + HOST_SEM2_REG); in bfa_ioc_ct_reg_init()
227 ioc->ioc_regs.ioc_usage_reg = (rb + BFA_FW_USE_COUNT); in bfa_ioc_ct_reg_init()
228 ioc->ioc_regs.ioc_fail_sync = (rb + BFA_IOC_FAIL_SYNC); in bfa_ioc_ct_reg_init()
233 ioc->ioc_regs.smem_page_start = (rb + PSS_SMEM_PAGE_START); in bfa_ioc_ct_reg_init()
239 ioc->ioc_regs.err_set = (rb + ERR_SET_REG); in bfa_ioc_ct_reg_init()
245 void __iomem *rb; in bfa_ioc_ct2_reg_init() local
248 rb = bfa_ioc_bar0(ioc); in bfa_ioc_ct2_reg_init()
250 ioc->ioc_regs.hfn_mbox = rb + ct2_reg[port].hfn_mbox; in bfa_ioc_ct2_reg_init()
251 ioc->ioc_regs.lpu_mbox = rb + ct2_reg[port].lpu_mbox; in bfa_ioc_ct2_reg_init()
252 ioc->ioc_regs.host_page_num_fn = rb + ct2_reg[port].hfn_pgn; in bfa_ioc_ct2_reg_init()
253 ioc->ioc_regs.hfn_mbox_cmd = rb + ct2_reg[port].hfn; in bfa_ioc_ct2_reg_init()
254 ioc->ioc_regs.lpu_mbox_cmd = rb + ct2_reg[port].lpu; in bfa_ioc_ct2_reg_init()
255 ioc->ioc_regs.lpu_read_stat = rb + ct2_reg[port].lpu_read; in bfa_ioc_ct2_reg_init()
258 ioc->ioc_regs.heartbeat = rb + CT2_BFA_IOC0_HBEAT_REG; in bfa_ioc_ct2_reg_init()
259 ioc->ioc_regs.ioc_fwstate = rb + CT2_BFA_IOC0_STATE_REG; in bfa_ioc_ct2_reg_init()
260 ioc->ioc_regs.alt_ioc_fwstate = rb + CT2_BFA_IOC1_STATE_REG; in bfa_ioc_ct2_reg_init()
261 ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P0; in bfa_ioc_ct2_reg_init()
262 ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P1; in bfa_ioc_ct2_reg_init()
264 ioc->ioc_regs.heartbeat = (rb + CT2_BFA_IOC1_HBEAT_REG); in bfa_ioc_ct2_reg_init()
265 ioc->ioc_regs.ioc_fwstate = (rb + CT2_BFA_IOC1_STATE_REG); in bfa_ioc_ct2_reg_init()
266 ioc->ioc_regs.alt_ioc_fwstate = rb + CT2_BFA_IOC0_STATE_REG; in bfa_ioc_ct2_reg_init()
267 ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P1; in bfa_ioc_ct2_reg_init()
268 ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P0; in bfa_ioc_ct2_reg_init()
274 ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG); in bfa_ioc_ct2_reg_init()
275 ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG); in bfa_ioc_ct2_reg_init()
276 ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + CT2_APP_PLL_LCLK_CTL_REG); in bfa_ioc_ct2_reg_init()
277 ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + CT2_APP_PLL_SCLK_CTL_REG); in bfa_ioc_ct2_reg_init()
282 ioc->ioc_regs.ioc_sem_reg = (rb + CT2_HOST_SEM0_REG); in bfa_ioc_ct2_reg_init()
283 ioc->ioc_regs.ioc_usage_sem_reg = (rb + CT2_HOST_SEM1_REG); in bfa_ioc_ct2_reg_init()
284 ioc->ioc_regs.ioc_init_sem_reg = (rb + CT2_HOST_SEM2_REG); in bfa_ioc_ct2_reg_init()
285 ioc->ioc_regs.ioc_usage_reg = (rb + CT2_BFA_FW_USE_COUNT); in bfa_ioc_ct2_reg_init()
286 ioc->ioc_regs.ioc_fail_sync = (rb + CT2_BFA_IOC_FAIL_SYNC); in bfa_ioc_ct2_reg_init()
291 ioc->ioc_regs.smem_page_start = (rb + PSS_SMEM_PAGE_START); in bfa_ioc_ct2_reg_init()
297 ioc->ioc_regs.err_set = (rb + ERR_SET_REG); in bfa_ioc_ct2_reg_init()
308 void __iomem *rb = ioc->pcidev.pci_bar_kva; in bfa_ioc_ct_map_port() local
314 r32 = readl(rb + FNC_PERS_REG); in bfa_ioc_ct_map_port()
325 void __iomem *rb = ioc->pcidev.pci_bar_kva; in bfa_ioc_ct2_map_port() local
328 r32 = readl(rb + CT2_HOSTFN_PERSONALITY0); in bfa_ioc_ct2_map_port()
341 void __iomem *rb = ioc->pcidev.pci_bar_kva; in bfa_ioc_ct_isr_mode_set() local
344 r32 = readl(rb + FNC_PERS_REG); in bfa_ioc_ct_isr_mode_set()
365 writel(r32, rb + FNC_PERS_REG); in bfa_ioc_ct_isr_mode_set()
561 void __iomem *rb = ioc->pcidev.pci_bar_kva; in bfa_ioc_ct2_poweron() local
564 r32 = readl(rb + HOSTFN_MSIX_VT_OFST_NUMVT); in bfa_ioc_ct2_poweron()
567 rb + HOSTFN_MSIX_VT_INDEX_MBOX_ERR); in bfa_ioc_ct2_poweron()
573 rb + HOSTFN_MSIX_VT_OFST_NUMVT); in bfa_ioc_ct2_poweron()
575 rb + HOSTFN_MSIX_VT_INDEX_MBOX_ERR); in bfa_ioc_ct2_poweron()
579 bfa_ioc_ct_pll_init(void __iomem *rb, enum bfi_asic_mode mode) in bfa_ioc_ct_pll_init() argument
594 writel(0, (rb + OP_MODE)); in bfa_ioc_ct_pll_init()
596 __APP_EMS_CHANNEL_SEL, (rb + ETH_MAC_SER_REG)); in bfa_ioc_ct_pll_init()
598 writel(__GLOBAL_FCOE_MODE, (rb + OP_MODE)); in bfa_ioc_ct_pll_init()
599 writel(__APP_EMS_REFCKBUFEN1, (rb + ETH_MAC_SER_REG)); in bfa_ioc_ct_pll_init()
601 writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG)); in bfa_ioc_ct_pll_init()
602 writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG)); in bfa_ioc_ct_pll_init()
603 writel(0xffffffffU, (rb + HOSTFN0_INT_MSK)); in bfa_ioc_ct_pll_init()
604 writel(0xffffffffU, (rb + HOSTFN1_INT_MSK)); in bfa_ioc_ct_pll_init()
605 writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS)); in bfa_ioc_ct_pll_init()
606 writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS)); in bfa_ioc_ct_pll_init()
607 writel(0xffffffffU, (rb + HOSTFN0_INT_MSK)); in bfa_ioc_ct_pll_init()
608 writel(0xffffffffU, (rb + HOSTFN1_INT_MSK)); in bfa_ioc_ct_pll_init()
610 rb + APP_PLL_SCLK_CTL_REG); in bfa_ioc_ct_pll_init()
612 rb + APP_PLL_LCLK_CTL_REG); in bfa_ioc_ct_pll_init()
614 __APP_PLL_SCLK_ENABLE, rb + APP_PLL_SCLK_CTL_REG); in bfa_ioc_ct_pll_init()
616 __APP_PLL_LCLK_ENABLE, rb + APP_PLL_LCLK_CTL_REG); in bfa_ioc_ct_pll_init()
617 readl(rb + HOSTFN0_INT_MSK); in bfa_ioc_ct_pll_init()
619 writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS)); in bfa_ioc_ct_pll_init()
620 writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS)); in bfa_ioc_ct_pll_init()
621 writel(pll_sclk | __APP_PLL_SCLK_ENABLE, rb + APP_PLL_SCLK_CTL_REG); in bfa_ioc_ct_pll_init()
622 writel(pll_fclk | __APP_PLL_LCLK_ENABLE, rb + APP_PLL_LCLK_CTL_REG); in bfa_ioc_ct_pll_init()
625 writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P0)); in bfa_ioc_ct_pll_init()
626 writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P1)); in bfa_ioc_ct_pll_init()
628 r32 = readl((rb + PSS_CTL_REG)); in bfa_ioc_ct_pll_init()
630 writel(r32, (rb + PSS_CTL_REG)); in bfa_ioc_ct_pll_init()
633 writel(0, (rb + PMM_1T_RESET_REG_P0)); in bfa_ioc_ct_pll_init()
634 writel(0, (rb + PMM_1T_RESET_REG_P1)); in bfa_ioc_ct_pll_init()
637 writel(__EDRAM_BISTR_START, (rb + MBIST_CTL_REG)); in bfa_ioc_ct_pll_init()
639 r32 = readl((rb + MBIST_STAT_REG)); in bfa_ioc_ct_pll_init()
640 writel(0, (rb + MBIST_CTL_REG)); in bfa_ioc_ct_pll_init()
645 bfa_ioc_ct2_sclk_init(void __iomem *rb) in bfa_ioc_ct2_sclk_init() argument
652 r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_sclk_init()
656 writel(r32, (rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_sclk_init()
662 r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_sclk_init()
664 writel(r32, (rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_sclk_init()
669 r32 = readl((rb + CT2_CHIP_MISC_PRG)); in bfa_ioc_ct2_sclk_init()
670 writel(r32 | __ETH_CLK_ENABLE_PORT0, (rb + CT2_CHIP_MISC_PRG)); in bfa_ioc_ct2_sclk_init()
672 r32 = readl((rb + CT2_PCIE_MISC_REG)); in bfa_ioc_ct2_sclk_init()
673 writel(r32 | __ETH_CLK_ENABLE_PORT1, (rb + CT2_PCIE_MISC_REG)); in bfa_ioc_ct2_sclk_init()
678 r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_sclk_init()
681 writel(r32 | 0x1061731b, (rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_sclk_init()
690 bfa_ioc_ct2_lclk_init(void __iomem *rb) in bfa_ioc_ct2_lclk_init() argument
697 r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_lclk_init()
701 writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_lclk_init()
706 r32 = readl((rb + CT2_CHIP_MISC_PRG)); in bfa_ioc_ct2_lclk_init()
707 writel(r32, (rb + CT2_CHIP_MISC_PRG)); in bfa_ioc_ct2_lclk_init()
712 r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_lclk_init()
713 writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_lclk_init()
718 r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_lclk_init()
721 writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_lclk_init()
730 bfa_ioc_ct2_mem_init(void __iomem *rb) in bfa_ioc_ct2_mem_init() argument
734 r32 = readl((rb + PSS_CTL_REG)); in bfa_ioc_ct2_mem_init()
736 writel(r32, (rb + PSS_CTL_REG)); in bfa_ioc_ct2_mem_init()
739 writel(__EDRAM_BISTR_START, (rb + CT2_MBIST_CTL_REG)); in bfa_ioc_ct2_mem_init()
741 writel(0, (rb + CT2_MBIST_CTL_REG)); in bfa_ioc_ct2_mem_init()
745 bfa_ioc_ct2_mac_reset(void __iomem *rb) in bfa_ioc_ct2_mac_reset() argument
749 rb + CT2_CSI_MAC_CONTROL_REG(0)); in bfa_ioc_ct2_mac_reset()
751 rb + CT2_CSI_MAC_CONTROL_REG(1)); in bfa_ioc_ct2_mac_reset()
755 bfa_ioc_ct2_enable_flash(void __iomem *rb) in bfa_ioc_ct2_enable_flash() argument
759 r32 = readl((rb + PSS_GPIO_OUT_REG)); in bfa_ioc_ct2_enable_flash()
760 writel(r32 & ~1, (rb + PSS_GPIO_OUT_REG)); in bfa_ioc_ct2_enable_flash()
761 r32 = readl((rb + PSS_GPIO_OE_REG)); in bfa_ioc_ct2_enable_flash()
762 writel(r32 | 1, (rb + PSS_GPIO_OE_REG)); in bfa_ioc_ct2_enable_flash()
772 bfa_ioc_ct2_nfc_halted(void __iomem *rb) in bfa_ioc_ct2_nfc_halted() argument
776 r32 = readl(rb + CT2_NFC_CSR_SET_REG); in bfa_ioc_ct2_nfc_halted()
784 bfa_ioc_ct2_nfc_halt(void __iomem *rb) in bfa_ioc_ct2_nfc_halt() argument
788 writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_SET_REG); in bfa_ioc_ct2_nfc_halt()
790 if (bfa_ioc_ct2_nfc_halted(rb)) in bfa_ioc_ct2_nfc_halt()
794 WARN_ON(!bfa_ioc_ct2_nfc_halted(rb)); in bfa_ioc_ct2_nfc_halt()
798 bfa_ioc_ct2_nfc_resume(void __iomem *rb) in bfa_ioc_ct2_nfc_resume() argument
803 writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_CLR_REG); in bfa_ioc_ct2_nfc_resume()
805 r32 = readl(rb + CT2_NFC_CSR_SET_REG); in bfa_ioc_ct2_nfc_resume()
814 bfa_ioc_ct2_clk_reset(void __iomem *rb) in bfa_ioc_ct2_clk_reset() argument
818 bfa_ioc_ct2_sclk_init(rb); in bfa_ioc_ct2_clk_reset()
819 bfa_ioc_ct2_lclk_init(rb); in bfa_ioc_ct2_clk_reset()
824 r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_clk_reset()
826 (rb + CT2_APP_PLL_SCLK_CTL_REG)); in bfa_ioc_ct2_clk_reset()
828 r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_clk_reset()
830 (rb + CT2_APP_PLL_LCLK_CTL_REG)); in bfa_ioc_ct2_clk_reset()
835 bfa_ioc_ct2_nfc_clk_reset(void __iomem *rb) in bfa_ioc_ct2_nfc_clk_reset() argument
839 r32 = readl((rb + PSS_CTL_REG)); in bfa_ioc_ct2_nfc_clk_reset()
841 writel(r32, (rb + PSS_CTL_REG)); in bfa_ioc_ct2_nfc_clk_reset()
843 writel(__RESET_AND_START_SCLK_LCLK_PLLS, rb + CT2_CSI_FW_CTL_SET_REG); in bfa_ioc_ct2_nfc_clk_reset()
846 r32 = readl(rb + CT2_NFC_FLASH_STS_REG); in bfa_ioc_ct2_nfc_clk_reset()
854 r32 = readl(rb + CT2_NFC_FLASH_STS_REG); in bfa_ioc_ct2_nfc_clk_reset()
861 r32 = readl(rb + CT2_CSI_FW_CTL_REG); in bfa_ioc_ct2_nfc_clk_reset()
866 bfa_ioc_ct2_wait_till_nfc_running(void __iomem *rb) in bfa_ioc_ct2_wait_till_nfc_running() argument
871 if (bfa_ioc_ct2_nfc_halted(rb)) in bfa_ioc_ct2_wait_till_nfc_running()
872 bfa_ioc_ct2_nfc_resume(rb); in bfa_ioc_ct2_wait_till_nfc_running()
874 r32 = readl(rb + CT2_NFC_STS_REG); in bfa_ioc_ct2_wait_till_nfc_running()
880 r32 = readl(rb + CT2_NFC_STS_REG); in bfa_ioc_ct2_wait_till_nfc_running()
885 bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode) in bfa_ioc_ct2_pll_init() argument
889 wgn = readl(rb + CT2_WGN_STATUS); in bfa_ioc_ct2_pll_init()
895 bfa_ioc_ct2_clk_reset(rb); in bfa_ioc_ct2_pll_init()
896 bfa_ioc_ct2_enable_flash(rb); in bfa_ioc_ct2_pll_init()
898 bfa_ioc_ct2_mac_reset(rb); in bfa_ioc_ct2_pll_init()
900 bfa_ioc_ct2_clk_reset(rb); in bfa_ioc_ct2_pll_init()
901 bfa_ioc_ct2_enable_flash(rb); in bfa_ioc_ct2_pll_init()
904 nfc_ver = readl(rb + CT2_RSC_GPR15_REG); in bfa_ioc_ct2_pll_init()
909 bfa_ioc_ct2_wait_till_nfc_running(rb); in bfa_ioc_ct2_pll_init()
911 bfa_ioc_ct2_nfc_clk_reset(rb); in bfa_ioc_ct2_pll_init()
913 bfa_ioc_ct2_nfc_halt(rb); in bfa_ioc_ct2_pll_init()
915 bfa_ioc_ct2_clk_reset(rb); in bfa_ioc_ct2_pll_init()
916 bfa_ioc_ct2_mac_reset(rb); in bfa_ioc_ct2_pll_init()
917 bfa_ioc_ct2_clk_reset(rb); in bfa_ioc_ct2_pll_init()
927 writel(1, (rb + CT2_LPU0_HOSTFN_MBOX0_MSK)); in bfa_ioc_ct2_pll_init()
928 writel(1, (rb + CT2_LPU1_HOSTFN_MBOX0_MSK)); in bfa_ioc_ct2_pll_init()
931 r32 = readl(rb + HOST_SEM5_REG); in bfa_ioc_ct2_pll_init()
933 r32 = readl((rb + CT2_LPU0_HOSTFN_CMD_STAT)); in bfa_ioc_ct2_pll_init()
935 writel(1, (rb + CT2_LPU0_HOSTFN_CMD_STAT)); in bfa_ioc_ct2_pll_init()
936 readl((rb + CT2_LPU0_HOSTFN_CMD_STAT)); in bfa_ioc_ct2_pll_init()
938 r32 = readl((rb + CT2_LPU1_HOSTFN_CMD_STAT)); in bfa_ioc_ct2_pll_init()
940 writel(1, (rb + CT2_LPU1_HOSTFN_CMD_STAT)); in bfa_ioc_ct2_pll_init()
941 readl((rb + CT2_LPU1_HOSTFN_CMD_STAT)); in bfa_ioc_ct2_pll_init()
945 bfa_ioc_ct2_mem_init(rb); in bfa_ioc_ct2_pll_init()
947 writel(BFI_IOC_UNINIT, (rb + CT2_BFA_IOC0_STATE_REG)); in bfa_ioc_ct2_pll_init()
948 writel(BFI_IOC_UNINIT, (rb + CT2_BFA_IOC1_STATE_REG)); in bfa_ioc_ct2_pll_init()