164 		val = csio_rd_reg32(hw, reg);  in csio_hw_wait_op_done_val()
193 	val |= csio_rd_reg32(hw, TP_PIO_DATA) & ~mask;  in csio_hw_tp_wr_bits_indirect()
201 	uint32_t val = csio_rd_reg32(hw, reg) & ~mask;  in csio_set_reg_field()
205 	csio_rd_reg32(hw, reg);  in csio_set_reg_field()
425 	if (csio_rd_reg32(hw, SF_OP) & SF_BUSY)  in csio_hw_sf1_read()
435 		*valp = csio_rd_reg32(hw, SF_DATA);  in csio_hw_sf1_read()
457 	if (csio_rd_reg32(hw, SF_OP) & SF_BUSY)  in csio_hw_sf1_write()
881 	while (((reg = csio_rd_reg32(hw, PL_WHOAMI)) == 0xFFFFFFFF) &&  in csio_hw_dev_ready()
982 			pcie_fw = csio_rd_reg32(hw, PCIE_FW);  in csio_do_hello()
1280 			if (!(csio_rd_reg32(hw, PCIE_FW) & PCIE_FW_HALT))  in csio_hw_fw_restart()
2153 	hw->chip_ver = (char)csio_rd_reg32(hw, PL_REV);  in csio_hw_configure()
2341 	uint32_t pf = SOURCEPF_GET(csio_rd_reg32(hw, PL_WHOAMI));  in csio_hw_intr_enable()
2342 	uint32_t pl = csio_rd_reg32(hw, PL_INT_ENABLE);  in csio_hw_intr_enable()
2393 	uint32_t pf = SOURCEPF_GET(csio_rd_reg32(hw, PL_WHOAMI));  in csio_hw_intr_disable()
2767 	unsigned int status = csio_rd_reg32(hw, reg);  in csio_handle_intr_status()
2835 	v = (uint64_t)csio_rd_reg32(hw, SGE_INT_CAUSE1) |  in csio_sge_intr_handler()
2836 	    ((uint64_t)csio_rd_reg32(hw, SGE_INT_CAUSE2) << 32);  in csio_sge_intr_handler()
3093 	csio_rd_reg32(hw, MPS_INT_CAUSE);                    /* flush */  in csio_mps_intr_handler()
3117 	v = csio_rd_reg32(hw, addr) & MEM_INT_MASK;  in csio_mem_intr_handler()
3121 		uint32_t cnt = ECC_CECNT_GET(csio_rd_reg32(hw, cnt_addr));  in csio_mem_intr_handler()
3140 	uint32_t v, status = csio_rd_reg32(hw, MA_INT_CAUSE);  in csio_ma_intr_handler()
3144 			    csio_rd_reg32(hw, MA_PARITY_ERROR_STATUS));  in csio_ma_intr_handler()
3146 		v = csio_rd_reg32(hw, MA_INT_WRAP_STATUS);  in csio_ma_intr_handler()
3193 	uint32_t v = csio_rd_reg32(hw, CSIO_MAC_INT_CAUSE_REG(hw, port));  in csio_xgmac_intr_handler()
3233 	uint32_t cause = csio_rd_reg32(hw, PL_INT_CAUSE);  in csio_hw_slow_intr_handler()
3312 	csio_rd_reg32(hw, PL_INT_CAUSE); /* flush */  in csio_hw_slow_intr_handler()