Lines Matching refs:clk
19 static unsigned int sh_clk_read(struct clk *clk) in sh_clk_read() argument
21 if (clk->flags & CLK_ENABLE_REG_8BIT) in sh_clk_read()
22 return ioread8(clk->mapped_reg); in sh_clk_read()
23 else if (clk->flags & CLK_ENABLE_REG_16BIT) in sh_clk_read()
24 return ioread16(clk->mapped_reg); in sh_clk_read()
26 return ioread32(clk->mapped_reg); in sh_clk_read()
29 static void sh_clk_write(int value, struct clk *clk) in sh_clk_write() argument
31 if (clk->flags & CLK_ENABLE_REG_8BIT) in sh_clk_write()
32 iowrite8(value, clk->mapped_reg); in sh_clk_write()
33 else if (clk->flags & CLK_ENABLE_REG_16BIT) in sh_clk_write()
34 iowrite16(value, clk->mapped_reg); in sh_clk_write()
36 iowrite32(value, clk->mapped_reg); in sh_clk_write()
39 static int sh_clk_mstp_enable(struct clk *clk) in sh_clk_mstp_enable() argument
41 sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); in sh_clk_mstp_enable()
45 static void sh_clk_mstp_disable(struct clk *clk) in sh_clk_mstp_disable() argument
47 sh_clk_write(sh_clk_read(clk) | (1 << clk->enable_bit), clk); in sh_clk_mstp_disable()
56 int __init sh_clk_mstp_register(struct clk *clks, int nr) in sh_clk_mstp_register()
58 struct clk *clkp; in sh_clk_mstp_register()
74 static inline struct clk_div_table *clk_to_div_table(struct clk *clk) in clk_to_div_table() argument
76 return clk->priv; in clk_to_div_table()
79 static inline struct clk_div_mult_table *clk_to_div_mult_table(struct clk *clk) in clk_to_div_mult_table() argument
81 return clk_to_div_table(clk)->div_mult_table; in clk_to_div_mult_table()
87 static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate) in sh_clk_div_round_rate() argument
89 return clk_rate_table_round(clk, clk->freq_table, rate); in sh_clk_div_round_rate()
92 static unsigned long sh_clk_div_recalc(struct clk *clk) in sh_clk_div_recalc() argument
94 struct clk_div_mult_table *table = clk_to_div_mult_table(clk); in sh_clk_div_recalc()
97 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, in sh_clk_div_recalc()
98 table, clk->arch_flags ? &clk->arch_flags : NULL); in sh_clk_div_recalc()
100 idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask; in sh_clk_div_recalc()
102 return clk->freq_table[idx].frequency; in sh_clk_div_recalc()
105 static int sh_clk_div_set_rate(struct clk *clk, unsigned long rate) in sh_clk_div_set_rate() argument
107 struct clk_div_table *dt = clk_to_div_table(clk); in sh_clk_div_set_rate()
111 idx = clk_rate_table_find(clk, clk->freq_table, rate); in sh_clk_div_set_rate()
115 value = sh_clk_read(clk); in sh_clk_div_set_rate()
116 value &= ~(clk->div_mask << clk->enable_bit); in sh_clk_div_set_rate()
117 value |= (idx << clk->enable_bit); in sh_clk_div_set_rate()
118 sh_clk_write(value, clk); in sh_clk_div_set_rate()
122 dt->kick(clk); in sh_clk_div_set_rate()
127 static int sh_clk_div_enable(struct clk *clk) in sh_clk_div_enable() argument
129 if (clk->div_mask == SH_CLK_DIV6_MSK) { in sh_clk_div_enable()
130 int ret = sh_clk_div_set_rate(clk, clk->rate); in sh_clk_div_enable()
135 sh_clk_write(sh_clk_read(clk) & ~CPG_CKSTP_BIT, clk); in sh_clk_div_enable()
139 static void sh_clk_div_disable(struct clk *clk) in sh_clk_div_disable() argument
143 val = sh_clk_read(clk); in sh_clk_div_disable()
151 if (clk->flags & CLK_MASK_DIV_ON_DISABLE) in sh_clk_div_disable()
152 val |= clk->div_mask; in sh_clk_div_disable()
154 sh_clk_write(val, clk); in sh_clk_div_disable()
171 static int __init sh_clk_init_parent(struct clk *clk) in sh_clk_init_parent() argument
175 if (clk->parent) in sh_clk_init_parent()
178 if (!clk->parent_table || !clk->parent_num) in sh_clk_init_parent()
181 if (!clk->src_width) { in sh_clk_init_parent()
186 val = (sh_clk_read(clk) >> clk->src_shift); in sh_clk_init_parent()
187 val &= (1 << clk->src_width) - 1; in sh_clk_init_parent()
189 if (val >= clk->parent_num) { in sh_clk_init_parent()
194 clk_reparent(clk, clk->parent_table[val]); in sh_clk_init_parent()
195 if (!clk->parent) { in sh_clk_init_parent()
203 static int __init sh_clk_div_register_ops(struct clk *clks, int nr, in sh_clk_div_register_ops()
206 struct clk *clkp; in sh_clk_div_register_ops()
256 static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent) in sh_clk_div6_set_parent() argument
258 struct clk_div_mult_table *table = clk_to_div_mult_table(clk); in sh_clk_div6_set_parent()
262 if (!clk->parent_table || !clk->parent_num) in sh_clk_div6_set_parent()
266 for (i = 0; i < clk->parent_num; i++) in sh_clk_div6_set_parent()
267 if (clk->parent_table[i] == parent) in sh_clk_div6_set_parent()
270 if (i == clk->parent_num) in sh_clk_div6_set_parent()
273 ret = clk_reparent(clk, parent); in sh_clk_div6_set_parent()
277 value = sh_clk_read(clk) & in sh_clk_div6_set_parent()
278 ~(((1 << clk->src_width) - 1) << clk->src_shift); in sh_clk_div6_set_parent()
280 sh_clk_write(value | (i << clk->src_shift), clk); in sh_clk_div6_set_parent()
283 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, in sh_clk_div6_set_parent()
298 int __init sh_clk_div6_register(struct clk *clks, int nr) in sh_clk_div6_register()
304 int __init sh_clk_div6_reparent_register(struct clk *clks, int nr) in sh_clk_div6_reparent_register()
313 static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent) in sh_clk_div4_set_parent() argument
315 struct clk_div_mult_table *table = clk_to_div_mult_table(clk); in sh_clk_div4_set_parent()
325 value = sh_clk_read(clk) & ~(1 << 7); in sh_clk_div4_set_parent()
327 value = sh_clk_read(clk) | (1 << 7); in sh_clk_div4_set_parent()
329 ret = clk_reparent(clk, parent); in sh_clk_div4_set_parent()
333 sh_clk_write(value, clk); in sh_clk_div4_set_parent()
336 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, in sh_clk_div4_set_parent()
337 table, &clk->arch_flags); in sh_clk_div4_set_parent()
351 int __init sh_clk_div4_register(struct clk *clks, int nr, in sh_clk_div4_register()
357 int __init sh_clk_div4_enable_register(struct clk *clks, int nr, in sh_clk_div4_enable_register()
364 int __init sh_clk_div4_reparent_register(struct clk *clks, int nr, in sh_clk_div4_reparent_register()
372 static unsigned long fsidiv_recalc(struct clk *clk) in fsidiv_recalc() argument
376 value = __raw_readl(clk->mapping->base); in fsidiv_recalc()
380 return clk->parent->rate; in fsidiv_recalc()
382 return clk->parent->rate / value; in fsidiv_recalc()
385 static long fsidiv_round_rate(struct clk *clk, unsigned long rate) in fsidiv_round_rate() argument
387 return clk_rate_div_range_round(clk, 1, 0xffff, rate); in fsidiv_round_rate()
390 static void fsidiv_disable(struct clk *clk) in fsidiv_disable() argument
392 __raw_writel(0, clk->mapping->base); in fsidiv_disable()
395 static int fsidiv_enable(struct clk *clk) in fsidiv_enable() argument
399 value = __raw_readl(clk->mapping->base) >> 16; in fsidiv_enable()
403 __raw_writel((value << 16) | 0x3, clk->mapping->base); in fsidiv_enable()
408 static int fsidiv_set_rate(struct clk *clk, unsigned long rate) in fsidiv_set_rate() argument
412 idx = (clk->parent->rate / rate) & 0xffff; in fsidiv_set_rate()
414 __raw_writel(0, clk->mapping->base); in fsidiv_set_rate()
416 __raw_writel(idx << 16, clk->mapping->base); in fsidiv_set_rate()
429 int __init sh_clk_fsidiv_register(struct clk *clks, int nr) in sh_clk_fsidiv_register()