90 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_change_mode()  local
91 	__be32 __iomem *mode = &reg_base->csmode[spi->chip_select];  in fsl_espi_change_mode()
92 	__be32 __iomem *espi_mode = &reg_base->mode;  in fsl_espi_change_mode()
207 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_cpu_bufs()  local
212 	mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);  in fsl_espi_cpu_bufs()
216 	mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_bufs()
224 	struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_bufs()  local
247 	mpc8xxx_spi_write_reg(&reg_base->command,  in fsl_espi_bufs()
257 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_bufs()
459 	struct fsl_espi_reg *reg_base;  in fsl_espi_setup()  local
476 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_setup()
480 			&reg_base->csmode[spi->chip_select]);  in fsl_espi_setup()
493 	loop_mode = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_setup()
497 	mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);  in fsl_espi_setup()
509 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_cpu_irq()  local
519 			events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_espi_cpu_irq()
523 			rx_data = mpc8xxx_spi_read_reg(&reg_base->receive);  in fsl_espi_cpu_irq()
528 				rx_data_8 = in_8((u8 *)&reg_base->receive);  in fsl_espi_cpu_irq()
546 				&reg_base->event)) & SPIE_NF) == 0, 1000, 0);  in fsl_espi_cpu_irq()
554 	mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
560 		mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_irq()
569 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_irq()  local
574 	events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_espi_irq()
587 	iounmap(mspi->reg_base);  in fsl_espi_remove()
596 	struct fsl_espi_reg *reg_base;  in fsl_espi_probe()  local
618 	mpc8xxx_spi->reg_base = ioremap(mem->start, resource_size(mem));  in fsl_espi_probe()
619 	if (!mpc8xxx_spi->reg_base) {  in fsl_espi_probe()
624 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_probe()
638 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in fsl_espi_probe()
639 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_probe()
640 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in fsl_espi_probe()
641 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in fsl_espi_probe()
645 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);  in fsl_espi_probe()
650 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_probe()
656 	dev_info(dev, "at 0x%p (irq = %d)\n", reg_base, mpc8xxx_spi->irq);  in fsl_espi_probe()
663 	iounmap(mpc8xxx_spi->reg_base);  in fsl_espi_probe()