Lines Matching refs:reg_base
90 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_change_mode() local
91 __be32 __iomem *mode = ®_base->mode; in fsl_spi_change_mode()
298 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_cpu_bufs() local
303 mpc8xxx_spi_write_reg(®_base->mask, SPIM_NE); in fsl_spi_cpu_bufs()
307 mpc8xxx_spi_write_reg(®_base->transmit, word); in fsl_spi_cpu_bufs()
316 struct fsl_spi_reg *reg_base; in fsl_spi_bufs() local
321 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_bufs()
354 mpc8xxx_spi_write_reg(®_base->mask, 0); in fsl_spi_bufs()
420 struct fsl_spi_reg *reg_base; in fsl_spi_setup() local
436 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_setup()
439 cs->hw_mode = mpc8xxx_spi_read_reg(®_base->mode); in fsl_spi_setup()
501 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_cpu_irq() local
505 u32 rx_data = mpc8xxx_spi_read_reg(®_base->receive); in fsl_spi_cpu_irq()
514 mpc8xxx_spi_read_reg(®_base->event)) & in fsl_spi_cpu_irq()
519 mpc8xxx_spi_write_reg(®_base->event, events); in fsl_spi_cpu_irq()
525 mpc8xxx_spi_write_reg(®_base->transmit, word); in fsl_spi_cpu_irq()
536 struct fsl_spi_reg *reg_base = mspi->reg_base; in fsl_spi_irq() local
539 events = mpc8xxx_spi_read_reg(®_base->event); in fsl_spi_irq()
555 iounmap(mspi->reg_base); in fsl_spi_remove()
562 struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base; in fsl_spi_grlib_cs_control() local
569 slvsel = mpc8xxx_spi_read_reg(®_base->slvsel); in fsl_spi_grlib_cs_control()
571 mpc8xxx_spi_write_reg(®_base->slvsel, slvsel); in fsl_spi_grlib_cs_control()
580 struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base; in fsl_spi_grlib_probe() local
584 capabilities = mpc8xxx_spi_read_reg(®_base->cap); in fsl_spi_grlib_probe()
594 mpc8xxx_spi_write_reg(®_base->slvsel, 0xffffffff); in fsl_spi_grlib_probe()
606 struct fsl_spi_reg *reg_base; in fsl_spi_probe() local
635 mpc8xxx_spi->reg_base = ioremap(mem->start, resource_size(mem)); in fsl_spi_probe()
636 if (mpc8xxx_spi->reg_base == NULL) { in fsl_spi_probe()
659 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_probe()
662 mpc8xxx_spi_write_reg(®_base->mode, 0); in fsl_spi_probe()
663 mpc8xxx_spi_write_reg(®_base->mask, 0); in fsl_spi_probe()
664 mpc8xxx_spi_write_reg(®_base->command, 0); in fsl_spi_probe()
665 mpc8xxx_spi_write_reg(®_base->event, 0xffffffff); in fsl_spi_probe()
676 mpc8xxx_spi_write_reg(®_base->mode, regval); in fsl_spi_probe()
682 dev_info(dev, "at 0x%p (irq = %d), %s mode\n", reg_base, in fsl_spi_probe()
690 iounmap(mpc8xxx_spi->reg_base); in fsl_spi_probe()