Lines Matching refs:BIT
19 #define HCCPARAMS_LEN BIT(17)
23 #define DCCPARAMS_DC BIT(7)
24 #define DCCPARAMS_HC BIT(8)
27 #define TESTMODE_FORCE BIT(0)
30 #define USBCMD_RS BIT(0)
31 #define USBCMD_RST BIT(1)
32 #define USBCMD_SUTW BIT(13)
33 #define USBCMD_ATDTW BIT(14)
36 #define USBi_UI BIT(0)
37 #define USBi_UEI BIT(1)
38 #define USBi_PCI BIT(2)
39 #define USBi_URI BIT(6)
40 #define USBi_SLI BIT(8)
43 #define DEVICEADDR_USBADRA BIT(24)
47 #define PORTSC_FPR BIT(6)
48 #define PORTSC_SUSP BIT(7)
49 #define PORTSC_HSP BIT(9)
57 #define OTGSC_IDPU BIT(5)
58 #define OTGSC_ID BIT(8)
59 #define OTGSC_AVV BIT(9)
60 #define OTGSC_ASV BIT(10)
61 #define OTGSC_BSV BIT(11)
62 #define OTGSC_BSE BIT(12)
63 #define OTGSC_IDIS BIT(16)
64 #define OTGSC_AVVIS BIT(17)
65 #define OTGSC_ASVIS BIT(18)
66 #define OTGSC_BSVIS BIT(19)
67 #define OTGSC_BSEIS BIT(20)
68 #define OTGSC_IDIE BIT(24)
69 #define OTGSC_AVVIE BIT(25)
70 #define OTGSC_ASVIE BIT(26)
71 #define OTGSC_BSVIE BIT(27)
72 #define OTGSC_BSEIE BIT(28)
77 #define USBMODE_SLOM BIT(3)
78 #define USBMODE_CI_SDIS BIT(4)
81 #define ENDPTCTRL_RXS BIT(0)
83 #define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */
84 #define ENDPTCTRL_RXE BIT(7)
85 #define ENDPTCTRL_TXS BIT(16)
87 #define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */
88 #define ENDPTCTRL_TXE BIT(23)