47 	void *reg_base =  in lcd_spi_write()  local
51 	writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR);  in lcd_spi_write()
55 		writel_relaxed((u8)data, reg_base + LCD_SPU_SPI_TXDATA);  in lcd_spi_write()
58 		writel_relaxed((u16)data, reg_base + LCD_SPU_SPI_TXDATA);  in lcd_spi_write()
61 		writel_relaxed((u32)data, reg_base + LCD_SPU_SPI_TXDATA);  in lcd_spi_write()
68 	tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL);  in lcd_spi_write()
71 	writel(tmp, reg_base + LCD_SPU_SPI_CTRL);  in lcd_spi_write()
73 	isr = readl_relaxed(reg_base + SPU_IRQ_ISR);  in lcd_spi_write()
76 		isr = readl_relaxed(reg_base + SPU_IRQ_ISR);  in lcd_spi_write()
84 	tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL);  in lcd_spi_write()
87 	writel_relaxed(tmp, reg_base + LCD_SPU_SPI_CTRL);  in lcd_spi_write()
89 	writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR);  in lcd_spi_write()
96 	void *reg_base =  in lcd_spi_setup()  local
104 	writel(tmp, reg_base + LCD_SPU_SPI_CTRL);  in lcd_spi_setup()
111 	tmp = readl_relaxed(reg_base + SPU_IOPAD_CONTROL);  in lcd_spi_setup()
115 			reg_base + SPU_IOPAD_CONTROL);  in lcd_spi_setup()
162 	*p_regbase = ctrl->reg_base;  in lcd_spi_register()