Lines Matching refs:dss
95 } dss; variable
107 __raw_writel(val, dss.base + idx.idx); in dss_write_reg()
112 return __raw_readl(dss.base + idx.idx); in dss_read_reg()
116 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
118 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
132 dss.ctx_valid = true; in dss_save_context()
141 if (!dss.ctx_valid) in dss_restore_context()
160 struct omap_dss_board_info *board_data = dss.pdev->dev.platform_data; in dss_get_ctx_loss_count()
166 cnt = board_data->get_context_loss_count(&dss.pdev->dev); in dss_get_ctx_loss_count()
279 fclk_rate = clk_get_rate(dss.dss_clk); in dss_dump_clocks()
281 if (dss.dpll4_m4_ck) { in dss_dump_clocks()
282 dpll4_ck_rate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); in dss_dump_clocks()
283 dpll4_m4_ck_rate = clk_get_rate(dss.dpll4_m4_ck); in dss_dump_clocks()
290 dss.feat->dss_fck_multiplier, fclk_rate); in dss_dump_clocks()
352 dss.dispc_clk_source = clk_src; in dss_select_dispc_clk_source()
385 dss.dsi_clk_source[dsi_module] = clk_src; in dss_select_dsi_clk_source()
427 dss.lcd_clk_source[ix] = clk_src; in dss_select_lcd_clk_source()
432 return dss.dispc_clk_source; in dss_get_dispc_clk_source()
437 return dss.dsi_clk_source[dsi_module]; in dss_get_dsi_clk_source()
445 return dss.lcd_clk_source[ix]; in dss_get_lcd_clk_source()
449 return dss.dispc_clk_source; in dss_get_lcd_clk_source()
456 if (dss.dpll4_m4_ck) { in dss_calc_clock_rates()
459 if (cinfo->fck_div > dss.feat->fck_div_max || in dss_calc_clock_rates()
463 prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); in dss_calc_clock_rates()
466 dss.feat->dss_fck_multiplier; in dss_calc_clock_rates()
470 cinfo->fck = clk_get_rate(dss.dss_clk); in dss_calc_clock_rates()
485 if (dss.dpll4_m4_ck == NULL) { in dss_div_calc()
491 fck = clk_get_rate(dss.dss_clk); in dss_div_calc()
497 fckd_hw_max = dss.feat->fck_div_max; in dss_div_calc()
499 m = dss.feat->dss_fck_multiplier; in dss_div_calc()
519 if (dss.dpll4_m4_ck) { in dss_set_clock_div()
523 prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); in dss_set_clock_div()
526 r = clk_set_rate(dss.dpll4_m4_ck, in dss_set_clock_div()
535 dss.dss_clk_rate = clk_get_rate(dss.dss_clk); in dss_set_clock_div()
537 WARN_ONCE(dss.dss_clk_rate != cinfo->fck, in dss_set_clock_div()
538 "clk rate mismatch: %lu != %lu", dss.dss_clk_rate, in dss_set_clock_div()
548 if (dss.dpll4_m4_ck) in dss_get_dpll4_rate()
549 return clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); in dss_get_dpll4_rate()
556 return dss.dss_clk_rate; in dss_get_dispc_clk_rate()
566 if (dss.dpll4_m4_ck == NULL) in dss_setup_default_clock()
573 fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier, in dss_setup_default_clock()
693 return dss.feat->dpi_select_source(channel); in dss_dpi_select_source()
700 clk = devm_clk_get(&dss.pdev->dev, "fck"); in dss_get_clocks()
706 dss.dss_clk = clk; in dss_get_clocks()
708 if (dss.feat->clk_name) { in dss_get_clocks()
709 clk = clk_get(NULL, dss.feat->clk_name); in dss_get_clocks()
711 DSSERR("Failed to get %s\n", dss.feat->clk_name); in dss_get_clocks()
718 dss.dpll4_m4_ck = clk; in dss_get_clocks()
725 if (dss.dpll4_m4_ck) in dss_put_clocks()
726 clk_put(dss.dpll4_m4_ck); in dss_put_clocks()
735 r = pm_runtime_get_sync(&dss.pdev->dev); in dss_runtime_get()
746 r = pm_runtime_put_sync(&dss.pdev->dev); in dss_runtime_put()
838 dss.feat = dst; in dss_init_features()
850 dss.pdev = pdev; in omap_dsshw_probe()
852 r = dss_init_features(dss.pdev); in omap_dsshw_probe()
856 dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0); in omap_dsshw_probe()
862 dss.base = devm_ioremap(&pdev->dev, dss_mem->start, in omap_dsshw_probe()
864 if (!dss.base) { in omap_dsshw_probe()
883 dss.dss_clk_rate = clk_get_rate(dss.dss_clk); in omap_dsshw_probe()
895 dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; in omap_dsshw_probe()
896 dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; in omap_dsshw_probe()
897 dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK; in omap_dsshw_probe()
898 dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; in omap_dsshw_probe()
899 dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; in omap_dsshw_probe()