196 		outb(uart->tx_buff[buff_out], uart->base + UART_TX);  in snd_uart16550_buffer_output()
351 	outb(UART_LCR_WLEN8, io_base + UART_LCR); /* Line Control Register */  in snd_uart16550_detect()
357 	outb(0xaa, io_base + UART_SCR);  in snd_uart16550_detect()
364 	outb(0x55, io_base + UART_SCR);  in snd_uart16550_detect()
386 	outb(UART_FCR_ENABLE_FIFO	/* Enable FIFO's (if available) */  in snd_uart16550_do_open()
399 		outb(UART_LCR_DLAB	/* Divisor latch access bit */  in snd_uart16550_do_open()
404 		outb(uart->divisor  in snd_uart16550_do_open()
406 		outb(0  in snd_uart16550_do_open()
411 	outb(UART_LCR_WLEN8	/* 8 data-bits */  in snd_uart16550_do_open()
419 		outb(UART_MCR_RTS	/* Set Request-To-Send line active */  in snd_uart16550_do_open()
430 		outb(UART_MCR_RTS | (0&UART_MCR_DTR) | UART_MCR_OUT2,  in snd_uart16550_do_open()
436 		outb(UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2,  in snd_uart16550_do_open()
459 	outb(byte, uart->base + UART_IER);	/* Interrupt enable Register */  in snd_uart16550_do_open()
475 	outb((0 & UART_IER_RDI)		/* Disable Receiver data interrupt */  in snd_uart16550_do_close()
481 		outb((0 & UART_MCR_RTS)		/* Deactivate Request-To-Send line  */  in snd_uart16550_do_close()
490 		outb(UART_MCR_RTS | (0&UART_MCR_DTR) | (0&UART_MCR_OUT2),  in snd_uart16550_do_close()
496 		outb(UART_MCR_RTS | UART_MCR_DTR | (0&UART_MCR_OUT2),  in snd_uart16550_do_close()
505 		outb(UART_LCR_DLAB		/* Divisor latch access bit */  in snd_uart16550_do_close()
507 		outb(uart->old_divisor_lsb  in snd_uart16550_do_close()
509 		outb(uart->old_divisor_msb  in snd_uart16550_do_close()
512 		outb(uart->old_line_ctrl_reg  in snd_uart16550_do_close()
627 			outb(midi_byte, uart->base + UART_TX);  in snd_uart16550_output_byte()
631 				outb(midi_byte, uart->base + UART_TX);  in snd_uart16550_output_byte()
849 		outb(UART_MCR_RTS | (0&UART_MCR_DTR), uart->base + UART_MCR);  in snd_uart16550_create()
854 		outb(UART_MCR_RTS | UART_MCR_DTR, uart->base + UART_MCR);  in snd_uart16550_create()