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Lines Matching refs:outb

216 		outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));  in ad_read()
225 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); in ad_read()
226 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc)); in ad_read()
242 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); in ad_write()
243 outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc)); in ad_write()
251 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); in ad_write()
252 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc)); in ad_write()
253 outb((unsigned char) (data & 0xff), io_Indexed_Data(devc)); in ad_write()
322 outb((devc->MCE_bit), io_Index_Addr(devc)); in ad_enter_MCE()
337 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */ in ad_leave_MCE()
343 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */ in ad_leave_MCE()
1353 outb(0, io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_input()
1354 outb(0, io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_input()
1389 outb((0), io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_output()
1390 outb((0), io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_output()
1525 outb((0), io_Status(devc)); /* Clear pending interrupts */ in ad1848_init_hw()
2219 outb((0), io_Status(devc)); /* Clear interrupt status */ in adintr()
2231 outb(11, 0xe0e); in adintr()
2233 outb((~c930_stat), 0xe0f); in adintr()
2293 outb(0x10, 0xc44); in init_deskpro_m()
2294 outb(0x40, 0xc45); in init_deskpro_m()
2295 outb(0x00, 0xc46); in init_deskpro_m()
2296 outb(0xe8, 0xc47); in init_deskpro_m()
2297 outb(0x14, 0xc44); in init_deskpro_m()
2298 outb(0x40, 0xc45); in init_deskpro_m()
2299 outb(0x00, 0xc46); in init_deskpro_m()
2300 outb(0xe8, 0xc47); in init_deskpro_m()
2301 outb(0x10, 0xc44); in init_deskpro_m()
2320 outb((tmp | 0x04), 0xc44); /* Select bank 1 */ in init_deskpro()
2360 outb((tmp & ~0x04), 0xc44); in init_deskpro()
2362 outb((tmp | 0x04), 0xc44); in init_deskpro()
2387 outb((tmp & ~0x04), 0xc44); /* Write to bank=0 */ in init_deskpro()
2392 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2394 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2411 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2413 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2417 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2418 outb((0x88), 0xc45); /* FM base 7:0 = 0x88 */ in init_deskpro()
2419 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2420 outb((0x10), 0xc45); /* MSS ID = 0x10 (MSS port returns 0x04) */ in init_deskpro()
2425 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2427 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2442 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2444 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2448 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2449 outb((0x03), 0xc46); /* FM base 15:8 = 0x03 */ in init_deskpro()
2450 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2451 outb((0x11), 0xc46); /* ASIC ID = 0x11 */ in init_deskpro()
2456 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2458 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2472 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2474 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2478 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2479 outb((0x7c), 0xc47); /* FM decode enable bits = 0x7c */ in init_deskpro()
2480 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2481 outb((0x00), 0xc47); /* Reserved bank1 = 0x00 */ in init_deskpro()
2486 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2488 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2500 outb((0x80), 0xc6f); in init_deskpro()
2636 outb((bits | 0x40), config_port); in attach_ms_sound()
2675 outb((bits | dma_bits[dma] | dma2_bit), config_port); /* Write IRQ+DMA setup */ in attach_ms_sound()