Lines Matching refs:chip
151 #define azx_snoop(chip) (chip)->snoop argument
154 #define azx_snoop(chip) true argument
463 struct azx *chip; member
627 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo) argument
629 #define use_vga_switcheroo(chip) 0 argument
652 #define azx_writel(chip,reg,value) \ argument
653 writel(value, (chip)->remap_addr + ICH6_REG_##reg)
654 #define azx_readl(chip,reg) \ argument
655 readl((chip)->remap_addr + ICH6_REG_##reg)
656 #define azx_writew(chip,reg,value) \ argument
657 writew(value, (chip)->remap_addr + ICH6_REG_##reg)
658 #define azx_readw(chip,reg) \ argument
659 readw((chip)->remap_addr + ICH6_REG_##reg)
660 #define azx_writeb(chip,reg,value) \ argument
661 writeb(value, (chip)->remap_addr + ICH6_REG_##reg)
662 #define azx_readb(chip,reg) \ argument
663 readb((chip)->remap_addr + ICH6_REG_##reg)
682 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on) in __mark_pages_wc() argument
686 if (azx_snoop(chip)) in __mark_pages_wc()
709 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf, in mark_pages_wc() argument
712 __mark_pages_wc(chip, buf, on); in mark_pages_wc()
714 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev, in mark_runtime_wc() argument
718 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on); in mark_runtime_wc()
724 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf, in mark_pages_wc() argument
728 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev, in mark_runtime_wc() argument
734 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
743 static int azx_alloc_cmd_io(struct azx *chip) in azx_alloc_cmd_io() argument
749 snd_dma_pci_data(chip->pci), in azx_alloc_cmd_io()
750 PAGE_SIZE, &chip->rb); in azx_alloc_cmd_io()
752 snd_printk(KERN_ERR SFX "%s: cannot allocate CORB/RIRB\n", pci_name(chip->pci)); in azx_alloc_cmd_io()
755 mark_pages_wc(chip, &chip->rb, true); in azx_alloc_cmd_io()
759 static void azx_init_cmd_io(struct azx *chip) in azx_init_cmd_io() argument
761 spin_lock_irq(&chip->reg_lock); in azx_init_cmd_io()
763 chip->corb.addr = chip->rb.addr; in azx_init_cmd_io()
764 chip->corb.buf = (u32 *)chip->rb.area; in azx_init_cmd_io()
765 azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); in azx_init_cmd_io()
766 azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr)); in azx_init_cmd_io()
769 azx_writeb(chip, CORBSIZE, 0x02); in azx_init_cmd_io()
771 azx_writew(chip, CORBWP, 0); in azx_init_cmd_io()
773 azx_writew(chip, CORBRP, ICH6_CORBRP_RST); in azx_init_cmd_io()
775 azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); in azx_init_cmd_io()
778 chip->rirb.addr = chip->rb.addr + 2048; in azx_init_cmd_io()
779 chip->rirb.buf = (u32 *)(chip->rb.area + 2048); in azx_init_cmd_io()
780 chip->rirb.wp = chip->rirb.rp = 0; in azx_init_cmd_io()
781 memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); in azx_init_cmd_io()
782 azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); in azx_init_cmd_io()
783 azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); in azx_init_cmd_io()
786 azx_writeb(chip, RIRBSIZE, 0x02); in azx_init_cmd_io()
788 azx_writew(chip, RIRBWP, ICH6_RIRBWP_RST); in azx_init_cmd_io()
790 if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) in azx_init_cmd_io()
791 azx_writew(chip, RINTCNT, 0xc0); in azx_init_cmd_io()
793 azx_writew(chip, RINTCNT, 1); in azx_init_cmd_io()
795 azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); in azx_init_cmd_io()
796 spin_unlock_irq(&chip->reg_lock); in azx_init_cmd_io()
799 static void azx_free_cmd_io(struct azx *chip) in azx_free_cmd_io() argument
801 spin_lock_irq(&chip->reg_lock); in azx_free_cmd_io()
803 azx_writeb(chip, RIRBCTL, 0); in azx_free_cmd_io()
804 azx_writeb(chip, CORBCTL, 0); in azx_free_cmd_io()
805 spin_unlock_irq(&chip->reg_lock); in azx_free_cmd_io()
835 struct azx *chip = bus->private_data; in azx_corb_send_cmd() local
839 spin_lock_irq(&chip->reg_lock); in azx_corb_send_cmd()
842 wp = azx_readw(chip, CORBWP); in azx_corb_send_cmd()
845 spin_unlock_irq(&chip->reg_lock); in azx_corb_send_cmd()
851 rp = azx_readw(chip, CORBRP); in azx_corb_send_cmd()
854 spin_unlock_irq(&chip->reg_lock); in azx_corb_send_cmd()
858 chip->rirb.cmds[addr]++; in azx_corb_send_cmd()
859 chip->corb.buf[wp] = cpu_to_le32(val); in azx_corb_send_cmd()
860 azx_writel(chip, CORBWP, wp); in azx_corb_send_cmd()
862 spin_unlock_irq(&chip->reg_lock); in azx_corb_send_cmd()
870 static void azx_update_rirb(struct azx *chip) in azx_update_rirb() argument
876 wp = azx_readw(chip, RIRBWP); in azx_update_rirb()
882 if (wp == chip->rirb.wp) in azx_update_rirb()
884 chip->rirb.wp = wp; in azx_update_rirb()
886 while (chip->rirb.rp != wp) { in azx_update_rirb()
887 chip->rirb.rp++; in azx_update_rirb()
888 chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; in azx_update_rirb()
890 rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ in azx_update_rirb()
891 res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); in azx_update_rirb()
892 res = le32_to_cpu(chip->rirb.buf[rp]); in azx_update_rirb()
895 snd_hda_queue_unsol_event(chip->bus, res, res_ex); in azx_update_rirb()
896 else if (chip->rirb.cmds[addr]) { in azx_update_rirb()
897 chip->rirb.res[addr] = res; in azx_update_rirb()
899 chip->rirb.cmds[addr]--; in azx_update_rirb()
903 pci_name(chip->pci), in azx_update_rirb()
905 chip->last_cmd[addr]); in azx_update_rirb()
913 struct azx *chip = bus->private_data; in azx_rirb_get_response() local
922 if (chip->polling_mode || do_poll) { in azx_rirb_get_response()
923 spin_lock_irq(&chip->reg_lock); in azx_rirb_get_response()
924 azx_update_rirb(chip); in azx_rirb_get_response()
925 spin_unlock_irq(&chip->reg_lock); in azx_rirb_get_response()
927 if (!chip->rirb.cmds[addr]) { in azx_rirb_get_response()
932 chip->poll_count = 0; in azx_rirb_get_response()
933 return chip->rirb.res[addr]; /* the last value */ in azx_rirb_get_response()
945 if (!chip->polling_mode && chip->poll_count < 2) { in azx_rirb_get_response()
948 pci_name(chip->pci), chip->last_cmd[addr]); in azx_rirb_get_response()
950 chip->poll_count++; in azx_rirb_get_response()
955 if (!chip->polling_mode) { in azx_rirb_get_response()
958 pci_name(chip->pci), chip->last_cmd[addr]); in azx_rirb_get_response()
959 chip->polling_mode = 1; in azx_rirb_get_response()
963 if (chip->msi) { in azx_rirb_get_response()
966 pci_name(chip->pci), chip->last_cmd[addr]); in azx_rirb_get_response()
967 free_irq(chip->irq, chip); in azx_rirb_get_response()
968 chip->irq = -1; in azx_rirb_get_response()
969 pci_disable_msi(chip->pci); in azx_rirb_get_response()
970 chip->msi = 0; in azx_rirb_get_response()
971 if (azx_acquire_irq(chip, 1) < 0) { in azx_rirb_get_response()
978 if (chip->probing) { in azx_rirb_get_response()
997 chip->last_cmd[addr]); in azx_rirb_get_response()
998 chip->single_cmd = 1; in azx_rirb_get_response()
1001 azx_free_cmd_io(chip); in azx_rirb_get_response()
1003 azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_UNSOL); in azx_rirb_get_response()
1018 static int azx_single_wait_for_response(struct azx *chip, unsigned int addr) in azx_single_wait_for_response() argument
1024 if (azx_readw(chip, IRS) & ICH6_IRS_VALID) { in azx_single_wait_for_response()
1026 chip->rirb.res[addr] = azx_readl(chip, IR); in azx_single_wait_for_response()
1033 pci_name(chip->pci), azx_readw(chip, IRS)); in azx_single_wait_for_response()
1034 chip->rirb.res[addr] = -1; in azx_single_wait_for_response()
1041 struct azx *chip = bus->private_data; in azx_single_send_cmd() local
1048 if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) { in azx_single_send_cmd()
1050 azx_writew(chip, IRS, azx_readw(chip, IRS) | in azx_single_send_cmd()
1052 azx_writel(chip, IC, val); in azx_single_send_cmd()
1053 azx_writew(chip, IRS, azx_readw(chip, IRS) | in azx_single_send_cmd()
1055 return azx_single_wait_for_response(chip, addr); in azx_single_send_cmd()
1061 pci_name(chip->pci), azx_readw(chip, IRS), val); in azx_single_send_cmd()
1069 struct azx *chip = bus->private_data; in azx_single_get_response() local
1070 return chip->rirb.res[addr]; in azx_single_get_response()
1083 struct azx *chip = bus->private_data; in azx_send_cmd() local
1085 if (chip->disabled) in azx_send_cmd()
1087 chip->last_cmd[azx_command_addr(val)] = val; in azx_send_cmd()
1088 if (chip->single_cmd) in azx_send_cmd()
1098 struct azx *chip = bus->private_data; in azx_get_response() local
1099 if (chip->disabled) in azx_get_response()
1101 if (chip->single_cmd) in azx_get_response()
1121 static int azx_reset(struct azx *chip, int full_reset) in azx_reset() argument
1129 azx_writeb(chip, STATESTS, STATESTS_INT_MASK); in azx_reset()
1132 azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET); in azx_reset()
1135 while (azx_readb(chip, GCTL) && in azx_reset()
1145 azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET); in azx_reset()
1148 while (!azx_readb(chip, GCTL) && in azx_reset()
1157 if (!azx_readb(chip, GCTL)) { in azx_reset()
1158 snd_printd(SFX "%s: azx_reset: controller not ready!\n", pci_name(chip->pci)); in azx_reset()
1163 if (!chip->single_cmd) in azx_reset()
1164 azx_writel(chip, GCTL, azx_readl(chip, GCTL) | in azx_reset()
1168 if (!chip->codec_mask) { in azx_reset()
1169 chip->codec_mask = azx_readw(chip, STATESTS); in azx_reset()
1170 snd_printdd(SFX "%s: codec_mask = 0x%x\n", pci_name(chip->pci), chip->codec_mask); in azx_reset()
1182 static void azx_int_enable(struct azx *chip) in azx_int_enable() argument
1185 azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) | in azx_int_enable()
1190 static void azx_int_disable(struct azx *chip) in azx_int_disable() argument
1195 for (i = 0; i < chip->num_streams; i++) { in azx_int_disable()
1196 struct azx_dev *azx_dev = &chip->azx_dev[i]; in azx_int_disable()
1202 azx_writeb(chip, INTCTL, 0); in azx_int_disable()
1205 azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) & in azx_int_disable()
1210 static void azx_int_clear(struct azx *chip) in azx_int_clear() argument
1215 for (i = 0; i < chip->num_streams; i++) { in azx_int_clear()
1216 struct azx_dev *azx_dev = &chip->azx_dev[i]; in azx_int_clear()
1221 azx_writeb(chip, STATESTS, STATESTS_INT_MASK); in azx_int_clear()
1224 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); in azx_int_clear()
1227 azx_writel(chip, INTSTS, ICH6_INT_CTRL_EN | ICH6_INT_ALL_STREAM); in azx_int_clear()
1231 static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) in azx_stream_start() argument
1239 azx_writel(chip, INTCTL, in azx_stream_start()
1240 azx_readl(chip, INTCTL) | (1 << azx_dev->index)); in azx_stream_start()
1247 static void azx_stream_clear(struct azx *chip, struct azx_dev *azx_dev) in azx_stream_clear() argument
1255 static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) in azx_stream_stop() argument
1257 azx_stream_clear(chip, azx_dev); in azx_stream_stop()
1259 azx_writel(chip, INTCTL, in azx_stream_stop()
1260 azx_readl(chip, INTCTL) & ~(1 << azx_dev->index)); in azx_stream_stop()
1267 static void azx_init_chip(struct azx *chip, int full_reset) in azx_init_chip() argument
1269 if (chip->initialized) in azx_init_chip()
1273 azx_reset(chip, full_reset); in azx_init_chip()
1276 azx_int_clear(chip); in azx_init_chip()
1277 azx_int_enable(chip); in azx_init_chip()
1280 if (!chip->single_cmd) in azx_init_chip()
1281 azx_init_cmd_io(chip); in azx_init_chip()
1284 azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); in azx_init_chip()
1285 azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr)); in azx_init_chip()
1287 chip->initialized = 1; in azx_init_chip()
1305 static void azx_init_pci(struct azx *chip) in azx_init_pci() argument
1313 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) { in azx_init_pci()
1314 snd_printdd(SFX "%s: Clearing TCSEL\n", pci_name(chip->pci)); in azx_init_pci()
1315 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0); in azx_init_pci()
1321 if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) { in azx_init_pci()
1322 snd_printdd(SFX "%s: Setting ATI snoop: %d\n", pci_name(chip->pci), azx_snoop(chip)); in azx_init_pci()
1323 update_pci_byte(chip->pci, in azx_init_pci()
1325 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0); in azx_init_pci()
1329 if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) { in azx_init_pci()
1330 snd_printdd(SFX "%s: Setting Nvidia snoop: %d\n", pci_name(chip->pci), azx_snoop(chip)); in azx_init_pci()
1331 update_pci_byte(chip->pci, in azx_init_pci()
1334 update_pci_byte(chip->pci, in azx_init_pci()
1337 update_pci_byte(chip->pci, in azx_init_pci()
1343 if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) { in azx_init_pci()
1345 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop); in azx_init_pci()
1346 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) || in azx_init_pci()
1347 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) { in azx_init_pci()
1349 if (!azx_snoop(chip)) in azx_init_pci()
1351 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop); in azx_init_pci()
1352 pci_read_config_word(chip->pci, in azx_init_pci()
1356 pci_name(chip->pci), (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) in azx_init_pci()
1362 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
1369 struct azx *chip = dev_id; in azx_interrupt() local
1376 if (chip->pci->dev.power.runtime_status != RPM_ACTIVE) in azx_interrupt()
1380 spin_lock(&chip->reg_lock); in azx_interrupt()
1382 if (chip->disabled) { in azx_interrupt()
1383 spin_unlock(&chip->reg_lock); in azx_interrupt()
1387 status = azx_readl(chip, INTSTS); in azx_interrupt()
1389 spin_unlock(&chip->reg_lock); in azx_interrupt()
1393 for (i = 0; i < chip->num_streams; i++) { in azx_interrupt()
1394 azx_dev = &chip->azx_dev[i]; in azx_interrupt()
1402 ok = azx_position_ok(chip, azx_dev); in azx_interrupt()
1405 spin_unlock(&chip->reg_lock); in azx_interrupt()
1407 spin_lock(&chip->reg_lock); in azx_interrupt()
1408 } else if (ok == 0 && chip->bus && chip->bus->workq) { in azx_interrupt()
1411 queue_work(chip->bus->workq, in azx_interrupt()
1412 &chip->irq_pending_work); in azx_interrupt()
1418 status = azx_readb(chip, RIRBSTS); in azx_interrupt()
1421 if (chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY) in azx_interrupt()
1423 azx_update_rirb(chip); in azx_interrupt()
1425 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); in azx_interrupt()
1430 if (azx_readb(chip, STATESTS) & 0x04) in azx_interrupt()
1431 azx_writeb(chip, STATESTS, 0x04); in azx_interrupt()
1433 spin_unlock(&chip->reg_lock); in azx_interrupt()
1442 static int setup_bdle(struct azx *chip, in setup_bdle() argument
1463 if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY) { in setup_bdle()
1485 static int azx_setup_periods(struct azx *chip, in azx_setup_periods() argument
1504 pos_adj = bdl_pos_adj[chip->dev_index]; in azx_setup_periods()
1517 pci_name(chip->pci), bdl_pos_adj[chip->dev_index]); in azx_setup_periods()
1520 ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), in azx_setup_periods()
1530 ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), in azx_setup_periods()
1534 ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), in azx_setup_periods()
1545 pci_name(chip->pci), azx_dev->bufsize, period_bytes); in azx_setup_periods()
1550 static void azx_stream_reset(struct azx *chip, struct azx_dev *azx_dev) in azx_stream_reset() argument
1555 azx_stream_clear(chip, azx_dev); in azx_stream_reset()
1581 static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) in azx_setup_controller() argument
1585 azx_stream_clear(chip, azx_dev); in azx_setup_controller()
1590 if (!azx_snoop(chip)) in azx_setup_controller()
1611 if (chip->position_fix[0] != POS_FIX_LPIB || in azx_setup_controller()
1612 chip->position_fix[1] != POS_FIX_LPIB) { in azx_setup_controller()
1613 if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) in azx_setup_controller()
1614 azx_writel(chip, DPLBASE, in azx_setup_controller()
1615 (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE); in azx_setup_controller()
1628 static int probe_codec(struct azx *chip, int addr) in probe_codec() argument
1634 mutex_lock(&chip->bus->cmd_mutex); in probe_codec()
1635 chip->probing = 1; in probe_codec()
1636 azx_send_cmd(chip->bus, cmd); in probe_codec()
1637 res = azx_get_response(chip->bus, addr); in probe_codec()
1638 chip->probing = 0; in probe_codec()
1639 mutex_unlock(&chip->bus->cmd_mutex); in probe_codec()
1642 snd_printdd(SFX "%s: codec #%d probed OK\n", pci_name(chip->pci), addr); in probe_codec()
1648 static void azx_stop_chip(struct azx *chip);
1652 struct azx *chip = bus->private_data; in azx_bus_reset() local
1655 azx_stop_chip(chip); in azx_bus_reset()
1656 azx_init_chip(chip, 1); in azx_bus_reset()
1658 if (chip->initialized) { in azx_bus_reset()
1660 list_for_each_entry(p, &chip->pcm_list, list) in azx_bus_reset()
1662 snd_hda_suspend(chip->bus); in azx_bus_reset()
1663 snd_hda_resume(chip->bus); in azx_bus_reset()
1669 static int get_jackpoll_interval(struct azx *chip) in get_jackpoll_interval() argument
1671 int i = jackpoll_ms[chip->dev_index]; in get_jackpoll_interval()
1695 static int azx_codec_create(struct azx *chip, const char *model) in azx_codec_create() argument
1702 bus_temp.private_data = chip; in azx_codec_create()
1704 bus_temp.pci = chip->pci; in azx_codec_create()
1719 err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus); in azx_codec_create()
1723 if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) { in azx_codec_create()
1724 snd_printd(SFX "%s: Enable delay in RIRB handling\n", pci_name(chip->pci)); in azx_codec_create()
1725 chip->bus->needs_damn_long_delay = 1; in azx_codec_create()
1729 max_slots = azx_max_codecs[chip->driver_type]; in azx_codec_create()
1735 if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { in azx_codec_create()
1736 if (probe_codec(chip, c) < 0) { in azx_codec_create()
1742 "disabling it...\n", pci_name(chip->pci), c); in azx_codec_create()
1743 chip->codec_mask &= ~(1 << c); in azx_codec_create()
1751 azx_stop_chip(chip); in azx_codec_create()
1752 azx_init_chip(chip, 1); in azx_codec_create()
1761 if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) { in azx_codec_create()
1763 pci_name(chip->pci)); in azx_codec_create()
1764 chip->bus->sync_write = 1; in azx_codec_create()
1765 chip->bus->allow_bus_reset = 1; in azx_codec_create()
1770 if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { in azx_codec_create()
1772 err = snd_hda_codec_new(chip->bus, c, &codec); in azx_codec_create()
1775 codec->jackpoll_interval = get_jackpoll_interval(chip); in azx_codec_create()
1776 codec->beep_mode = chip->beep_mode; in azx_codec_create()
1781 snd_printk(KERN_ERR SFX "%s: no codecs initialized\n", pci_name(chip->pci)); in azx_codec_create()
1788 static int azx_codec_configure(struct azx *chip) in azx_codec_configure() argument
1791 list_for_each_entry(codec, &chip->bus->codec_list, list) { in azx_codec_configure()
1804 azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream) in azx_assign_device() argument
1813 dev = chip->playback_index_offset; in azx_assign_device()
1814 nums = chip->playback_streams; in azx_assign_device()
1816 dev = chip->capture_index_offset; in azx_assign_device()
1817 nums = chip->capture_streams; in azx_assign_device()
1820 struct azx_dev *azx_dev = &chip->azx_dev[dev]; in azx_assign_device()
1853 struct azx *chip = apcm->chip; in azx_cc_read() local
1855 return azx_readl(chip, WALLCLK); in azx_cc_read()
1956 struct azx *chip = apcm->chip; in azx_pcm_open() local
1963 mutex_lock(&chip->open_mutex); in azx_pcm_open()
1964 azx_dev = azx_assign_device(chip, substream); in azx_pcm_open()
1966 mutex_unlock(&chip->open_mutex); in azx_pcm_open()
1982 if (chip->align_buffer_size) in azx_pcm_open()
2006 mutex_unlock(&chip->open_mutex); in azx_pcm_open()
2018 mutex_unlock(&chip->open_mutex); in azx_pcm_open()
2027 spin_lock_irqsave(&chip->reg_lock, flags); in azx_pcm_open()
2030 spin_unlock_irqrestore(&chip->reg_lock, flags); in azx_pcm_open()
2034 mutex_unlock(&chip->open_mutex); in azx_pcm_open()
2042 struct azx *chip = apcm->chip; in azx_pcm_close() local
2046 mutex_lock(&chip->open_mutex); in azx_pcm_close()
2047 spin_lock_irqsave(&chip->reg_lock, flags); in azx_pcm_close()
2050 spin_unlock_irqrestore(&chip->reg_lock, flags); in azx_pcm_close()
2054 mutex_unlock(&chip->open_mutex); in azx_pcm_close()
2062 struct azx *chip = apcm->chip; in azx_pcm_hw_params() local
2072 mark_runtime_wc(chip, azx_dev, substream, false); in azx_pcm_hw_params()
2080 mark_runtime_wc(chip, azx_dev, substream, true); in azx_pcm_hw_params()
2090 struct azx *chip = apcm->chip; in azx_pcm_hw_free() local
2106 mark_runtime_wc(chip, azx_dev, substream, false); in azx_pcm_hw_free()
2115 struct azx *chip = apcm->chip; in azx_pcm_prepare() local
2131 azx_stream_reset(chip, azx_dev); in azx_pcm_prepare()
2140 pci_name(chip->pci), runtime->rate, runtime->channels, runtime->format); in azx_pcm_prepare()
2149 pci_name(chip->pci), bufsize, format_val); in azx_pcm_prepare()
2159 err = azx_setup_periods(chip, substream, azx_dev); in azx_pcm_prepare()
2167 azx_setup_controller(chip, azx_dev); in azx_pcm_prepare()
2175 if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) && in azx_pcm_prepare()
2176 stream_tag > chip->capture_streams) in azx_pcm_prepare()
2177 stream_tag -= chip->capture_streams; in azx_pcm_prepare()
2191 struct azx *chip = apcm->chip; in azx_pcm_trigger() local
2198 trace_azx_pcm_trigger(chip, azx_dev, cmd); in azx_pcm_trigger()
2228 spin_lock(&chip->reg_lock); in azx_pcm_trigger()
2231 if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) in azx_pcm_trigger()
2232 azx_writel(chip, OLD_SSYNC, in azx_pcm_trigger()
2233 azx_readl(chip, OLD_SSYNC) | sbits); in azx_pcm_trigger()
2235 azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) | sbits); in azx_pcm_trigger()
2242 azx_dev->start_wallclk = azx_readl(chip, WALLCLK); in azx_pcm_trigger()
2246 azx_stream_start(chip, azx_dev); in azx_pcm_trigger()
2248 azx_stream_stop(chip, azx_dev); in azx_pcm_trigger()
2252 spin_unlock(&chip->reg_lock); in azx_pcm_trigger()
2286 spin_lock(&chip->reg_lock); in azx_pcm_trigger()
2288 if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) in azx_pcm_trigger()
2289 azx_writel(chip, OLD_SSYNC, in azx_pcm_trigger()
2290 azx_readl(chip, OLD_SSYNC) & ~sbits); in azx_pcm_trigger()
2292 azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) & ~sbits); in azx_pcm_trigger()
2309 spin_unlock(&chip->reg_lock); in azx_pcm_trigger()
2314 static unsigned int azx_via_get_position(struct azx *chip, in azx_via_get_position() argument
2337 fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET); in azx_via_get_position()
2369 static unsigned int azx_get_position(struct azx *chip, in azx_get_position() argument
2380 switch (chip->position_fix[stream]) { in azx_get_position()
2386 pos = azx_via_get_position(chip, azx_dev); in azx_get_position()
2391 if (with_check && chip->position_fix[stream] == POS_FIX_AUTO) { in azx_get_position()
2396 chip->position_fix[stream] = POS_FIX_LPIB; in azx_get_position()
2399 chip->position_fix[stream] = POS_FIX_POSBUF; in azx_get_position()
2409 chip->position_fix[stream] == POS_FIX_POSBUF && in azx_get_position()
2410 (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) { in azx_get_position()
2422 pci_name(chip->pci), delay, azx_dev->period_bytes); in azx_get_position()
2424 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY; in azx_get_position()
2436 trace_azx_get_position(chip, azx_dev, pos, delay); in azx_get_position()
2443 struct azx *chip = apcm->chip; in azx_pcm_pointer() local
2446 azx_get_position(chip, azx_dev, false)); in azx_pcm_pointer()
2458 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) in azx_position_ok() argument
2463 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk; in azx_position_ok()
2467 pos = azx_get_position(chip, azx_dev, true); in azx_position_ok()
2475 return bdl_pos_adj[chip->dev_index] ? 0 : -1; in azx_position_ok()
2485 struct azx *chip = container_of(work, struct azx, irq_pending_work); in azx_irq_pending_work() local
2488 if (!chip->irq_pending_warned) { in azx_irq_pending_work()
2492 chip->card->number); in azx_irq_pending_work()
2493 chip->irq_pending_warned = 1; in azx_irq_pending_work()
2498 spin_lock_irq(&chip->reg_lock); in azx_irq_pending_work()
2499 for (i = 0; i < chip->num_streams; i++) { in azx_irq_pending_work()
2500 struct azx_dev *azx_dev = &chip->azx_dev[i]; in azx_irq_pending_work()
2505 ok = azx_position_ok(chip, azx_dev); in azx_irq_pending_work()
2508 spin_unlock(&chip->reg_lock); in azx_irq_pending_work()
2510 spin_lock(&chip->reg_lock); in azx_irq_pending_work()
2516 spin_unlock_irq(&chip->reg_lock); in azx_irq_pending_work()
2524 static void azx_clear_irq_pending(struct azx *chip) in azx_clear_irq_pending() argument
2528 spin_lock_irq(&chip->reg_lock); in azx_clear_irq_pending()
2529 for (i = 0; i < chip->num_streams; i++) in azx_clear_irq_pending()
2530 chip->azx_dev[i].irq_pending = 0; in azx_clear_irq_pending()
2531 spin_unlock_irq(&chip->reg_lock); in azx_clear_irq_pending()
2539 struct azx *chip = apcm->chip; in azx_pcm_mmap() local
2540 if (!azx_snoop(chip)) in azx_pcm_mmap()
2577 struct azx *chip = bus->private_data; in azx_attach_pcm_stream() local
2584 list_for_each_entry(apcm, &chip->pcm_list, list) { in azx_attach_pcm_stream()
2587 pci_name(chip->pci), pcm_dev); in azx_attach_pcm_stream()
2591 err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, in azx_attach_pcm_stream()
2601 apcm->chip = chip; in azx_attach_pcm_stream()
2608 list_add_tail(&apcm->list, &chip->pcm_list); in azx_attach_pcm_stream()
2620 snd_dma_pci_data(chip->pci), in azx_attach_pcm_stream()
2628 static int azx_mixer_create(struct azx *chip) in azx_mixer_create() argument
2630 return snd_hda_build_controls(chip->bus); in azx_mixer_create()
2637 static int azx_init_stream(struct azx *chip) in azx_init_stream() argument
2645 for (i = 0; i < chip->num_streams; i++) { in azx_init_stream()
2646 struct azx_dev *azx_dev = &chip->azx_dev[i]; in azx_init_stream()
2647 azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8); in azx_init_stream()
2649 azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80); in azx_init_stream()
2660 static int azx_acquire_irq(struct azx *chip, int do_disconnect) in azx_acquire_irq() argument
2662 if (request_irq(chip->pci->irq, azx_interrupt, in azx_acquire_irq()
2663 chip->msi ? 0 : IRQF_SHARED, in azx_acquire_irq()
2664 KBUILD_MODNAME, chip)) { in azx_acquire_irq()
2666 "disabling device\n", chip->pci->irq); in azx_acquire_irq()
2668 snd_card_disconnect(chip->card); in azx_acquire_irq()
2671 chip->irq = chip->pci->irq; in azx_acquire_irq()
2672 pci_intx(chip->pci, !chip->msi); in azx_acquire_irq()
2677 static void azx_stop_chip(struct azx *chip) in azx_stop_chip() argument
2679 if (!chip->initialized) in azx_stop_chip()
2683 azx_int_disable(chip); in azx_stop_chip()
2684 azx_int_clear(chip); in azx_stop_chip()
2687 azx_free_cmd_io(chip); in azx_stop_chip()
2690 azx_writel(chip, DPLBASE, 0); in azx_stop_chip()
2691 azx_writel(chip, DPUBASE, 0); in azx_stop_chip()
2693 chip->initialized = 0; in azx_stop_chip()
2703 azx_get_dsp_loader_dev(struct azx *chip) in azx_get_dsp_loader_dev() argument
2705 return &chip->azx_dev[chip->playback_index_offset]; in azx_get_dsp_loader_dev()
2713 struct azx *chip = bus->private_data; in azx_load_dsp_prepare() local
2717 azx_dev = azx_get_dsp_loader_dev(chip); in azx_load_dsp_prepare()
2720 spin_lock_irq(&chip->reg_lock); in azx_load_dsp_prepare()
2722 spin_unlock_irq(&chip->reg_lock); in azx_load_dsp_prepare()
2727 chip->saved_azx_dev = *azx_dev; in azx_load_dsp_prepare()
2729 spin_unlock_irq(&chip->reg_lock); in azx_load_dsp_prepare()
2732 snd_dma_pci_data(chip->pci), in azx_load_dsp_prepare()
2737 mark_pages_wc(chip, bufp, true); in azx_load_dsp_prepare()
2742 azx_stream_reset(chip, azx_dev); in azx_load_dsp_prepare()
2750 err = setup_bdle(chip, bufp, azx_dev, &bdl, 0, byte_size, 0); in azx_load_dsp_prepare()
2754 azx_setup_controller(chip, azx_dev); in azx_load_dsp_prepare()
2759 mark_pages_wc(chip, bufp, false); in azx_load_dsp_prepare()
2762 spin_lock_irq(&chip->reg_lock); in azx_load_dsp_prepare()
2764 *azx_dev = chip->saved_azx_dev; in azx_load_dsp_prepare()
2766 spin_unlock_irq(&chip->reg_lock); in azx_load_dsp_prepare()
2774 struct azx *chip = bus->private_data; in azx_load_dsp_trigger() local
2775 struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); in azx_load_dsp_trigger()
2778 azx_stream_start(chip, azx_dev); in azx_load_dsp_trigger()
2780 azx_stream_stop(chip, azx_dev); in azx_load_dsp_trigger()
2787 struct azx *chip = bus->private_data; in azx_load_dsp_cleanup() local
2788 struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); in azx_load_dsp_cleanup()
2802 mark_pages_wc(chip, dmab, false); in azx_load_dsp_cleanup()
2806 spin_lock_irq(&chip->reg_lock); in azx_load_dsp_cleanup()
2808 *azx_dev = chip->saved_azx_dev; in azx_load_dsp_cleanup()
2810 spin_unlock_irq(&chip->reg_lock); in azx_load_dsp_cleanup()
2819 struct azx *chip = bus->private_data; in azx_power_notify() local
2821 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME)) in azx_power_notify()
2825 pm_runtime_get_sync(&chip->pci->dev); in azx_power_notify()
2827 pm_runtime_put_sync(&chip->pci->dev); in azx_power_notify()
2833 static void azx_add_card_list(struct azx *chip) in azx_add_card_list() argument
2836 list_add(&chip->list, &card_list); in azx_add_card_list()
2840 static void azx_del_card_list(struct azx *chip) in azx_del_card_list() argument
2843 list_del_init(&chip->list); in azx_del_card_list()
2850 struct azx *chip; in param_set_xint() local
2859 list_for_each_entry(chip, &card_list, list) { in param_set_xint()
2860 if (!chip->bus || chip->disabled) in param_set_xint()
2862 list_for_each_entry(c, &chip->bus->codec_list, list) in param_set_xint()
2869 #define azx_add_card_list(chip) /* NOP */ argument
2870 #define azx_del_card_list(chip) /* NOP */ argument
2881 struct azx *chip = card->private_data; in azx_suspend() local
2884 if (chip->disabled) in azx_suspend()
2888 azx_clear_irq_pending(chip); in azx_suspend()
2889 list_for_each_entry(p, &chip->pcm_list, list) in azx_suspend()
2891 if (chip->initialized) in azx_suspend()
2892 snd_hda_suspend(chip->bus); in azx_suspend()
2893 azx_stop_chip(chip); in azx_suspend()
2894 if (chip->irq >= 0) { in azx_suspend()
2895 free_irq(chip->irq, chip); in azx_suspend()
2896 chip->irq = -1; in azx_suspend()
2898 if (chip->msi) in azx_suspend()
2899 pci_disable_msi(chip->pci); in azx_suspend()
2910 struct azx *chip = card->private_data; in azx_resume() local
2912 if (chip->disabled) in azx_resume()
2924 if (chip->msi) in azx_resume()
2926 chip->msi = 0; in azx_resume()
2927 if (azx_acquire_irq(chip, 1) < 0) in azx_resume()
2929 azx_init_pci(chip); in azx_resume()
2931 azx_init_chip(chip, 1); in azx_resume()
2933 snd_hda_resume(chip->bus); in azx_resume()
2943 struct azx *chip = card->private_data; in azx_runtime_suspend() local
2945 azx_stop_chip(chip); in azx_runtime_suspend()
2946 azx_clear_irq_pending(chip); in azx_runtime_suspend()
2953 struct azx *chip = card->private_data; in azx_runtime_resume() local
2955 azx_init_pci(chip); in azx_runtime_resume()
2956 azx_init_chip(chip, 1); in azx_runtime_resume()
2963 struct azx *chip = card->private_data; in azx_runtime_idle() local
2966 !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME)) in azx_runtime_idle()
2991 struct azx *chip = container_of(nb, struct azx, reboot_notifier); in azx_halt() local
2992 snd_hda_bus_reboot_notify(chip->bus); in azx_halt()
2993 azx_stop_chip(chip); in azx_halt()
2997 static void azx_notifier_register(struct azx *chip) in azx_notifier_register() argument
2999 chip->reboot_notifier.notifier_call = azx_halt; in azx_notifier_register()
3000 register_reboot_notifier(&chip->reboot_notifier); in azx_notifier_register()
3003 static void azx_notifier_unregister(struct azx *chip) in azx_notifier_unregister() argument
3005 if (chip->reboot_notifier.notifier_call) in azx_notifier_unregister()
3006 unregister_reboot_notifier(&chip->reboot_notifier); in azx_notifier_unregister()
3009 static int azx_first_init(struct azx *chip);
3010 static int azx_probe_continue(struct azx *chip);
3019 struct azx *chip = card->private_data; in azx_vs_set_state() local
3022 wait_for_completion(&chip->probe_wait); in azx_vs_set_state()
3023 if (chip->init_failed) in azx_vs_set_state()
3027 if (chip->disabled == disabled) in azx_vs_set_state()
3030 if (!chip->bus) { in azx_vs_set_state()
3031 chip->disabled = disabled; in azx_vs_set_state()
3035 pci_name(chip->pci)); in azx_vs_set_state()
3036 if (azx_first_init(chip) < 0 || in azx_vs_set_state()
3037 azx_probe_continue(chip) < 0) { in azx_vs_set_state()
3040 pci_name(chip->pci)); in azx_vs_set_state()
3041 chip->init_failed = true; in azx_vs_set_state()
3046 "%s: %s via VGA-switcheroo\n", pci_name(chip->pci), in azx_vs_set_state()
3050 chip->disabled = true; in azx_vs_set_state()
3051 if (snd_hda_lock_devices(chip->bus)) in azx_vs_set_state()
3053 pci_name(chip->pci)); in azx_vs_set_state()
3055 snd_hda_unlock_devices(chip->bus); in azx_vs_set_state()
3056 chip->disabled = false; in azx_vs_set_state()
3065 struct azx *chip = card->private_data; in azx_vs_can_switch() local
3067 wait_for_completion(&chip->probe_wait); in azx_vs_can_switch()
3068 if (chip->init_failed) in azx_vs_can_switch()
3070 if (chip->disabled || !chip->bus) in azx_vs_can_switch()
3072 if (snd_hda_lock_devices(chip->bus)) in azx_vs_can_switch()
3074 snd_hda_unlock_devices(chip->bus); in azx_vs_can_switch()
3078 static void init_vga_switcheroo(struct azx *chip) in init_vga_switcheroo() argument
3080 struct pci_dev *p = get_bound_vga(chip->pci); in init_vga_switcheroo()
3084 pci_name(chip->pci)); in init_vga_switcheroo()
3085 chip->use_vga_switcheroo = 1; in init_vga_switcheroo()
3095 static int register_vga_switcheroo(struct azx *chip) in register_vga_switcheroo() argument
3099 if (!chip->use_vga_switcheroo) in register_vga_switcheroo()
3104 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops, in register_vga_switcheroo()
3106 chip->bus != NULL); in register_vga_switcheroo()
3109 chip->vga_switcheroo_registered = 1; in register_vga_switcheroo()
3113 #define init_vga_switcheroo(chip) /* NOP */ argument
3114 #define register_vga_switcheroo(chip) 0 argument
3121 static int azx_free(struct azx *chip) in azx_free() argument
3125 azx_del_card_list(chip); in azx_free()
3127 azx_notifier_unregister(chip); in azx_free()
3129 chip->init_failed = 1; /* to be sure */ in azx_free()
3130 complete_all(&chip->probe_wait); in azx_free()
3132 if (use_vga_switcheroo(chip)) { in azx_free()
3133 if (chip->disabled && chip->bus) in azx_free()
3134 snd_hda_unlock_devices(chip->bus); in azx_free()
3135 if (chip->vga_switcheroo_registered) in azx_free()
3136 vga_switcheroo_unregister_client(chip->pci); in azx_free()
3139 if (chip->initialized) { in azx_free()
3140 azx_clear_irq_pending(chip); in azx_free()
3141 for (i = 0; i < chip->num_streams; i++) in azx_free()
3142 azx_stream_stop(chip, &chip->azx_dev[i]); in azx_free()
3143 azx_stop_chip(chip); in azx_free()
3146 if (chip->irq >= 0) in azx_free()
3147 free_irq(chip->irq, (void*)chip); in azx_free()
3148 if (chip->msi) in azx_free()
3149 pci_disable_msi(chip->pci); in azx_free()
3150 if (chip->remap_addr) in azx_free()
3151 iounmap(chip->remap_addr); in azx_free()
3153 if (chip->azx_dev) { in azx_free()
3154 for (i = 0; i < chip->num_streams; i++) in azx_free()
3155 if (chip->azx_dev[i].bdl.area) { in azx_free()
3156 mark_pages_wc(chip, &chip->azx_dev[i].bdl, false); in azx_free()
3157 snd_dma_free_pages(&chip->azx_dev[i].bdl); in azx_free()
3160 if (chip->rb.area) { in azx_free()
3161 mark_pages_wc(chip, &chip->rb, false); in azx_free()
3162 snd_dma_free_pages(&chip->rb); in azx_free()
3164 if (chip->posbuf.area) { in azx_free()
3165 mark_pages_wc(chip, &chip->posbuf, false); in azx_free()
3166 snd_dma_free_pages(&chip->posbuf); in azx_free()
3168 if (chip->region_requested) in azx_free()
3169 pci_release_regions(chip->pci); in azx_free()
3170 pci_disable_device(chip->pci); in azx_free()
3171 kfree(chip->azx_dev); in azx_free()
3173 if (chip->fw) in azx_free()
3174 release_firmware(chip->fw); in azx_free()
3176 kfree(chip); in azx_free()
3248 static int check_position_fix(struct azx *chip, int fix) in check_position_fix() argument
3261 q = snd_pci_quirk_lookup(chip->pci, position_fix_list); in check_position_fix()
3271 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) { in check_position_fix()
3272 snd_printd(SFX "%s: Using VIACOMBO position fix\n", pci_name(chip->pci)); in check_position_fix()
3275 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) { in check_position_fix()
3276 snd_printd(SFX "%s: Using LPIB position fix\n", pci_name(chip->pci)); in check_position_fix()
3306 static void check_probe_mask(struct azx *chip, int dev) in check_probe_mask() argument
3310 chip->codec_probe_mask = probe_mask[dev]; in check_probe_mask()
3311 if (chip->codec_probe_mask == -1) { in check_probe_mask()
3312 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list); in check_probe_mask()
3318 chip->codec_probe_mask = q->value; in check_probe_mask()
3323 if (chip->codec_probe_mask != -1 && in check_probe_mask()
3324 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) { in check_probe_mask()
3325 chip->codec_mask = chip->codec_probe_mask & 0xff; in check_probe_mask()
3327 chip->codec_mask); in check_probe_mask()
3343 static void check_msi(struct azx *chip) in check_msi() argument
3348 chip->msi = !!enable_msi; in check_msi()
3351 chip->msi = 1; /* enable MSI as default */ in check_msi()
3352 q = snd_pci_quirk_lookup(chip->pci, msi_black_list); in check_msi()
3357 chip->msi = q->value; in check_msi()
3362 if (chip->driver_caps & AZX_DCAPS_NO_MSI) { in check_msi()
3364 chip->msi = 0; in check_msi()
3369 static void azx_check_snoop_available(struct azx *chip) in azx_check_snoop_available() argument
3371 bool snoop = chip->snoop; in azx_check_snoop_available()
3373 switch (chip->driver_type) { in azx_check_snoop_available()
3380 pci_read_config_byte(chip->pci, 0x42, &val); in azx_check_snoop_available()
3381 if (!(val & 0x80) && chip->pci->revision == 0x30) in azx_check_snoop_available()
3394 if (snoop != chip->snoop) { in azx_check_snoop_available()
3396 pci_name(chip->pci), snoop ? "snoop" : "non-snoop"); in azx_check_snoop_available()
3397 chip->snoop = snoop; in azx_check_snoop_available()
3411 struct azx *chip; in azx_create() local
3420 chip = kzalloc(sizeof(*chip), GFP_KERNEL); in azx_create()
3421 if (!chip) { in azx_create()
3427 spin_lock_init(&chip->reg_lock); in azx_create()
3428 mutex_init(&chip->open_mutex); in azx_create()
3429 chip->card = card; in azx_create()
3430 chip->pci = pci; in azx_create()
3431 chip->irq = -1; in azx_create()
3432 chip->driver_caps = driver_caps; in azx_create()
3433 chip->driver_type = driver_caps & 0xff; in azx_create()
3434 check_msi(chip); in azx_create()
3435 chip->dev_index = dev; in azx_create()
3436 INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work); in azx_create()
3437 INIT_LIST_HEAD(&chip->pcm_list); in azx_create()
3438 INIT_LIST_HEAD(&chip->list); in azx_create()
3439 init_vga_switcheroo(chip); in azx_create()
3440 init_completion(&chip->probe_wait); in azx_create()
3442 chip->position_fix[0] = chip->position_fix[1] = in azx_create()
3443 check_position_fix(chip, position_fix[dev]); in azx_create()
3445 if (chip->position_fix[0] == POS_FIX_COMBO) { in azx_create()
3446 chip->position_fix[0] = POS_FIX_LPIB; in azx_create()
3447 chip->position_fix[1] = POS_FIX_AUTO; in azx_create()
3450 check_probe_mask(chip, dev); in azx_create()
3452 chip->single_cmd = single_cmd; in azx_create()
3453 chip->snoop = hda_snoop; in azx_create()
3454 azx_check_snoop_available(chip); in azx_create()
3457 switch (chip->driver_type) { in azx_create()
3468 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); in azx_create()
3471 pci_name(chip->pci)); in azx_create()
3472 azx_free(chip); in azx_create()
3476 *rchip = chip; in azx_create()
3480 static int azx_first_init(struct azx *chip) in azx_first_init() argument
3482 int dev = chip->dev_index; in azx_first_init()
3483 struct pci_dev *pci = chip->pci; in azx_first_init()
3484 struct snd_card *card = chip->card; in azx_first_init()
3490 if (chip->driver_type == AZX_DRIVER_ULI) { in azx_first_init()
3501 chip->region_requested = 1; in azx_first_init()
3503 chip->addr = pci_resource_start(pci, 0); in azx_first_init()
3504 chip->remap_addr = pci_ioremap_bar(pci, 0); in azx_first_init()
3505 if (chip->remap_addr == NULL) { in azx_first_init()
3506 snd_printk(KERN_ERR SFX "%s: ioremap error\n", pci_name(chip->pci)); in azx_first_init()
3510 if (chip->msi) in azx_first_init()
3512 chip->msi = 0; in azx_first_init()
3514 if (azx_acquire_irq(chip, 0) < 0) in azx_first_init()
3518 synchronize_irq(chip->irq); in azx_first_init()
3520 gcap = azx_readw(chip, GCAP); in azx_first_init()
3521 snd_printdd(SFX "%s: chipset global capabilities = 0x%x\n", pci_name(chip->pci), gcap); in azx_first_init()
3524 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) { in azx_first_init()
3537 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) { in azx_first_init()
3538 snd_printd(SFX "%s: Disabling 64bit DMA\n", pci_name(chip->pci)); in azx_first_init()
3544 chip->align_buffer_size = !!align_buffer_size; in azx_first_init()
3546 if (chip->driver_caps & AZX_DCAPS_BUFSIZE) in azx_first_init()
3547 chip->align_buffer_size = 0; in azx_first_init()
3548 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE) in azx_first_init()
3549 chip->align_buffer_size = 1; in azx_first_init()
3551 chip->align_buffer_size = 1; in azx_first_init()
3565 chip->capture_streams = (gcap >> 8) & 0x0f; in azx_first_init()
3566 chip->playback_streams = (gcap >> 12) & 0x0f; in azx_first_init()
3567 if (!chip->playback_streams && !chip->capture_streams) { in azx_first_init()
3570 switch (chip->driver_type) { in azx_first_init()
3572 chip->playback_streams = ULI_NUM_PLAYBACK; in azx_first_init()
3573 chip->capture_streams = ULI_NUM_CAPTURE; in azx_first_init()
3577 chip->playback_streams = ATIHDMI_NUM_PLAYBACK; in azx_first_init()
3578 chip->capture_streams = ATIHDMI_NUM_CAPTURE; in azx_first_init()
3582 chip->playback_streams = ICH6_NUM_PLAYBACK; in azx_first_init()
3583 chip->capture_streams = ICH6_NUM_CAPTURE; in azx_first_init()
3587 chip->capture_index_offset = 0; in azx_first_init()
3588 chip->playback_index_offset = chip->capture_streams; in azx_first_init()
3589 chip->num_streams = chip->playback_streams + chip->capture_streams; in azx_first_init()
3590 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), in azx_first_init()
3592 if (!chip->azx_dev) { in azx_first_init()
3593 snd_printk(KERN_ERR SFX "%s: cannot malloc azx_dev\n", pci_name(chip->pci)); in azx_first_init()
3597 for (i = 0; i < chip->num_streams; i++) { in azx_first_init()
3598 dsp_lock_init(&chip->azx_dev[i]); in azx_first_init()
3601 snd_dma_pci_data(chip->pci), in azx_first_init()
3602 BDL_SIZE, &chip->azx_dev[i].bdl); in azx_first_init()
3604 snd_printk(KERN_ERR SFX "%s: cannot allocate BDL\n", pci_name(chip->pci)); in azx_first_init()
3607 mark_pages_wc(chip, &chip->azx_dev[i].bdl, true); in azx_first_init()
3611 snd_dma_pci_data(chip->pci), in azx_first_init()
3612 chip->num_streams * 8, &chip->posbuf); in azx_first_init()
3614 snd_printk(KERN_ERR SFX "%s: cannot allocate posbuf\n", pci_name(chip->pci)); in azx_first_init()
3617 mark_pages_wc(chip, &chip->posbuf, true); in azx_first_init()
3619 err = azx_alloc_cmd_io(chip); in azx_first_init()
3624 azx_init_stream(chip); in azx_first_init()
3627 azx_init_pci(chip); in azx_first_init()
3628 azx_init_chip(chip, (probe_only[dev] & 2) == 0); in azx_first_init()
3631 if (!chip->codec_mask) { in azx_first_init()
3632 snd_printk(KERN_ERR SFX "%s: no codecs found!\n", pci_name(chip->pci)); in azx_first_init()
3637 strlcpy(card->shortname, driver_short_names[chip->driver_type], in azx_first_init()
3641 card->shortname, chip->addr, chip->irq); in azx_first_init()
3646 static void power_down_all_codecs(struct azx *chip) in power_down_all_codecs() argument
3653 list_for_each_entry(codec, &chip->bus->codec_list, list) { in power_down_all_codecs()
3664 struct azx *chip = card->private_data; in azx_firmware_cb() local
3665 struct pci_dev *pci = chip->pci; in azx_firmware_cb()
3669 pci_name(chip->pci)); in azx_firmware_cb()
3673 chip->fw = fw; in azx_firmware_cb()
3674 if (!chip->disabled) { in azx_firmware_cb()
3676 if (azx_probe_continue(chip)) in azx_firmware_cb()
3692 struct azx *chip; in azx_probe() local
3711 err = azx_create(card, pci, dev, pci_id->driver_data, &chip); in azx_probe()
3714 card->private_data = chip; in azx_probe()
3718 err = register_vga_switcheroo(chip); in azx_probe()
3729 chip->disabled = true; in azx_probe()
3732 probe_now = !chip->disabled; in azx_probe()
3734 err = azx_first_init(chip); in azx_probe()
3753 err = azx_probe_continue(chip); in azx_probe()
3762 complete_all(&chip->probe_wait); in azx_probe()
3771 static int azx_probe_continue(struct azx *chip) in azx_probe_continue() argument
3773 int dev = chip->dev_index; in azx_probe_continue()
3777 chip->beep_mode = beep_mode[dev]; in azx_probe_continue()
3781 err = azx_codec_create(chip, model[dev]); in azx_probe_continue()
3785 if (chip->fw) { in azx_probe_continue()
3786 err = snd_hda_load_patch(chip->bus, chip->fw->size, in azx_probe_continue()
3787 chip->fw->data); in azx_probe_continue()
3791 release_firmware(chip->fw); /* no longer needed */ in azx_probe_continue()
3792 chip->fw = NULL; in azx_probe_continue()
3797 err = azx_codec_configure(chip); in azx_probe_continue()
3803 err = snd_hda_build_pcms(chip->bus); in azx_probe_continue()
3808 err = azx_mixer_create(chip); in azx_probe_continue()
3812 err = snd_card_register(chip->card); in azx_probe_continue()
3816 chip->running = 1; in azx_probe_continue()
3817 power_down_all_codecs(chip); in azx_probe_continue()
3818 azx_notifier_register(chip); in azx_probe_continue()
3819 azx_add_card_list(chip); in azx_probe_continue()
3824 chip->init_failed = 1; in azx_probe_continue()