1 /*
2 * arch/arm/mach-at91/include/mach/cpu.h
3 *
4 * Copyright (C) 2006 SAN People
5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13
14 #ifndef __MACH_CPU_H__
15 #define __MACH_CPU_H__
16
17 #define ARCH_ID_AT91RM9200 0x09290780
18 #define ARCH_ID_AT91SAM9260 0x019803a0
19 #define ARCH_ID_AT91SAM9261 0x019703a0
20 #define ARCH_ID_AT91SAM9263 0x019607a0
21 #define ARCH_ID_AT91SAM9G10 0x019903a0
22 #define ARCH_ID_AT91SAM9G20 0x019905a0
23 #define ARCH_ID_AT91SAM9RL64 0x019b03a0
24 #define ARCH_ID_AT91SAM9G45 0x819b05a0
25 #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
26 #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
27 #define ARCH_ID_AT91SAM9X5 0x819a05a0
28 #define ARCH_ID_AT91SAM9N12 0x819a07a0
29
30 #define ARCH_ID_AT91SAM9XE128 0x329973a0
31 #define ARCH_ID_AT91SAM9XE256 0x329a93a0
32 #define ARCH_ID_AT91SAM9XE512 0x329aa3a0
33
34 #define ARCH_ID_AT91M40800 0x14080044
35 #define ARCH_ID_AT91R40807 0x44080746
36 #define ARCH_ID_AT91M40807 0x14080745
37 #define ARCH_ID_AT91R40008 0x44000840
38
39 #define ARCH_ID_SAMA5D3 0x8A5C07C0
40
41 #define ARCH_EXID_AT91SAM9M11 0x00000001
42 #define ARCH_EXID_AT91SAM9M10 0x00000002
43 #define ARCH_EXID_AT91SAM9G46 0x00000003
44 #define ARCH_EXID_AT91SAM9G45 0x00000004
45
46 #define ARCH_EXID_AT91SAM9G15 0x00000000
47 #define ARCH_EXID_AT91SAM9G35 0x00000001
48 #define ARCH_EXID_AT91SAM9X35 0x00000002
49 #define ARCH_EXID_AT91SAM9G25 0x00000003
50 #define ARCH_EXID_AT91SAM9X25 0x00000004
51
52 #define ARCH_EXID_SAMA5D31 0x00444300
53 #define ARCH_EXID_SAMA5D33 0x00414300
54 #define ARCH_EXID_SAMA5D34 0x00414301
55 #define ARCH_EXID_SAMA5D35 0x00584300
56
57 #define ARCH_FAMILY_AT91X92 0x09200000
58 #define ARCH_FAMILY_AT91SAM9 0x01900000
59 #define ARCH_FAMILY_AT91SAM9XE 0x02900000
60
61 /* RM9200 type */
62 #define ARCH_REVISON_9200_BGA (0 << 0)
63 #define ARCH_REVISON_9200_PQFP (1 << 0)
64
65 #ifndef __ASSEMBLY__
66 enum at91_soc_type {
67 /* 920T */
68 AT91_SOC_RM9200,
69
70 /* SAM92xx */
71 AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
72
73 /* SAM9Gxx */
74 AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45,
75
76 /* SAM9RL */
77 AT91_SOC_SAM9RL,
78
79 /* SAM9X5 */
80 AT91_SOC_SAM9X5,
81
82 /* SAM9N12 */
83 AT91_SOC_SAM9N12,
84
85 /* SAMA5D3 */
86 AT91_SOC_SAMA5D3,
87
88 /* Unknown type */
89 AT91_SOC_UNKNOWN,
90 };
91
92 enum at91_soc_subtype {
93 /* RM9200 */
94 AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
95
96 /* SAM9260 */
97 AT91_SOC_SAM9XE,
98
99 /* SAM9G45 */
100 AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11,
101
102 /* SAM9X5 */
103 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35,
104 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25,
105
106 /* SAMA5D3 */
107 AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
108 AT91_SOC_SAMA5D35,
109
110 /* No subtype for this SoC */
111 AT91_SOC_SUBTYPE_NONE,
112
113 /* Unknown subtype */
114 AT91_SOC_SUBTYPE_UNKNOWN,
115 };
116
117 struct at91_socinfo {
118 unsigned int type, subtype;
119 unsigned int cidr, exid;
120 };
121
122 extern struct at91_socinfo at91_soc_initdata;
123 const char *at91_get_soc_type(struct at91_socinfo *c);
124 const char *at91_get_soc_subtype(struct at91_socinfo *c);
125
at91_soc_is_detected(void)126 static inline int at91_soc_is_detected(void)
127 {
128 return at91_soc_initdata.type != AT91_SOC_UNKNOWN;
129 }
130
131 #ifdef CONFIG_SOC_AT91RM9200
132 #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
133 #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
134 #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
135 #else
136 #define cpu_is_at91rm9200() (0)
137 #define cpu_is_at91rm9200_bga() (0)
138 #define cpu_is_at91rm9200_pqfp() (0)
139 #endif
140
141 #ifdef CONFIG_SOC_AT91SAM9260
142 #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
143 #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
144 #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
145 #else
146 #define cpu_is_at91sam9xe() (0)
147 #define cpu_is_at91sam9260() (0)
148 #define cpu_is_at91sam9g20() (0)
149 #endif
150
151 #ifdef CONFIG_SOC_AT91SAM9261
152 #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
153 #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
154 #else
155 #define cpu_is_at91sam9261() (0)
156 #define cpu_is_at91sam9g10() (0)
157 #endif
158
159 #ifdef CONFIG_SOC_AT91SAM9263
160 #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
161 #else
162 #define cpu_is_at91sam9263() (0)
163 #endif
164
165 #ifdef CONFIG_SOC_AT91SAM9RL
166 #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
167 #else
168 #define cpu_is_at91sam9rl() (0)
169 #endif
170
171 #ifdef CONFIG_SOC_AT91SAM9G45
172 #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
173 #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
174 #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
175 #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46)
176 #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11)
177 #else
178 #define cpu_is_at91sam9g45() (0)
179 #define cpu_is_at91sam9g45es() (0)
180 #define cpu_is_at91sam9m10() (0)
181 #define cpu_is_at91sam9g46() (0)
182 #define cpu_is_at91sam9m11() (0)
183 #endif
184
185 #ifdef CONFIG_SOC_AT91SAM9X5
186 #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
187 #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
188 #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
189 #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35)
190 #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25)
191 #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25)
192 #else
193 #define cpu_is_at91sam9x5() (0)
194 #define cpu_is_at91sam9g15() (0)
195 #define cpu_is_at91sam9g35() (0)
196 #define cpu_is_at91sam9x35() (0)
197 #define cpu_is_at91sam9g25() (0)
198 #define cpu_is_at91sam9x25() (0)
199 #endif
200
201 #ifdef CONFIG_SOC_AT91SAM9N12
202 #define cpu_is_at91sam9n12() (at91_soc_initdata.type == AT91_SOC_SAM9N12)
203 #else
204 #define cpu_is_at91sam9n12() (0)
205 #endif
206
207 #ifdef CONFIG_SOC_SAMA5D3
208 #define cpu_is_sama5d3() (at91_soc_initdata.type == AT91_SOC_SAMA5D3)
209 #else
210 #define cpu_is_sama5d3() (0)
211 #endif
212
213 /*
214 * Since this is ARM, we will never run on any AVR32 CPU. But these
215 * definitions may reduce clutter in common drivers.
216 */
217 #define cpu_is_at32ap7000() (0)
218 #endif /* __ASSEMBLY__ */
219
220 #endif /* __MACH_CPU_H__ */
221