1 /* 2 * arch/arm/mach-at91/include/mach/at91_st.h 3 * 4 * Copyright (C) 2005 Ivan Kokshaysky 5 * Copyright (C) SAN People 6 * 7 * System Timer (ST) - System peripherals registers. 8 * Based on AT91RM9200 datasheet revision E. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16 #ifndef AT91_ST_H 17 #define AT91_ST_H 18 19 #ifndef __ASSEMBLY__ 20 extern void __iomem *at91_st_base; 21 22 #define at91_st_read(field) \ 23 __raw_readl(at91_st_base + field) 24 25 #define at91_st_write(field, value) \ 26 __raw_writel(value, at91_st_base + field) 27 #else 28 .extern at91_st_base 29 #endif 30 31 #define AT91_ST_CR 0x00 /* Control Register */ 32 #define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ 33 34 #define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */ 35 #define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ 36 37 #define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */ 38 #define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ 39 #define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ 40 #define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ 41 42 #define AT91_ST_RTMR 0x0c /* Real-time Mode Register */ 43 #define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ 44 45 #define AT91_ST_SR 0x10 /* Status Register */ 46 #define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ 47 #define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ 48 #define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ 49 #define AT91_ST_ALMS (1 << 3) /* Alarm Status */ 50 51 #define AT91_ST_IER 0x14 /* Interrupt Enable Register */ 52 #define AT91_ST_IDR 0x18 /* Interrupt Disable Register */ 53 #define AT91_ST_IMR 0x1c /* Interrupt Mask Register */ 54 55 #define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */ 56 #define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ 57 58 #define AT91_ST_CRTR 0x24 /* Current Real-time Register */ 59 #define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ 60 61 #endif 62