1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
7 * Copyright (C) 2005 Maciej W. Rozycki
8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
10 */
11
12 #include <linux/types.h>
13
14 #ifdef CONFIG_EXPORT_UASM
15 #include <linux/export.h>
16 #define __uasminit
17 #define __uasminitdata
18 #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
19 #else
20 #define __uasminit __cpuinit
21 #define __uasminitdata __cpuinitdata
22 #define UASM_EXPORT_SYMBOL(sym)
23 #endif
24
25 #define _UASM_ISA_CLASSIC 0
26 #define _UASM_ISA_MICROMIPS 1
27
28 #ifndef UASM_ISA
29 #ifdef CONFIG_CPU_MICROMIPS
30 #define UASM_ISA _UASM_ISA_MICROMIPS
31 #else
32 #define UASM_ISA _UASM_ISA_CLASSIC
33 #endif
34 #endif
35
36 #if (UASM_ISA == _UASM_ISA_CLASSIC)
37 #ifdef CONFIG_CPU_MICROMIPS
38 #define ISAOPC(op) CL_uasm_i##op
39 #define ISAFUNC(x) CL_##x
40 #else
41 #define ISAOPC(op) uasm_i##op
42 #define ISAFUNC(x) x
43 #endif
44 #elif (UASM_ISA == _UASM_ISA_MICROMIPS)
45 #ifdef CONFIG_CPU_MICROMIPS
46 #define ISAOPC(op) uasm_i##op
47 #define ISAFUNC(x) x
48 #else
49 #define ISAOPC(op) MM_uasm_i##op
50 #define ISAFUNC(x) MM_##x
51 #endif
52 #else
53 #error Unsupported micro-assembler ISA!!!
54 #endif
55
56 #define Ip_u1u2u3(op) \
57 void __uasminit \
58 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
59
60 #define Ip_u2u1u3(op) \
61 void __uasminit \
62 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
63
64 #define Ip_u3u1u2(op) \
65 void __uasminit \
66 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
67
68 #define Ip_u1u2s3(op) \
69 void __uasminit \
70 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
71
72 #define Ip_u2s3u1(op) \
73 void __uasminit \
74 ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
75
76 #define Ip_u2u1s3(op) \
77 void __uasminit \
78 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
79
80 #define Ip_u2u1msbu3(op) \
81 void __uasminit \
82 ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
83 unsigned int d)
84
85 #define Ip_u1u2(op) \
86 void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
87
88 #define Ip_u1s2(op) \
89 void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
90
91 #define Ip_u1(op) void __uasminit ISAOPC(op)(u32 **buf, unsigned int a)
92
93 #define Ip_0(op) void __uasminit ISAOPC(op)(u32 **buf)
94
95 Ip_u2u1s3(_addiu);
96 Ip_u3u1u2(_addu);
97 Ip_u3u1u2(_and);
98 Ip_u2u1u3(_andi);
99 Ip_u1u2s3(_bbit0);
100 Ip_u1u2s3(_bbit1);
101 Ip_u1u2s3(_beq);
102 Ip_u1u2s3(_beql);
103 Ip_u1s2(_bgez);
104 Ip_u1s2(_bgezl);
105 Ip_u1s2(_bltz);
106 Ip_u1s2(_bltzl);
107 Ip_u1u2s3(_bne);
108 Ip_u2s3u1(_cache);
109 Ip_u2u1s3(_daddiu);
110 Ip_u3u1u2(_daddu);
111 Ip_u2u1msbu3(_dins);
112 Ip_u2u1msbu3(_dinsm);
113 Ip_u1u2u3(_dmfc0);
114 Ip_u1u2u3(_dmtc0);
115 Ip_u2u1u3(_drotr);
116 Ip_u2u1u3(_drotr32);
117 Ip_u2u1u3(_dsll);
118 Ip_u2u1u3(_dsll32);
119 Ip_u2u1u3(_dsra);
120 Ip_u2u1u3(_dsrl);
121 Ip_u2u1u3(_dsrl32);
122 Ip_u3u1u2(_dsubu);
123 Ip_0(_eret);
124 Ip_u2u1msbu3(_ext);
125 Ip_u2u1msbu3(_ins);
126 Ip_u1(_j);
127 Ip_u1(_jal);
128 Ip_u1(_jr);
129 Ip_u2s3u1(_ld);
130 Ip_u3u1u2(_ldx);
131 Ip_u2s3u1(_ll);
132 Ip_u2s3u1(_lld);
133 Ip_u1s2(_lui);
134 Ip_u2s3u1(_lw);
135 Ip_u3u1u2(_lwx);
136 Ip_u1u2u3(_mfc0);
137 Ip_u1u2u3(_mtc0);
138 Ip_u3u1u2(_or);
139 Ip_u2u1u3(_ori);
140 Ip_u2s3u1(_pref);
141 Ip_0(_rfe);
142 Ip_u2u1u3(_rotr);
143 Ip_u2s3u1(_sc);
144 Ip_u2s3u1(_scd);
145 Ip_u2s3u1(_sd);
146 Ip_u2u1u3(_sll);
147 Ip_u2u1u3(_sra);
148 Ip_u2u1u3(_srl);
149 Ip_u3u1u2(_subu);
150 Ip_u2s3u1(_sw);
151 Ip_u1(_syscall);
152 Ip_0(_tlbp);
153 Ip_0(_tlbr);
154 Ip_0(_tlbwi);
155 Ip_0(_tlbwr);
156 Ip_u3u1u2(_xor);
157 Ip_u2u1u3(_xori);
158
159
160 /* Handle labels. */
161 struct uasm_label {
162 u32 *addr;
163 int lab;
164 };
165
166 void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
167 int lid);
168 #ifdef CONFIG_64BIT
169 int ISAFUNC(uasm_in_compat_space_p)(long addr);
170 #endif
171 int ISAFUNC(uasm_rel_hi)(long val);
172 int ISAFUNC(uasm_rel_lo)(long val);
173 void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
174 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
175
176 #define UASM_L_LA(lb) \
177 static inline void __uasminit ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
178 { \
179 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \
180 }
181
182 /* convenience macros for instructions */
183 #ifdef CONFIG_64BIT
184 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
185 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
186 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
187 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
188 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
189 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
190 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
191 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
192 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
193 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
194 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
195 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
196 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
197 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
198 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
199 #else
200 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
201 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
202 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
203 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
204 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
205 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
206 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
207 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
208 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
209 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
210 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
211 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
212 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
213 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
214 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
215 #endif
216
217 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
218 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
219 #define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
220 #define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
221 #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
222 #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
223 #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
224 #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
225 #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
226
uasm_i_drotr_safe(u32 ** p,unsigned int a1,unsigned int a2,unsigned int a3)227 static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
228 unsigned int a2, unsigned int a3)
229 {
230 if (a3 < 32)
231 ISAOPC(_drotr)(p, a1, a2, a3);
232 else
233 ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
234 }
235
uasm_i_dsll_safe(u32 ** p,unsigned int a1,unsigned int a2,unsigned int a3)236 static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
237 unsigned int a2, unsigned int a3)
238 {
239 if (a3 < 32)
240 ISAOPC(_dsll)(p, a1, a2, a3);
241 else
242 ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
243 }
244
uasm_i_dsrl_safe(u32 ** p,unsigned int a1,unsigned int a2,unsigned int a3)245 static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
246 unsigned int a2, unsigned int a3)
247 {
248 if (a3 < 32)
249 ISAOPC(_dsrl)(p, a1, a2, a3);
250 else
251 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
252 }
253
254 /* Handle relocations. */
255 struct uasm_reloc {
256 u32 *addr;
257 unsigned int type;
258 int lab;
259 };
260
261 /* This is zero so we can use zeroed label arrays. */
262 #define UASM_LABEL_INVALID 0
263
264 void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
265 void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
266 void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
267 void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
268 void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
269 u32 *first, u32 *end, u32 *target);
270 int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
271
272 /* Convenience functions for labeled branches. */
273 void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
274 void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
275 unsigned int bit, int lid);
276 void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
277 unsigned int bit, int lid);
278 void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
279 void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
280 void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
281 void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
282 void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
283 void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
284 unsigned int reg2, int lid);
285 void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
286