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Searched defs:MIPS4K_ICACHE_REFILL_WAR (Results 1 – 25 of 34) sorted by relevance

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/arch/mips/include/asm/mach-jazz/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-sead3/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/arch/mips/include/asm/mach-ip27/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-pnx833x/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-netlogic/
Dwar.h18 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-loongson/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-lantiq/
Dwar.h16 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-ar7/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-ip32/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-rc32434/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/arch/mips/include/asm/mach-malta/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/arch/mips/include/asm/mach-emma2rh/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-powertv/
Dwar.h20 #define MIPS4K_ICACHE_REFILL_WAR 1 macro
/arch/mips/include/asm/mach-bcm47xx/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-cavium-octeon/
Dwar.h18 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-bcm63xx/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-tx49xx/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-cobalt/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-rm/
Dwar.h21 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-dec/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-au1x00/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-loongson1/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-ip22/
Dwar.h21 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-ath79/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro
/arch/mips/include/asm/mach-wrppmc/
Dwar.h17 #define MIPS4K_ICACHE_REFILL_WAR 0 macro

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