1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cistpl.h>
73 #include <pcmcia/cisreg.h>
74 #include <pcmcia/ds.h>
75
76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
77 #define SYNCLINK_GENERIC_HDLC 1
78 #else
79 #define SYNCLINK_GENERIC_HDLC 0
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <asm/uaccess.h>
88
89 static MGSL_PARAMS default_params = {
90 MGSL_MODE_HDLC, /* unsigned long mode */
91 0, /* unsigned char loopback; */
92 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
93 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
94 0, /* unsigned long clock_speed; */
95 0xff, /* unsigned char addr_filter; */
96 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
97 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
98 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
99 9600, /* unsigned long data_rate; */
100 8, /* unsigned char data_bits; */
101 1, /* unsigned char stop_bits; */
102 ASYNC_PARITY_NONE /* unsigned char parity; */
103 };
104
105 typedef struct {
106 int count;
107 unsigned char status;
108 char data[1];
109 } RXBUF;
110
111 /* The queue of BH actions to be performed */
112
113 #define BH_RECEIVE 1
114 #define BH_TRANSMIT 2
115 #define BH_STATUS 4
116
117 #define IO_PIN_SHUTDOWN_LIMIT 100
118
119 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
120
121 struct _input_signal_events {
122 int ri_up;
123 int ri_down;
124 int dsr_up;
125 int dsr_down;
126 int dcd_up;
127 int dcd_down;
128 int cts_up;
129 int cts_down;
130 };
131
132
133 /*
134 * Device instance data structure
135 */
136
137 typedef struct _mgslpc_info {
138 struct tty_port port;
139 void *if_ptr; /* General purpose pointer (used by SPPP) */
140 int magic;
141 int line;
142
143 struct mgsl_icount icount;
144
145 int timeout;
146 int x_char; /* xon/xoff character */
147 unsigned char read_status_mask;
148 unsigned char ignore_status_mask;
149
150 unsigned char *tx_buf;
151 int tx_put;
152 int tx_get;
153 int tx_count;
154
155 /* circular list of fixed length rx buffers */
156
157 unsigned char *rx_buf; /* memory allocated for all rx buffers */
158 int rx_buf_total_size; /* size of memory allocated for rx buffers */
159 int rx_put; /* index of next empty rx buffer */
160 int rx_get; /* index of next full rx buffer */
161 int rx_buf_size; /* size in bytes of single rx buffer */
162 int rx_buf_count; /* total number of rx buffers */
163 int rx_frame_count; /* number of full rx buffers */
164
165 wait_queue_head_t status_event_wait_q;
166 wait_queue_head_t event_wait_q;
167 struct timer_list tx_timer; /* HDLC transmit timeout timer */
168 struct _mgslpc_info *next_device; /* device list link */
169
170 unsigned short imra_value;
171 unsigned short imrb_value;
172 unsigned char pim_value;
173
174 spinlock_t lock;
175 struct work_struct task; /* task structure for scheduling bh */
176
177 u32 max_frame_size;
178
179 u32 pending_bh;
180
181 bool bh_running;
182 bool bh_requested;
183
184 int dcd_chkcount; /* check counts to prevent */
185 int cts_chkcount; /* too many IRQs if a signal */
186 int dsr_chkcount; /* is floating */
187 int ri_chkcount;
188
189 bool rx_enabled;
190 bool rx_overflow;
191
192 bool tx_enabled;
193 bool tx_active;
194 bool tx_aborting;
195 u32 idle_mode;
196
197 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
198
199 char device_name[25]; /* device instance name */
200
201 unsigned int io_base; /* base I/O address of adapter */
202 unsigned int irq_level;
203
204 MGSL_PARAMS params; /* communications parameters */
205
206 unsigned char serial_signals; /* current serial signal states */
207
208 bool irq_occurred; /* for diagnostics use */
209 char testing_irq;
210 unsigned int init_error; /* startup error (DIAGS) */
211
212 char *flag_buf;
213 bool drop_rts_on_tx_done;
214
215 struct _input_signal_events input_signal_events;
216
217 /* PCMCIA support */
218 struct pcmcia_device *p_dev;
219 int stop;
220
221 /* SPPP/Cisco HDLC device parts */
222 int netcount;
223 spinlock_t netlock;
224
225 #if SYNCLINK_GENERIC_HDLC
226 struct net_device *netdev;
227 #endif
228
229 } MGSLPC_INFO;
230
231 #define MGSLPC_MAGIC 0x5402
232
233 /*
234 * The size of the serial xmit buffer is 1 page, or 4096 bytes
235 */
236 #define TXBUFSIZE 4096
237
238
239 #define CHA 0x00 /* channel A offset */
240 #define CHB 0x40 /* channel B offset */
241
242 /*
243 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
244 */
245 #undef PVR
246
247 #define RXFIFO 0
248 #define TXFIFO 0
249 #define STAR 0x20
250 #define CMDR 0x20
251 #define RSTA 0x21
252 #define PRE 0x21
253 #define MODE 0x22
254 #define TIMR 0x23
255 #define XAD1 0x24
256 #define XAD2 0x25
257 #define RAH1 0x26
258 #define RAH2 0x27
259 #define DAFO 0x27
260 #define RAL1 0x28
261 #define RFC 0x28
262 #define RHCR 0x29
263 #define RAL2 0x29
264 #define RBCL 0x2a
265 #define XBCL 0x2a
266 #define RBCH 0x2b
267 #define XBCH 0x2b
268 #define CCR0 0x2c
269 #define CCR1 0x2d
270 #define CCR2 0x2e
271 #define CCR3 0x2f
272 #define VSTR 0x34
273 #define BGR 0x34
274 #define RLCR 0x35
275 #define AML 0x36
276 #define AMH 0x37
277 #define GIS 0x38
278 #define IVA 0x38
279 #define IPC 0x39
280 #define ISR 0x3a
281 #define IMR 0x3a
282 #define PVR 0x3c
283 #define PIS 0x3d
284 #define PIM 0x3d
285 #define PCR 0x3e
286 #define CCR4 0x3f
287
288 // IMR/ISR
289
290 #define IRQ_BREAK_ON BIT15 // rx break detected
291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
292 #define IRQ_ALLSENT BIT13 // all sent
293 #define IRQ_UNDERRUN BIT12 // transmit data underrun
294 #define IRQ_TIMER BIT11 // timer interrupt
295 #define IRQ_CTS BIT10 // CTS status change
296 #define IRQ_TXREPEAT BIT9 // tx message repeat
297 #define IRQ_TXFIFO BIT8 // transmit pool ready
298 #define IRQ_RXEOM BIT7 // receive message end
299 #define IRQ_EXITHUNT BIT6 // receive frame start
300 #define IRQ_RXTIME BIT6 // rx char timeout
301 #define IRQ_DCD BIT2 // carrier detect status change
302 #define IRQ_OVERRUN BIT1 // receive frame overflow
303 #define IRQ_RXFIFO BIT0 // receive pool full
304
305 // STAR
306
307 #define XFW BIT6 // transmit FIFO write enable
308 #define CEC BIT2 // command executing
309 #define CTS BIT1 // CTS state
310
311 #define PVR_DTR BIT0
312 #define PVR_DSR BIT1
313 #define PVR_RI BIT2
314 #define PVR_AUTOCTS BIT3
315 #define PVR_RS232 0x20 /* 0010b */
316 #define PVR_V35 0xe0 /* 1110b */
317 #define PVR_RS422 0x40 /* 0100b */
318
319 /* Register access functions */
320
321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
322 #define read_reg(info, reg) inb((info)->io_base + (reg))
323
324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
326
327 #define set_reg_bits(info, reg, mask) \
328 write_reg(info, (reg), \
329 (unsigned char) (read_reg(info, (reg)) | (mask)))
330 #define clear_reg_bits(info, reg, mask) \
331 write_reg(info, (reg), \
332 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
333 /*
334 * interrupt enable/disable routines
335 */
irq_disable(MGSLPC_INFO * info,unsigned char channel,unsigned short mask)336 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
337 {
338 if (channel == CHA) {
339 info->imra_value |= mask;
340 write_reg16(info, CHA + IMR, info->imra_value);
341 } else {
342 info->imrb_value |= mask;
343 write_reg16(info, CHB + IMR, info->imrb_value);
344 }
345 }
irq_enable(MGSLPC_INFO * info,unsigned char channel,unsigned short mask)346 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
347 {
348 if (channel == CHA) {
349 info->imra_value &= ~mask;
350 write_reg16(info, CHA + IMR, info->imra_value);
351 } else {
352 info->imrb_value &= ~mask;
353 write_reg16(info, CHB + IMR, info->imrb_value);
354 }
355 }
356
357 #define port_irq_disable(info, mask) \
358 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
359
360 #define port_irq_enable(info, mask) \
361 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
362
363 static void rx_start(MGSLPC_INFO *info);
364 static void rx_stop(MGSLPC_INFO *info);
365
366 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
367 static void tx_stop(MGSLPC_INFO *info);
368 static void tx_set_idle(MGSLPC_INFO *info);
369
370 static void get_signals(MGSLPC_INFO *info);
371 static void set_signals(MGSLPC_INFO *info);
372
373 static void reset_device(MGSLPC_INFO *info);
374
375 static void hdlc_mode(MGSLPC_INFO *info);
376 static void async_mode(MGSLPC_INFO *info);
377
378 static void tx_timeout(unsigned long context);
379
380 static int carrier_raised(struct tty_port *port);
381 static void dtr_rts(struct tty_port *port, int onoff);
382
383 #if SYNCLINK_GENERIC_HDLC
384 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
385 static void hdlcdev_tx_done(MGSLPC_INFO *info);
386 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
387 static int hdlcdev_init(MGSLPC_INFO *info);
388 static void hdlcdev_exit(MGSLPC_INFO *info);
389 #endif
390
391 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
392
393 static bool register_test(MGSLPC_INFO *info);
394 static bool irq_test(MGSLPC_INFO *info);
395 static int adapter_test(MGSLPC_INFO *info);
396
397 static int claim_resources(MGSLPC_INFO *info);
398 static void release_resources(MGSLPC_INFO *info);
399 static int mgslpc_add_device(MGSLPC_INFO *info);
400 static void mgslpc_remove_device(MGSLPC_INFO *info);
401
402 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
403 static void rx_reset_buffers(MGSLPC_INFO *info);
404 static int rx_alloc_buffers(MGSLPC_INFO *info);
405 static void rx_free_buffers(MGSLPC_INFO *info);
406
407 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
408
409 /*
410 * Bottom half interrupt handlers
411 */
412 static void bh_handler(struct work_struct *work);
413 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
414 static void bh_status(MGSLPC_INFO *info);
415
416 /*
417 * ioctl handlers
418 */
419 static int tiocmget(struct tty_struct *tty);
420 static int tiocmset(struct tty_struct *tty,
421 unsigned int set, unsigned int clear);
422 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
423 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
424 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
425 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
426 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
427 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
428 static int tx_abort(MGSLPC_INFO *info);
429 static int set_rxenable(MGSLPC_INFO *info, int enable);
430 static int wait_events(MGSLPC_INFO *info, int __user *mask);
431
432 static MGSLPC_INFO *mgslpc_device_list = NULL;
433 static int mgslpc_device_count = 0;
434
435 /*
436 * Set this param to non-zero to load eax with the
437 * .text section address and breakpoint on module load.
438 * This is useful for use with gdb and add-symbol-file command.
439 */
440 static bool break_on_load=0;
441
442 /*
443 * Driver major number, defaults to zero to get auto
444 * assigned major number. May be forced as module parameter.
445 */
446 static int ttymajor=0;
447
448 static int debug_level = 0;
449 static int maxframe[MAX_DEVICE_COUNT] = {0,};
450
451 module_param(break_on_load, bool, 0);
452 module_param(ttymajor, int, 0);
453 module_param(debug_level, int, 0);
454 module_param_array(maxframe, int, NULL, 0);
455
456 MODULE_LICENSE("GPL");
457
458 static char *driver_name = "SyncLink PC Card driver";
459 static char *driver_version = "$Revision: 4.34 $";
460
461 static struct tty_driver *serial_driver;
462
463 /* number of characters left in xmit buffer before we ask for more */
464 #define WAKEUP_CHARS 256
465
466 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
467 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
468
469 /* PCMCIA prototypes */
470
471 static int mgslpc_config(struct pcmcia_device *link);
472 static void mgslpc_release(u_long arg);
473 static void mgslpc_detach(struct pcmcia_device *p_dev);
474
475 /*
476 * 1st function defined in .text section. Calling this function in
477 * init_module() followed by a breakpoint allows a remote debugger
478 * (gdb) to get the .text address for the add-symbol-file command.
479 * This allows remote debugging of dynamically loadable modules.
480 */
mgslpc_get_text_ptr(void)481 static void* mgslpc_get_text_ptr(void)
482 {
483 return mgslpc_get_text_ptr;
484 }
485
486 /**
487 * line discipline callback wrappers
488 *
489 * The wrappers maintain line discipline references
490 * while calling into the line discipline.
491 *
492 * ldisc_receive_buf - pass receive data to line discipline
493 */
494
ldisc_receive_buf(struct tty_struct * tty,const __u8 * data,char * flags,int count)495 static void ldisc_receive_buf(struct tty_struct *tty,
496 const __u8 *data, char *flags, int count)
497 {
498 struct tty_ldisc *ld;
499 if (!tty)
500 return;
501 ld = tty_ldisc_ref(tty);
502 if (ld) {
503 if (ld->ops->receive_buf)
504 ld->ops->receive_buf(tty, data, flags, count);
505 tty_ldisc_deref(ld);
506 }
507 }
508
509 static const struct tty_port_operations mgslpc_port_ops = {
510 .carrier_raised = carrier_raised,
511 .dtr_rts = dtr_rts
512 };
513
mgslpc_probe(struct pcmcia_device * link)514 static int mgslpc_probe(struct pcmcia_device *link)
515 {
516 MGSLPC_INFO *info;
517 int ret;
518
519 if (debug_level >= DEBUG_LEVEL_INFO)
520 printk("mgslpc_attach\n");
521
522 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
523 if (!info) {
524 printk("Error can't allocate device instance data\n");
525 return -ENOMEM;
526 }
527
528 info->magic = MGSLPC_MAGIC;
529 tty_port_init(&info->port);
530 info->port.ops = &mgslpc_port_ops;
531 INIT_WORK(&info->task, bh_handler);
532 info->max_frame_size = 4096;
533 info->port.close_delay = 5*HZ/10;
534 info->port.closing_wait = 30*HZ;
535 init_waitqueue_head(&info->status_event_wait_q);
536 init_waitqueue_head(&info->event_wait_q);
537 spin_lock_init(&info->lock);
538 spin_lock_init(&info->netlock);
539 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
540 info->idle_mode = HDLC_TXIDLE_FLAGS;
541 info->imra_value = 0xffff;
542 info->imrb_value = 0xffff;
543 info->pim_value = 0xff;
544
545 info->p_dev = link;
546 link->priv = info;
547
548 /* Initialize the struct pcmcia_device structure */
549
550 ret = mgslpc_config(link);
551 if (ret != 0)
552 goto failed;
553
554 ret = mgslpc_add_device(info);
555 if (ret != 0)
556 goto failed_release;
557
558 return 0;
559
560 failed_release:
561 mgslpc_release((u_long)link);
562 failed:
563 tty_port_destroy(&info->port);
564 kfree(info);
565 return ret;
566 }
567
568 /* Card has been inserted.
569 */
570
mgslpc_ioprobe(struct pcmcia_device * p_dev,void * priv_data)571 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
572 {
573 return pcmcia_request_io(p_dev);
574 }
575
mgslpc_config(struct pcmcia_device * link)576 static int mgslpc_config(struct pcmcia_device *link)
577 {
578 MGSLPC_INFO *info = link->priv;
579 int ret;
580
581 if (debug_level >= DEBUG_LEVEL_INFO)
582 printk("mgslpc_config(0x%p)\n", link);
583
584 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
585
586 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
587 if (ret != 0)
588 goto failed;
589
590 link->config_index = 8;
591 link->config_regs = PRESENT_OPTION;
592
593 ret = pcmcia_request_irq(link, mgslpc_isr);
594 if (ret)
595 goto failed;
596 ret = pcmcia_enable_device(link);
597 if (ret)
598 goto failed;
599
600 info->io_base = link->resource[0]->start;
601 info->irq_level = link->irq;
602 return 0;
603
604 failed:
605 mgslpc_release((u_long)link);
606 return -ENODEV;
607 }
608
609 /* Card has been removed.
610 * Unregister device and release PCMCIA configuration.
611 * If device is open, postpone until it is closed.
612 */
mgslpc_release(u_long arg)613 static void mgslpc_release(u_long arg)
614 {
615 struct pcmcia_device *link = (struct pcmcia_device *)arg;
616
617 if (debug_level >= DEBUG_LEVEL_INFO)
618 printk("mgslpc_release(0x%p)\n", link);
619
620 pcmcia_disable_device(link);
621 }
622
mgslpc_detach(struct pcmcia_device * link)623 static void mgslpc_detach(struct pcmcia_device *link)
624 {
625 if (debug_level >= DEBUG_LEVEL_INFO)
626 printk("mgslpc_detach(0x%p)\n", link);
627
628 ((MGSLPC_INFO *)link->priv)->stop = 1;
629 mgslpc_release((u_long)link);
630
631 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
632 }
633
mgslpc_suspend(struct pcmcia_device * link)634 static int mgslpc_suspend(struct pcmcia_device *link)
635 {
636 MGSLPC_INFO *info = link->priv;
637
638 info->stop = 1;
639
640 return 0;
641 }
642
mgslpc_resume(struct pcmcia_device * link)643 static int mgslpc_resume(struct pcmcia_device *link)
644 {
645 MGSLPC_INFO *info = link->priv;
646
647 info->stop = 0;
648
649 return 0;
650 }
651
652
mgslpc_paranoia_check(MGSLPC_INFO * info,char * name,const char * routine)653 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
654 char *name, const char *routine)
655 {
656 #ifdef MGSLPC_PARANOIA_CHECK
657 static const char *badmagic =
658 "Warning: bad magic number for mgsl struct (%s) in %s\n";
659 static const char *badinfo =
660 "Warning: null mgslpc_info for (%s) in %s\n";
661
662 if (!info) {
663 printk(badinfo, name, routine);
664 return true;
665 }
666 if (info->magic != MGSLPC_MAGIC) {
667 printk(badmagic, name, routine);
668 return true;
669 }
670 #else
671 if (!info)
672 return true;
673 #endif
674 return false;
675 }
676
677
678 #define CMD_RXFIFO BIT7 // release current rx FIFO
679 #define CMD_RXRESET BIT6 // receiver reset
680 #define CMD_RXFIFO_READ BIT5
681 #define CMD_START_TIMER BIT4
682 #define CMD_TXFIFO BIT3 // release current tx FIFO
683 #define CMD_TXEOM BIT1 // transmit end message
684 #define CMD_TXRESET BIT0 // transmit reset
685
wait_command_complete(MGSLPC_INFO * info,unsigned char channel)686 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
687 {
688 int i = 0;
689 /* wait for command completion */
690 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
691 udelay(1);
692 if (i++ == 1000)
693 return false;
694 }
695 return true;
696 }
697
issue_command(MGSLPC_INFO * info,unsigned char channel,unsigned char cmd)698 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
699 {
700 wait_command_complete(info, channel);
701 write_reg(info, (unsigned char) (channel + CMDR), cmd);
702 }
703
tx_pause(struct tty_struct * tty)704 static void tx_pause(struct tty_struct *tty)
705 {
706 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
707 unsigned long flags;
708
709 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
710 return;
711 if (debug_level >= DEBUG_LEVEL_INFO)
712 printk("tx_pause(%s)\n", info->device_name);
713
714 spin_lock_irqsave(&info->lock, flags);
715 if (info->tx_enabled)
716 tx_stop(info);
717 spin_unlock_irqrestore(&info->lock, flags);
718 }
719
tx_release(struct tty_struct * tty)720 static void tx_release(struct tty_struct *tty)
721 {
722 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
723 unsigned long flags;
724
725 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
726 return;
727 if (debug_level >= DEBUG_LEVEL_INFO)
728 printk("tx_release(%s)\n", info->device_name);
729
730 spin_lock_irqsave(&info->lock, flags);
731 if (!info->tx_enabled)
732 tx_start(info, tty);
733 spin_unlock_irqrestore(&info->lock, flags);
734 }
735
736 /* Return next bottom half action to perform.
737 * or 0 if nothing to do.
738 */
bh_action(MGSLPC_INFO * info)739 static int bh_action(MGSLPC_INFO *info)
740 {
741 unsigned long flags;
742 int rc = 0;
743
744 spin_lock_irqsave(&info->lock, flags);
745
746 if (info->pending_bh & BH_RECEIVE) {
747 info->pending_bh &= ~BH_RECEIVE;
748 rc = BH_RECEIVE;
749 } else if (info->pending_bh & BH_TRANSMIT) {
750 info->pending_bh &= ~BH_TRANSMIT;
751 rc = BH_TRANSMIT;
752 } else if (info->pending_bh & BH_STATUS) {
753 info->pending_bh &= ~BH_STATUS;
754 rc = BH_STATUS;
755 }
756
757 if (!rc) {
758 /* Mark BH routine as complete */
759 info->bh_running = false;
760 info->bh_requested = false;
761 }
762
763 spin_unlock_irqrestore(&info->lock, flags);
764
765 return rc;
766 }
767
bh_handler(struct work_struct * work)768 static void bh_handler(struct work_struct *work)
769 {
770 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
771 struct tty_struct *tty;
772 int action;
773
774 if (debug_level >= DEBUG_LEVEL_BH)
775 printk("%s(%d):bh_handler(%s) entry\n",
776 __FILE__,__LINE__,info->device_name);
777
778 info->bh_running = true;
779 tty = tty_port_tty_get(&info->port);
780
781 while((action = bh_action(info)) != 0) {
782
783 /* Process work item */
784 if (debug_level >= DEBUG_LEVEL_BH)
785 printk("%s(%d):bh_handler() work item action=%d\n",
786 __FILE__,__LINE__,action);
787
788 switch (action) {
789
790 case BH_RECEIVE:
791 while(rx_get_frame(info, tty));
792 break;
793 case BH_TRANSMIT:
794 bh_transmit(info, tty);
795 break;
796 case BH_STATUS:
797 bh_status(info);
798 break;
799 default:
800 /* unknown work item ID */
801 printk("Unknown work item ID=%08X!\n", action);
802 break;
803 }
804 }
805
806 tty_kref_put(tty);
807 if (debug_level >= DEBUG_LEVEL_BH)
808 printk("%s(%d):bh_handler(%s) exit\n",
809 __FILE__,__LINE__,info->device_name);
810 }
811
bh_transmit(MGSLPC_INFO * info,struct tty_struct * tty)812 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
813 {
814 if (debug_level >= DEBUG_LEVEL_BH)
815 printk("bh_transmit() entry on %s\n", info->device_name);
816
817 if (tty)
818 tty_wakeup(tty);
819 }
820
bh_status(MGSLPC_INFO * info)821 static void bh_status(MGSLPC_INFO *info)
822 {
823 info->ri_chkcount = 0;
824 info->dsr_chkcount = 0;
825 info->dcd_chkcount = 0;
826 info->cts_chkcount = 0;
827 }
828
829 /* eom: non-zero = end of frame */
rx_ready_hdlc(MGSLPC_INFO * info,int eom)830 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
831 {
832 unsigned char data[2];
833 unsigned char fifo_count, read_count, i;
834 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
835
836 if (debug_level >= DEBUG_LEVEL_ISR)
837 printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
838
839 if (!info->rx_enabled)
840 return;
841
842 if (info->rx_frame_count >= info->rx_buf_count) {
843 /* no more free buffers */
844 issue_command(info, CHA, CMD_RXRESET);
845 info->pending_bh |= BH_RECEIVE;
846 info->rx_overflow = true;
847 info->icount.buf_overrun++;
848 return;
849 }
850
851 if (eom) {
852 /* end of frame, get FIFO count from RBCL register */
853 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
854 if (fifo_count == 0)
855 fifo_count = 32;
856 } else
857 fifo_count = 32;
858
859 do {
860 if (fifo_count == 1) {
861 read_count = 1;
862 data[0] = read_reg(info, CHA + RXFIFO);
863 } else {
864 read_count = 2;
865 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
866 }
867 fifo_count -= read_count;
868 if (!fifo_count && eom)
869 buf->status = data[--read_count];
870
871 for (i = 0; i < read_count; i++) {
872 if (buf->count >= info->max_frame_size) {
873 /* frame too large, reset receiver and reset current buffer */
874 issue_command(info, CHA, CMD_RXRESET);
875 buf->count = 0;
876 return;
877 }
878 *(buf->data + buf->count) = data[i];
879 buf->count++;
880 }
881 } while (fifo_count);
882
883 if (eom) {
884 info->pending_bh |= BH_RECEIVE;
885 info->rx_frame_count++;
886 info->rx_put++;
887 if (info->rx_put >= info->rx_buf_count)
888 info->rx_put = 0;
889 }
890 issue_command(info, CHA, CMD_RXFIFO);
891 }
892
rx_ready_async(MGSLPC_INFO * info,int tcd)893 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
894 {
895 struct tty_port *port = &info->port;
896 unsigned char data, status, flag;
897 int fifo_count;
898 int work = 0;
899 struct mgsl_icount *icount = &info->icount;
900
901 if (tcd) {
902 /* early termination, get FIFO count from RBCL register */
903 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
904
905 /* Zero fifo count could mean 0 or 32 bytes available.
906 * If BIT5 of STAR is set then at least 1 byte is available.
907 */
908 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
909 fifo_count = 32;
910 } else
911 fifo_count = 32;
912
913 tty_buffer_request_room(port, fifo_count);
914 /* Flush received async data to receive data buffer. */
915 while (fifo_count) {
916 data = read_reg(info, CHA + RXFIFO);
917 status = read_reg(info, CHA + RXFIFO);
918 fifo_count -= 2;
919
920 icount->rx++;
921 flag = TTY_NORMAL;
922
923 // if no frameing/crc error then save data
924 // BIT7:parity error
925 // BIT6:framing error
926
927 if (status & (BIT7 + BIT6)) {
928 if (status & BIT7)
929 icount->parity++;
930 else
931 icount->frame++;
932
933 /* discard char if tty control flags say so */
934 if (status & info->ignore_status_mask)
935 continue;
936
937 status &= info->read_status_mask;
938
939 if (status & BIT7)
940 flag = TTY_PARITY;
941 else if (status & BIT6)
942 flag = TTY_FRAME;
943 }
944 work += tty_insert_flip_char(port, data, flag);
945 }
946 issue_command(info, CHA, CMD_RXFIFO);
947
948 if (debug_level >= DEBUG_LEVEL_ISR) {
949 printk("%s(%d):rx_ready_async",
950 __FILE__,__LINE__);
951 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
952 __FILE__,__LINE__,icount->rx,icount->brk,
953 icount->parity,icount->frame,icount->overrun);
954 }
955
956 if (work)
957 tty_flip_buffer_push(port);
958 }
959
960
tx_done(MGSLPC_INFO * info,struct tty_struct * tty)961 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
962 {
963 if (!info->tx_active)
964 return;
965
966 info->tx_active = false;
967 info->tx_aborting = false;
968
969 if (info->params.mode == MGSL_MODE_ASYNC)
970 return;
971
972 info->tx_count = info->tx_put = info->tx_get = 0;
973 del_timer(&info->tx_timer);
974
975 if (info->drop_rts_on_tx_done) {
976 get_signals(info);
977 if (info->serial_signals & SerialSignal_RTS) {
978 info->serial_signals &= ~SerialSignal_RTS;
979 set_signals(info);
980 }
981 info->drop_rts_on_tx_done = false;
982 }
983
984 #if SYNCLINK_GENERIC_HDLC
985 if (info->netcount)
986 hdlcdev_tx_done(info);
987 else
988 #endif
989 {
990 if (tty && (tty->stopped || tty->hw_stopped)) {
991 tx_stop(info);
992 return;
993 }
994 info->pending_bh |= BH_TRANSMIT;
995 }
996 }
997
tx_ready(MGSLPC_INFO * info,struct tty_struct * tty)998 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
999 {
1000 unsigned char fifo_count = 32;
1001 int c;
1002
1003 if (debug_level >= DEBUG_LEVEL_ISR)
1004 printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1005
1006 if (info->params.mode == MGSL_MODE_HDLC) {
1007 if (!info->tx_active)
1008 return;
1009 } else {
1010 if (tty && (tty->stopped || tty->hw_stopped)) {
1011 tx_stop(info);
1012 return;
1013 }
1014 if (!info->tx_count)
1015 info->tx_active = false;
1016 }
1017
1018 if (!info->tx_count)
1019 return;
1020
1021 while (info->tx_count && fifo_count) {
1022 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1023
1024 if (c == 1) {
1025 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1026 } else {
1027 write_reg16(info, CHA + TXFIFO,
1028 *((unsigned short*)(info->tx_buf + info->tx_get)));
1029 }
1030 info->tx_count -= c;
1031 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1032 fifo_count -= c;
1033 }
1034
1035 if (info->params.mode == MGSL_MODE_ASYNC) {
1036 if (info->tx_count < WAKEUP_CHARS)
1037 info->pending_bh |= BH_TRANSMIT;
1038 issue_command(info, CHA, CMD_TXFIFO);
1039 } else {
1040 if (info->tx_count)
1041 issue_command(info, CHA, CMD_TXFIFO);
1042 else
1043 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1044 }
1045 }
1046
cts_change(MGSLPC_INFO * info,struct tty_struct * tty)1047 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1048 {
1049 get_signals(info);
1050 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1051 irq_disable(info, CHB, IRQ_CTS);
1052 info->icount.cts++;
1053 if (info->serial_signals & SerialSignal_CTS)
1054 info->input_signal_events.cts_up++;
1055 else
1056 info->input_signal_events.cts_down++;
1057 wake_up_interruptible(&info->status_event_wait_q);
1058 wake_up_interruptible(&info->event_wait_q);
1059
1060 if (tty && tty_port_cts_enabled(&info->port)) {
1061 if (tty->hw_stopped) {
1062 if (info->serial_signals & SerialSignal_CTS) {
1063 if (debug_level >= DEBUG_LEVEL_ISR)
1064 printk("CTS tx start...");
1065 tty->hw_stopped = 0;
1066 tx_start(info, tty);
1067 info->pending_bh |= BH_TRANSMIT;
1068 return;
1069 }
1070 } else {
1071 if (!(info->serial_signals & SerialSignal_CTS)) {
1072 if (debug_level >= DEBUG_LEVEL_ISR)
1073 printk("CTS tx stop...");
1074 tty->hw_stopped = 1;
1075 tx_stop(info);
1076 }
1077 }
1078 }
1079 info->pending_bh |= BH_STATUS;
1080 }
1081
dcd_change(MGSLPC_INFO * info,struct tty_struct * tty)1082 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1083 {
1084 get_signals(info);
1085 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1086 irq_disable(info, CHB, IRQ_DCD);
1087 info->icount.dcd++;
1088 if (info->serial_signals & SerialSignal_DCD) {
1089 info->input_signal_events.dcd_up++;
1090 }
1091 else
1092 info->input_signal_events.dcd_down++;
1093 #if SYNCLINK_GENERIC_HDLC
1094 if (info->netcount) {
1095 if (info->serial_signals & SerialSignal_DCD)
1096 netif_carrier_on(info->netdev);
1097 else
1098 netif_carrier_off(info->netdev);
1099 }
1100 #endif
1101 wake_up_interruptible(&info->status_event_wait_q);
1102 wake_up_interruptible(&info->event_wait_q);
1103
1104 if (info->port.flags & ASYNC_CHECK_CD) {
1105 if (debug_level >= DEBUG_LEVEL_ISR)
1106 printk("%s CD now %s...", info->device_name,
1107 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1108 if (info->serial_signals & SerialSignal_DCD)
1109 wake_up_interruptible(&info->port.open_wait);
1110 else {
1111 if (debug_level >= DEBUG_LEVEL_ISR)
1112 printk("doing serial hangup...");
1113 if (tty)
1114 tty_hangup(tty);
1115 }
1116 }
1117 info->pending_bh |= BH_STATUS;
1118 }
1119
dsr_change(MGSLPC_INFO * info)1120 static void dsr_change(MGSLPC_INFO *info)
1121 {
1122 get_signals(info);
1123 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1124 port_irq_disable(info, PVR_DSR);
1125 info->icount.dsr++;
1126 if (info->serial_signals & SerialSignal_DSR)
1127 info->input_signal_events.dsr_up++;
1128 else
1129 info->input_signal_events.dsr_down++;
1130 wake_up_interruptible(&info->status_event_wait_q);
1131 wake_up_interruptible(&info->event_wait_q);
1132 info->pending_bh |= BH_STATUS;
1133 }
1134
ri_change(MGSLPC_INFO * info)1135 static void ri_change(MGSLPC_INFO *info)
1136 {
1137 get_signals(info);
1138 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1139 port_irq_disable(info, PVR_RI);
1140 info->icount.rng++;
1141 if (info->serial_signals & SerialSignal_RI)
1142 info->input_signal_events.ri_up++;
1143 else
1144 info->input_signal_events.ri_down++;
1145 wake_up_interruptible(&info->status_event_wait_q);
1146 wake_up_interruptible(&info->event_wait_q);
1147 info->pending_bh |= BH_STATUS;
1148 }
1149
1150 /* Interrupt service routine entry point.
1151 *
1152 * Arguments:
1153 *
1154 * irq interrupt number that caused interrupt
1155 * dev_id device ID supplied during interrupt registration
1156 */
mgslpc_isr(int dummy,void * dev_id)1157 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1158 {
1159 MGSLPC_INFO *info = dev_id;
1160 struct tty_struct *tty;
1161 unsigned short isr;
1162 unsigned char gis, pis;
1163 int count=0;
1164
1165 if (debug_level >= DEBUG_LEVEL_ISR)
1166 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1167
1168 if (!(info->p_dev->_locked))
1169 return IRQ_HANDLED;
1170
1171 tty = tty_port_tty_get(&info->port);
1172
1173 spin_lock(&info->lock);
1174
1175 while ((gis = read_reg(info, CHA + GIS))) {
1176 if (debug_level >= DEBUG_LEVEL_ISR)
1177 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1178
1179 if ((gis & 0x70) || count > 1000) {
1180 printk("synclink_cs:hardware failed or ejected\n");
1181 break;
1182 }
1183 count++;
1184
1185 if (gis & (BIT1 + BIT0)) {
1186 isr = read_reg16(info, CHB + ISR);
1187 if (isr & IRQ_DCD)
1188 dcd_change(info, tty);
1189 if (isr & IRQ_CTS)
1190 cts_change(info, tty);
1191 }
1192 if (gis & (BIT3 + BIT2))
1193 {
1194 isr = read_reg16(info, CHA + ISR);
1195 if (isr & IRQ_TIMER) {
1196 info->irq_occurred = true;
1197 irq_disable(info, CHA, IRQ_TIMER);
1198 }
1199
1200 /* receive IRQs */
1201 if (isr & IRQ_EXITHUNT) {
1202 info->icount.exithunt++;
1203 wake_up_interruptible(&info->event_wait_q);
1204 }
1205 if (isr & IRQ_BREAK_ON) {
1206 info->icount.brk++;
1207 if (info->port.flags & ASYNC_SAK)
1208 do_SAK(tty);
1209 }
1210 if (isr & IRQ_RXTIME) {
1211 issue_command(info, CHA, CMD_RXFIFO_READ);
1212 }
1213 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1214 if (info->params.mode == MGSL_MODE_HDLC)
1215 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1216 else
1217 rx_ready_async(info, isr & IRQ_RXEOM);
1218 }
1219
1220 /* transmit IRQs */
1221 if (isr & IRQ_UNDERRUN) {
1222 if (info->tx_aborting)
1223 info->icount.txabort++;
1224 else
1225 info->icount.txunder++;
1226 tx_done(info, tty);
1227 }
1228 else if (isr & IRQ_ALLSENT) {
1229 info->icount.txok++;
1230 tx_done(info, tty);
1231 }
1232 else if (isr & IRQ_TXFIFO)
1233 tx_ready(info, tty);
1234 }
1235 if (gis & BIT7) {
1236 pis = read_reg(info, CHA + PIS);
1237 if (pis & BIT1)
1238 dsr_change(info);
1239 if (pis & BIT2)
1240 ri_change(info);
1241 }
1242 }
1243
1244 /* Request bottom half processing if there's something
1245 * for it to do and the bh is not already running
1246 */
1247
1248 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1249 if (debug_level >= DEBUG_LEVEL_ISR)
1250 printk("%s(%d):%s queueing bh task.\n",
1251 __FILE__,__LINE__,info->device_name);
1252 schedule_work(&info->task);
1253 info->bh_requested = true;
1254 }
1255
1256 spin_unlock(&info->lock);
1257 tty_kref_put(tty);
1258
1259 if (debug_level >= DEBUG_LEVEL_ISR)
1260 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1261 __FILE__, __LINE__, info->irq_level);
1262
1263 return IRQ_HANDLED;
1264 }
1265
1266 /* Initialize and start device.
1267 */
startup(MGSLPC_INFO * info,struct tty_struct * tty)1268 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1269 {
1270 int retval = 0;
1271
1272 if (debug_level >= DEBUG_LEVEL_INFO)
1273 printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1274
1275 if (info->port.flags & ASYNC_INITIALIZED)
1276 return 0;
1277
1278 if (!info->tx_buf) {
1279 /* allocate a page of memory for a transmit buffer */
1280 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1281 if (!info->tx_buf) {
1282 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1283 __FILE__, __LINE__, info->device_name);
1284 return -ENOMEM;
1285 }
1286 }
1287
1288 info->pending_bh = 0;
1289
1290 memset(&info->icount, 0, sizeof(info->icount));
1291
1292 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1293
1294 /* Allocate and claim adapter resources */
1295 retval = claim_resources(info);
1296
1297 /* perform existence check and diagnostics */
1298 if (!retval)
1299 retval = adapter_test(info);
1300
1301 if (retval) {
1302 if (capable(CAP_SYS_ADMIN) && tty)
1303 set_bit(TTY_IO_ERROR, &tty->flags);
1304 release_resources(info);
1305 return retval;
1306 }
1307
1308 /* program hardware for current parameters */
1309 mgslpc_change_params(info, tty);
1310
1311 if (tty)
1312 clear_bit(TTY_IO_ERROR, &tty->flags);
1313
1314 info->port.flags |= ASYNC_INITIALIZED;
1315
1316 return 0;
1317 }
1318
1319 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1320 */
shutdown(MGSLPC_INFO * info,struct tty_struct * tty)1321 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1322 {
1323 unsigned long flags;
1324
1325 if (!(info->port.flags & ASYNC_INITIALIZED))
1326 return;
1327
1328 if (debug_level >= DEBUG_LEVEL_INFO)
1329 printk("%s(%d):mgslpc_shutdown(%s)\n",
1330 __FILE__, __LINE__, info->device_name);
1331
1332 /* clear status wait queue because status changes */
1333 /* can't happen after shutting down the hardware */
1334 wake_up_interruptible(&info->status_event_wait_q);
1335 wake_up_interruptible(&info->event_wait_q);
1336
1337 del_timer_sync(&info->tx_timer);
1338
1339 if (info->tx_buf) {
1340 free_page((unsigned long) info->tx_buf);
1341 info->tx_buf = NULL;
1342 }
1343
1344 spin_lock_irqsave(&info->lock, flags);
1345
1346 rx_stop(info);
1347 tx_stop(info);
1348
1349 /* TODO:disable interrupts instead of reset to preserve signal states */
1350 reset_device(info);
1351
1352 if (!tty || tty->termios.c_cflag & HUPCL) {
1353 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1354 set_signals(info);
1355 }
1356
1357 spin_unlock_irqrestore(&info->lock, flags);
1358
1359 release_resources(info);
1360
1361 if (tty)
1362 set_bit(TTY_IO_ERROR, &tty->flags);
1363
1364 info->port.flags &= ~ASYNC_INITIALIZED;
1365 }
1366
mgslpc_program_hw(MGSLPC_INFO * info,struct tty_struct * tty)1367 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1368 {
1369 unsigned long flags;
1370
1371 spin_lock_irqsave(&info->lock, flags);
1372
1373 rx_stop(info);
1374 tx_stop(info);
1375 info->tx_count = info->tx_put = info->tx_get = 0;
1376
1377 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1378 hdlc_mode(info);
1379 else
1380 async_mode(info);
1381
1382 set_signals(info);
1383
1384 info->dcd_chkcount = 0;
1385 info->cts_chkcount = 0;
1386 info->ri_chkcount = 0;
1387 info->dsr_chkcount = 0;
1388
1389 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1390 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1391 get_signals(info);
1392
1393 if (info->netcount || (tty && (tty->termios.c_cflag & CREAD)))
1394 rx_start(info);
1395
1396 spin_unlock_irqrestore(&info->lock, flags);
1397 }
1398
1399 /* Reconfigure adapter based on new parameters
1400 */
mgslpc_change_params(MGSLPC_INFO * info,struct tty_struct * tty)1401 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1402 {
1403 unsigned cflag;
1404 int bits_per_char;
1405
1406 if (!tty)
1407 return;
1408
1409 if (debug_level >= DEBUG_LEVEL_INFO)
1410 printk("%s(%d):mgslpc_change_params(%s)\n",
1411 __FILE__, __LINE__, info->device_name);
1412
1413 cflag = tty->termios.c_cflag;
1414
1415 /* if B0 rate (hangup) specified then negate RTS and DTR */
1416 /* otherwise assert RTS and DTR */
1417 if (cflag & CBAUD)
1418 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1419 else
1420 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1421
1422 /* byte size and parity */
1423
1424 switch (cflag & CSIZE) {
1425 case CS5: info->params.data_bits = 5; break;
1426 case CS6: info->params.data_bits = 6; break;
1427 case CS7: info->params.data_bits = 7; break;
1428 case CS8: info->params.data_bits = 8; break;
1429 default: info->params.data_bits = 7; break;
1430 }
1431
1432 if (cflag & CSTOPB)
1433 info->params.stop_bits = 2;
1434 else
1435 info->params.stop_bits = 1;
1436
1437 info->params.parity = ASYNC_PARITY_NONE;
1438 if (cflag & PARENB) {
1439 if (cflag & PARODD)
1440 info->params.parity = ASYNC_PARITY_ODD;
1441 else
1442 info->params.parity = ASYNC_PARITY_EVEN;
1443 #ifdef CMSPAR
1444 if (cflag & CMSPAR)
1445 info->params.parity = ASYNC_PARITY_SPACE;
1446 #endif
1447 }
1448
1449 /* calculate number of jiffies to transmit a full
1450 * FIFO (32 bytes) at specified data rate
1451 */
1452 bits_per_char = info->params.data_bits +
1453 info->params.stop_bits + 1;
1454
1455 /* if port data rate is set to 460800 or less then
1456 * allow tty settings to override, otherwise keep the
1457 * current data rate.
1458 */
1459 if (info->params.data_rate <= 460800) {
1460 info->params.data_rate = tty_get_baud_rate(tty);
1461 }
1462
1463 if (info->params.data_rate) {
1464 info->timeout = (32*HZ*bits_per_char) /
1465 info->params.data_rate;
1466 }
1467 info->timeout += HZ/50; /* Add .02 seconds of slop */
1468
1469 if (cflag & CRTSCTS)
1470 info->port.flags |= ASYNC_CTS_FLOW;
1471 else
1472 info->port.flags &= ~ASYNC_CTS_FLOW;
1473
1474 if (cflag & CLOCAL)
1475 info->port.flags &= ~ASYNC_CHECK_CD;
1476 else
1477 info->port.flags |= ASYNC_CHECK_CD;
1478
1479 /* process tty input control flags */
1480
1481 info->read_status_mask = 0;
1482 if (I_INPCK(tty))
1483 info->read_status_mask |= BIT7 | BIT6;
1484 if (I_IGNPAR(tty))
1485 info->ignore_status_mask |= BIT7 | BIT6;
1486
1487 mgslpc_program_hw(info, tty);
1488 }
1489
1490 /* Add a character to the transmit buffer
1491 */
mgslpc_put_char(struct tty_struct * tty,unsigned char ch)1492 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1493 {
1494 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1495 unsigned long flags;
1496
1497 if (debug_level >= DEBUG_LEVEL_INFO) {
1498 printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1499 __FILE__, __LINE__, ch, info->device_name);
1500 }
1501
1502 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1503 return 0;
1504
1505 if (!info->tx_buf)
1506 return 0;
1507
1508 spin_lock_irqsave(&info->lock, flags);
1509
1510 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1511 if (info->tx_count < TXBUFSIZE - 1) {
1512 info->tx_buf[info->tx_put++] = ch;
1513 info->tx_put &= TXBUFSIZE-1;
1514 info->tx_count++;
1515 }
1516 }
1517
1518 spin_unlock_irqrestore(&info->lock, flags);
1519 return 1;
1520 }
1521
1522 /* Enable transmitter so remaining characters in the
1523 * transmit buffer are sent.
1524 */
mgslpc_flush_chars(struct tty_struct * tty)1525 static void mgslpc_flush_chars(struct tty_struct *tty)
1526 {
1527 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1528 unsigned long flags;
1529
1530 if (debug_level >= DEBUG_LEVEL_INFO)
1531 printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1532 __FILE__, __LINE__, info->device_name, info->tx_count);
1533
1534 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1535 return;
1536
1537 if (info->tx_count <= 0 || tty->stopped ||
1538 tty->hw_stopped || !info->tx_buf)
1539 return;
1540
1541 if (debug_level >= DEBUG_LEVEL_INFO)
1542 printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1543 __FILE__, __LINE__, info->device_name);
1544
1545 spin_lock_irqsave(&info->lock, flags);
1546 if (!info->tx_active)
1547 tx_start(info, tty);
1548 spin_unlock_irqrestore(&info->lock, flags);
1549 }
1550
1551 /* Send a block of data
1552 *
1553 * Arguments:
1554 *
1555 * tty pointer to tty information structure
1556 * buf pointer to buffer containing send data
1557 * count size of send data in bytes
1558 *
1559 * Returns: number of characters written
1560 */
mgslpc_write(struct tty_struct * tty,const unsigned char * buf,int count)1561 static int mgslpc_write(struct tty_struct * tty,
1562 const unsigned char *buf, int count)
1563 {
1564 int c, ret = 0;
1565 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1566 unsigned long flags;
1567
1568 if (debug_level >= DEBUG_LEVEL_INFO)
1569 printk("%s(%d):mgslpc_write(%s) count=%d\n",
1570 __FILE__, __LINE__, info->device_name, count);
1571
1572 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1573 !info->tx_buf)
1574 goto cleanup;
1575
1576 if (info->params.mode == MGSL_MODE_HDLC) {
1577 if (count > TXBUFSIZE) {
1578 ret = -EIO;
1579 goto cleanup;
1580 }
1581 if (info->tx_active)
1582 goto cleanup;
1583 else if (info->tx_count)
1584 goto start;
1585 }
1586
1587 for (;;) {
1588 c = min(count,
1589 min(TXBUFSIZE - info->tx_count - 1,
1590 TXBUFSIZE - info->tx_put));
1591 if (c <= 0)
1592 break;
1593
1594 memcpy(info->tx_buf + info->tx_put, buf, c);
1595
1596 spin_lock_irqsave(&info->lock, flags);
1597 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1598 info->tx_count += c;
1599 spin_unlock_irqrestore(&info->lock, flags);
1600
1601 buf += c;
1602 count -= c;
1603 ret += c;
1604 }
1605 start:
1606 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1607 spin_lock_irqsave(&info->lock, flags);
1608 if (!info->tx_active)
1609 tx_start(info, tty);
1610 spin_unlock_irqrestore(&info->lock, flags);
1611 }
1612 cleanup:
1613 if (debug_level >= DEBUG_LEVEL_INFO)
1614 printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1615 __FILE__, __LINE__, info->device_name, ret);
1616 return ret;
1617 }
1618
1619 /* Return the count of free bytes in transmit buffer
1620 */
mgslpc_write_room(struct tty_struct * tty)1621 static int mgslpc_write_room(struct tty_struct *tty)
1622 {
1623 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1624 int ret;
1625
1626 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1627 return 0;
1628
1629 if (info->params.mode == MGSL_MODE_HDLC) {
1630 /* HDLC (frame oriented) mode */
1631 if (info->tx_active)
1632 return 0;
1633 else
1634 return HDLC_MAX_FRAME_SIZE;
1635 } else {
1636 ret = TXBUFSIZE - info->tx_count - 1;
1637 if (ret < 0)
1638 ret = 0;
1639 }
1640
1641 if (debug_level >= DEBUG_LEVEL_INFO)
1642 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1643 __FILE__, __LINE__, info->device_name, ret);
1644 return ret;
1645 }
1646
1647 /* Return the count of bytes in transmit buffer
1648 */
mgslpc_chars_in_buffer(struct tty_struct * tty)1649 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1650 {
1651 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1652 int rc;
1653
1654 if (debug_level >= DEBUG_LEVEL_INFO)
1655 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1656 __FILE__, __LINE__, info->device_name);
1657
1658 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1659 return 0;
1660
1661 if (info->params.mode == MGSL_MODE_HDLC)
1662 rc = info->tx_active ? info->max_frame_size : 0;
1663 else
1664 rc = info->tx_count;
1665
1666 if (debug_level >= DEBUG_LEVEL_INFO)
1667 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1668 __FILE__, __LINE__, info->device_name, rc);
1669
1670 return rc;
1671 }
1672
1673 /* Discard all data in the send buffer
1674 */
mgslpc_flush_buffer(struct tty_struct * tty)1675 static void mgslpc_flush_buffer(struct tty_struct *tty)
1676 {
1677 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1678 unsigned long flags;
1679
1680 if (debug_level >= DEBUG_LEVEL_INFO)
1681 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1682 __FILE__, __LINE__, info->device_name);
1683
1684 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1685 return;
1686
1687 spin_lock_irqsave(&info->lock, flags);
1688 info->tx_count = info->tx_put = info->tx_get = 0;
1689 del_timer(&info->tx_timer);
1690 spin_unlock_irqrestore(&info->lock, flags);
1691
1692 wake_up_interruptible(&tty->write_wait);
1693 tty_wakeup(tty);
1694 }
1695
1696 /* Send a high-priority XON/XOFF character
1697 */
mgslpc_send_xchar(struct tty_struct * tty,char ch)1698 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1699 {
1700 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1701 unsigned long flags;
1702
1703 if (debug_level >= DEBUG_LEVEL_INFO)
1704 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1705 __FILE__, __LINE__, info->device_name, ch);
1706
1707 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1708 return;
1709
1710 info->x_char = ch;
1711 if (ch) {
1712 spin_lock_irqsave(&info->lock, flags);
1713 if (!info->tx_enabled)
1714 tx_start(info, tty);
1715 spin_unlock_irqrestore(&info->lock, flags);
1716 }
1717 }
1718
1719 /* Signal remote device to throttle send data (our receive data)
1720 */
mgslpc_throttle(struct tty_struct * tty)1721 static void mgslpc_throttle(struct tty_struct * tty)
1722 {
1723 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1724 unsigned long flags;
1725
1726 if (debug_level >= DEBUG_LEVEL_INFO)
1727 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1728 __FILE__, __LINE__, info->device_name);
1729
1730 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1731 return;
1732
1733 if (I_IXOFF(tty))
1734 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1735
1736 if (tty->termios.c_cflag & CRTSCTS) {
1737 spin_lock_irqsave(&info->lock, flags);
1738 info->serial_signals &= ~SerialSignal_RTS;
1739 set_signals(info);
1740 spin_unlock_irqrestore(&info->lock, flags);
1741 }
1742 }
1743
1744 /* Signal remote device to stop throttling send data (our receive data)
1745 */
mgslpc_unthrottle(struct tty_struct * tty)1746 static void mgslpc_unthrottle(struct tty_struct * tty)
1747 {
1748 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1749 unsigned long flags;
1750
1751 if (debug_level >= DEBUG_LEVEL_INFO)
1752 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1753 __FILE__, __LINE__, info->device_name);
1754
1755 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1756 return;
1757
1758 if (I_IXOFF(tty)) {
1759 if (info->x_char)
1760 info->x_char = 0;
1761 else
1762 mgslpc_send_xchar(tty, START_CHAR(tty));
1763 }
1764
1765 if (tty->termios.c_cflag & CRTSCTS) {
1766 spin_lock_irqsave(&info->lock, flags);
1767 info->serial_signals |= SerialSignal_RTS;
1768 set_signals(info);
1769 spin_unlock_irqrestore(&info->lock, flags);
1770 }
1771 }
1772
1773 /* get the current serial statistics
1774 */
get_stats(MGSLPC_INFO * info,struct mgsl_icount __user * user_icount)1775 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1776 {
1777 int err;
1778 if (debug_level >= DEBUG_LEVEL_INFO)
1779 printk("get_params(%s)\n", info->device_name);
1780 if (!user_icount) {
1781 memset(&info->icount, 0, sizeof(info->icount));
1782 } else {
1783 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1784 if (err)
1785 return -EFAULT;
1786 }
1787 return 0;
1788 }
1789
1790 /* get the current serial parameters
1791 */
get_params(MGSLPC_INFO * info,MGSL_PARAMS __user * user_params)1792 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1793 {
1794 int err;
1795 if (debug_level >= DEBUG_LEVEL_INFO)
1796 printk("get_params(%s)\n", info->device_name);
1797 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1798 if (err)
1799 return -EFAULT;
1800 return 0;
1801 }
1802
1803 /* set the serial parameters
1804 *
1805 * Arguments:
1806 *
1807 * info pointer to device instance data
1808 * new_params user buffer containing new serial params
1809 *
1810 * Returns: 0 if success, otherwise error code
1811 */
set_params(MGSLPC_INFO * info,MGSL_PARAMS __user * new_params,struct tty_struct * tty)1812 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1813 {
1814 unsigned long flags;
1815 MGSL_PARAMS tmp_params;
1816 int err;
1817
1818 if (debug_level >= DEBUG_LEVEL_INFO)
1819 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1820 info->device_name);
1821 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1822 if (err) {
1823 if (debug_level >= DEBUG_LEVEL_INFO)
1824 printk("%s(%d):set_params(%s) user buffer copy failed\n",
1825 __FILE__, __LINE__, info->device_name);
1826 return -EFAULT;
1827 }
1828
1829 spin_lock_irqsave(&info->lock, flags);
1830 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1831 spin_unlock_irqrestore(&info->lock, flags);
1832
1833 mgslpc_change_params(info, tty);
1834
1835 return 0;
1836 }
1837
get_txidle(MGSLPC_INFO * info,int __user * idle_mode)1838 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1839 {
1840 int err;
1841 if (debug_level >= DEBUG_LEVEL_INFO)
1842 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1843 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1844 if (err)
1845 return -EFAULT;
1846 return 0;
1847 }
1848
set_txidle(MGSLPC_INFO * info,int idle_mode)1849 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1850 {
1851 unsigned long flags;
1852 if (debug_level >= DEBUG_LEVEL_INFO)
1853 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1854 spin_lock_irqsave(&info->lock, flags);
1855 info->idle_mode = idle_mode;
1856 tx_set_idle(info);
1857 spin_unlock_irqrestore(&info->lock, flags);
1858 return 0;
1859 }
1860
get_interface(MGSLPC_INFO * info,int __user * if_mode)1861 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1862 {
1863 int err;
1864 if (debug_level >= DEBUG_LEVEL_INFO)
1865 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1866 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1867 if (err)
1868 return -EFAULT;
1869 return 0;
1870 }
1871
set_interface(MGSLPC_INFO * info,int if_mode)1872 static int set_interface(MGSLPC_INFO * info, int if_mode)
1873 {
1874 unsigned long flags;
1875 unsigned char val;
1876 if (debug_level >= DEBUG_LEVEL_INFO)
1877 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1878 spin_lock_irqsave(&info->lock, flags);
1879 info->if_mode = if_mode;
1880
1881 val = read_reg(info, PVR) & 0x0f;
1882 switch (info->if_mode)
1883 {
1884 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1885 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1886 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1887 }
1888 write_reg(info, PVR, val);
1889
1890 spin_unlock_irqrestore(&info->lock, flags);
1891 return 0;
1892 }
1893
set_txenable(MGSLPC_INFO * info,int enable,struct tty_struct * tty)1894 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1895 {
1896 unsigned long flags;
1897
1898 if (debug_level >= DEBUG_LEVEL_INFO)
1899 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1900
1901 spin_lock_irqsave(&info->lock, flags);
1902 if (enable) {
1903 if (!info->tx_enabled)
1904 tx_start(info, tty);
1905 } else {
1906 if (info->tx_enabled)
1907 tx_stop(info);
1908 }
1909 spin_unlock_irqrestore(&info->lock, flags);
1910 return 0;
1911 }
1912
tx_abort(MGSLPC_INFO * info)1913 static int tx_abort(MGSLPC_INFO * info)
1914 {
1915 unsigned long flags;
1916
1917 if (debug_level >= DEBUG_LEVEL_INFO)
1918 printk("tx_abort(%s)\n", info->device_name);
1919
1920 spin_lock_irqsave(&info->lock, flags);
1921 if (info->tx_active && info->tx_count &&
1922 info->params.mode == MGSL_MODE_HDLC) {
1923 /* clear data count so FIFO is not filled on next IRQ.
1924 * This results in underrun and abort transmission.
1925 */
1926 info->tx_count = info->tx_put = info->tx_get = 0;
1927 info->tx_aborting = true;
1928 }
1929 spin_unlock_irqrestore(&info->lock, flags);
1930 return 0;
1931 }
1932
set_rxenable(MGSLPC_INFO * info,int enable)1933 static int set_rxenable(MGSLPC_INFO * info, int enable)
1934 {
1935 unsigned long flags;
1936
1937 if (debug_level >= DEBUG_LEVEL_INFO)
1938 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1939
1940 spin_lock_irqsave(&info->lock, flags);
1941 if (enable) {
1942 if (!info->rx_enabled)
1943 rx_start(info);
1944 } else {
1945 if (info->rx_enabled)
1946 rx_stop(info);
1947 }
1948 spin_unlock_irqrestore(&info->lock, flags);
1949 return 0;
1950 }
1951
1952 /* wait for specified event to occur
1953 *
1954 * Arguments: info pointer to device instance data
1955 * mask pointer to bitmask of events to wait for
1956 * Return Value: 0 if successful and bit mask updated with
1957 * of events triggerred,
1958 * otherwise error code
1959 */
wait_events(MGSLPC_INFO * info,int __user * mask_ptr)1960 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1961 {
1962 unsigned long flags;
1963 int s;
1964 int rc=0;
1965 struct mgsl_icount cprev, cnow;
1966 int events;
1967 int mask;
1968 struct _input_signal_events oldsigs, newsigs;
1969 DECLARE_WAITQUEUE(wait, current);
1970
1971 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1972 if (rc)
1973 return -EFAULT;
1974
1975 if (debug_level >= DEBUG_LEVEL_INFO)
1976 printk("wait_events(%s,%d)\n", info->device_name, mask);
1977
1978 spin_lock_irqsave(&info->lock, flags);
1979
1980 /* return immediately if state matches requested events */
1981 get_signals(info);
1982 s = info->serial_signals;
1983 events = mask &
1984 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1985 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1986 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1987 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1988 if (events) {
1989 spin_unlock_irqrestore(&info->lock, flags);
1990 goto exit;
1991 }
1992
1993 /* save current irq counts */
1994 cprev = info->icount;
1995 oldsigs = info->input_signal_events;
1996
1997 if ((info->params.mode == MGSL_MODE_HDLC) &&
1998 (mask & MgslEvent_ExitHuntMode))
1999 irq_enable(info, CHA, IRQ_EXITHUNT);
2000
2001 set_current_state(TASK_INTERRUPTIBLE);
2002 add_wait_queue(&info->event_wait_q, &wait);
2003
2004 spin_unlock_irqrestore(&info->lock, flags);
2005
2006
2007 for(;;) {
2008 schedule();
2009 if (signal_pending(current)) {
2010 rc = -ERESTARTSYS;
2011 break;
2012 }
2013
2014 /* get current irq counts */
2015 spin_lock_irqsave(&info->lock, flags);
2016 cnow = info->icount;
2017 newsigs = info->input_signal_events;
2018 set_current_state(TASK_INTERRUPTIBLE);
2019 spin_unlock_irqrestore(&info->lock, flags);
2020
2021 /* if no change, wait aborted for some reason */
2022 if (newsigs.dsr_up == oldsigs.dsr_up &&
2023 newsigs.dsr_down == oldsigs.dsr_down &&
2024 newsigs.dcd_up == oldsigs.dcd_up &&
2025 newsigs.dcd_down == oldsigs.dcd_down &&
2026 newsigs.cts_up == oldsigs.cts_up &&
2027 newsigs.cts_down == oldsigs.cts_down &&
2028 newsigs.ri_up == oldsigs.ri_up &&
2029 newsigs.ri_down == oldsigs.ri_down &&
2030 cnow.exithunt == cprev.exithunt &&
2031 cnow.rxidle == cprev.rxidle) {
2032 rc = -EIO;
2033 break;
2034 }
2035
2036 events = mask &
2037 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2038 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2039 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2040 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2041 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2042 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2043 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2044 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2045 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2046 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2047 if (events)
2048 break;
2049
2050 cprev = cnow;
2051 oldsigs = newsigs;
2052 }
2053
2054 remove_wait_queue(&info->event_wait_q, &wait);
2055 set_current_state(TASK_RUNNING);
2056
2057 if (mask & MgslEvent_ExitHuntMode) {
2058 spin_lock_irqsave(&info->lock, flags);
2059 if (!waitqueue_active(&info->event_wait_q))
2060 irq_disable(info, CHA, IRQ_EXITHUNT);
2061 spin_unlock_irqrestore(&info->lock, flags);
2062 }
2063 exit:
2064 if (rc == 0)
2065 PUT_USER(rc, events, mask_ptr);
2066 return rc;
2067 }
2068
modem_input_wait(MGSLPC_INFO * info,int arg)2069 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2070 {
2071 unsigned long flags;
2072 int rc;
2073 struct mgsl_icount cprev, cnow;
2074 DECLARE_WAITQUEUE(wait, current);
2075
2076 /* save current irq counts */
2077 spin_lock_irqsave(&info->lock, flags);
2078 cprev = info->icount;
2079 add_wait_queue(&info->status_event_wait_q, &wait);
2080 set_current_state(TASK_INTERRUPTIBLE);
2081 spin_unlock_irqrestore(&info->lock, flags);
2082
2083 for(;;) {
2084 schedule();
2085 if (signal_pending(current)) {
2086 rc = -ERESTARTSYS;
2087 break;
2088 }
2089
2090 /* get new irq counts */
2091 spin_lock_irqsave(&info->lock, flags);
2092 cnow = info->icount;
2093 set_current_state(TASK_INTERRUPTIBLE);
2094 spin_unlock_irqrestore(&info->lock, flags);
2095
2096 /* if no change, wait aborted for some reason */
2097 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2098 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2099 rc = -EIO;
2100 break;
2101 }
2102
2103 /* check for change in caller specified modem input */
2104 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2105 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2106 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2107 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2108 rc = 0;
2109 break;
2110 }
2111
2112 cprev = cnow;
2113 }
2114 remove_wait_queue(&info->status_event_wait_q, &wait);
2115 set_current_state(TASK_RUNNING);
2116 return rc;
2117 }
2118
2119 /* return the state of the serial control and status signals
2120 */
tiocmget(struct tty_struct * tty)2121 static int tiocmget(struct tty_struct *tty)
2122 {
2123 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2124 unsigned int result;
2125 unsigned long flags;
2126
2127 spin_lock_irqsave(&info->lock, flags);
2128 get_signals(info);
2129 spin_unlock_irqrestore(&info->lock, flags);
2130
2131 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2132 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2133 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2134 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2135 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2136 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2137
2138 if (debug_level >= DEBUG_LEVEL_INFO)
2139 printk("%s(%d):%s tiocmget() value=%08X\n",
2140 __FILE__, __LINE__, info->device_name, result);
2141 return result;
2142 }
2143
2144 /* set modem control signals (DTR/RTS)
2145 */
tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)2146 static int tiocmset(struct tty_struct *tty,
2147 unsigned int set, unsigned int clear)
2148 {
2149 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2150 unsigned long flags;
2151
2152 if (debug_level >= DEBUG_LEVEL_INFO)
2153 printk("%s(%d):%s tiocmset(%x,%x)\n",
2154 __FILE__, __LINE__, info->device_name, set, clear);
2155
2156 if (set & TIOCM_RTS)
2157 info->serial_signals |= SerialSignal_RTS;
2158 if (set & TIOCM_DTR)
2159 info->serial_signals |= SerialSignal_DTR;
2160 if (clear & TIOCM_RTS)
2161 info->serial_signals &= ~SerialSignal_RTS;
2162 if (clear & TIOCM_DTR)
2163 info->serial_signals &= ~SerialSignal_DTR;
2164
2165 spin_lock_irqsave(&info->lock, flags);
2166 set_signals(info);
2167 spin_unlock_irqrestore(&info->lock, flags);
2168
2169 return 0;
2170 }
2171
2172 /* Set or clear transmit break condition
2173 *
2174 * Arguments: tty pointer to tty instance data
2175 * break_state -1=set break condition, 0=clear
2176 */
mgslpc_break(struct tty_struct * tty,int break_state)2177 static int mgslpc_break(struct tty_struct *tty, int break_state)
2178 {
2179 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2180 unsigned long flags;
2181
2182 if (debug_level >= DEBUG_LEVEL_INFO)
2183 printk("%s(%d):mgslpc_break(%s,%d)\n",
2184 __FILE__, __LINE__, info->device_name, break_state);
2185
2186 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2187 return -EINVAL;
2188
2189 spin_lock_irqsave(&info->lock, flags);
2190 if (break_state == -1)
2191 set_reg_bits(info, CHA+DAFO, BIT6);
2192 else
2193 clear_reg_bits(info, CHA+DAFO, BIT6);
2194 spin_unlock_irqrestore(&info->lock, flags);
2195 return 0;
2196 }
2197
mgslpc_get_icount(struct tty_struct * tty,struct serial_icounter_struct * icount)2198 static int mgslpc_get_icount(struct tty_struct *tty,
2199 struct serial_icounter_struct *icount)
2200 {
2201 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2202 struct mgsl_icount cnow; /* kernel counter temps */
2203 unsigned long flags;
2204
2205 spin_lock_irqsave(&info->lock, flags);
2206 cnow = info->icount;
2207 spin_unlock_irqrestore(&info->lock, flags);
2208
2209 icount->cts = cnow.cts;
2210 icount->dsr = cnow.dsr;
2211 icount->rng = cnow.rng;
2212 icount->dcd = cnow.dcd;
2213 icount->rx = cnow.rx;
2214 icount->tx = cnow.tx;
2215 icount->frame = cnow.frame;
2216 icount->overrun = cnow.overrun;
2217 icount->parity = cnow.parity;
2218 icount->brk = cnow.brk;
2219 icount->buf_overrun = cnow.buf_overrun;
2220
2221 return 0;
2222 }
2223
2224 /* Service an IOCTL request
2225 *
2226 * Arguments:
2227 *
2228 * tty pointer to tty instance data
2229 * cmd IOCTL command code
2230 * arg command argument/context
2231 *
2232 * Return Value: 0 if success, otherwise error code
2233 */
mgslpc_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)2234 static int mgslpc_ioctl(struct tty_struct *tty,
2235 unsigned int cmd, unsigned long arg)
2236 {
2237 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2238 void __user *argp = (void __user *)arg;
2239
2240 if (debug_level >= DEBUG_LEVEL_INFO)
2241 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2242 info->device_name, cmd);
2243
2244 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2245 return -ENODEV;
2246
2247 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2248 (cmd != TIOCMIWAIT)) {
2249 if (tty->flags & (1 << TTY_IO_ERROR))
2250 return -EIO;
2251 }
2252
2253 switch (cmd) {
2254 case MGSL_IOCGPARAMS:
2255 return get_params(info, argp);
2256 case MGSL_IOCSPARAMS:
2257 return set_params(info, argp, tty);
2258 case MGSL_IOCGTXIDLE:
2259 return get_txidle(info, argp);
2260 case MGSL_IOCSTXIDLE:
2261 return set_txidle(info, (int)arg);
2262 case MGSL_IOCGIF:
2263 return get_interface(info, argp);
2264 case MGSL_IOCSIF:
2265 return set_interface(info,(int)arg);
2266 case MGSL_IOCTXENABLE:
2267 return set_txenable(info,(int)arg, tty);
2268 case MGSL_IOCRXENABLE:
2269 return set_rxenable(info,(int)arg);
2270 case MGSL_IOCTXABORT:
2271 return tx_abort(info);
2272 case MGSL_IOCGSTATS:
2273 return get_stats(info, argp);
2274 case MGSL_IOCWAITEVENT:
2275 return wait_events(info, argp);
2276 case TIOCMIWAIT:
2277 return modem_input_wait(info,(int)arg);
2278 default:
2279 return -ENOIOCTLCMD;
2280 }
2281 return 0;
2282 }
2283
2284 /* Set new termios settings
2285 *
2286 * Arguments:
2287 *
2288 * tty pointer to tty structure
2289 * termios pointer to buffer to hold returned old termios
2290 */
mgslpc_set_termios(struct tty_struct * tty,struct ktermios * old_termios)2291 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2292 {
2293 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2294 unsigned long flags;
2295
2296 if (debug_level >= DEBUG_LEVEL_INFO)
2297 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2298 tty->driver->name);
2299
2300 /* just return if nothing has changed */
2301 if ((tty->termios.c_cflag == old_termios->c_cflag)
2302 && (RELEVANT_IFLAG(tty->termios.c_iflag)
2303 == RELEVANT_IFLAG(old_termios->c_iflag)))
2304 return;
2305
2306 mgslpc_change_params(info, tty);
2307
2308 /* Handle transition to B0 status */
2309 if (old_termios->c_cflag & CBAUD &&
2310 !(tty->termios.c_cflag & CBAUD)) {
2311 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2312 spin_lock_irqsave(&info->lock, flags);
2313 set_signals(info);
2314 spin_unlock_irqrestore(&info->lock, flags);
2315 }
2316
2317 /* Handle transition away from B0 status */
2318 if (!(old_termios->c_cflag & CBAUD) &&
2319 tty->termios.c_cflag & CBAUD) {
2320 info->serial_signals |= SerialSignal_DTR;
2321 if (!(tty->termios.c_cflag & CRTSCTS) ||
2322 !test_bit(TTY_THROTTLED, &tty->flags)) {
2323 info->serial_signals |= SerialSignal_RTS;
2324 }
2325 spin_lock_irqsave(&info->lock, flags);
2326 set_signals(info);
2327 spin_unlock_irqrestore(&info->lock, flags);
2328 }
2329
2330 /* Handle turning off CRTSCTS */
2331 if (old_termios->c_cflag & CRTSCTS &&
2332 !(tty->termios.c_cflag & CRTSCTS)) {
2333 tty->hw_stopped = 0;
2334 tx_release(tty);
2335 }
2336 }
2337
mgslpc_close(struct tty_struct * tty,struct file * filp)2338 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2339 {
2340 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2341 struct tty_port *port = &info->port;
2342
2343 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2344 return;
2345
2346 if (debug_level >= DEBUG_LEVEL_INFO)
2347 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2348 __FILE__, __LINE__, info->device_name, port->count);
2349
2350 WARN_ON(!port->count);
2351
2352 if (tty_port_close_start(port, tty, filp) == 0)
2353 goto cleanup;
2354
2355 if (port->flags & ASYNC_INITIALIZED)
2356 mgslpc_wait_until_sent(tty, info->timeout);
2357
2358 mgslpc_flush_buffer(tty);
2359
2360 tty_ldisc_flush(tty);
2361 shutdown(info, tty);
2362
2363 tty_port_close_end(port, tty);
2364 tty_port_tty_set(port, NULL);
2365 cleanup:
2366 if (debug_level >= DEBUG_LEVEL_INFO)
2367 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2368 tty->driver->name, port->count);
2369 }
2370
2371 /* Wait until the transmitter is empty.
2372 */
mgslpc_wait_until_sent(struct tty_struct * tty,int timeout)2373 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2374 {
2375 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2376 unsigned long orig_jiffies, char_time;
2377
2378 if (!info)
2379 return;
2380
2381 if (debug_level >= DEBUG_LEVEL_INFO)
2382 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2383 __FILE__, __LINE__, info->device_name);
2384
2385 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2386 return;
2387
2388 if (!(info->port.flags & ASYNC_INITIALIZED))
2389 goto exit;
2390
2391 orig_jiffies = jiffies;
2392
2393 /* Set check interval to 1/5 of estimated time to
2394 * send a character, and make it at least 1. The check
2395 * interval should also be less than the timeout.
2396 * Note: use tight timings here to satisfy the NIST-PCTS.
2397 */
2398
2399 if (info->params.data_rate) {
2400 char_time = info->timeout/(32 * 5);
2401 if (!char_time)
2402 char_time++;
2403 } else
2404 char_time = 1;
2405
2406 if (timeout)
2407 char_time = min_t(unsigned long, char_time, timeout);
2408
2409 if (info->params.mode == MGSL_MODE_HDLC) {
2410 while (info->tx_active) {
2411 msleep_interruptible(jiffies_to_msecs(char_time));
2412 if (signal_pending(current))
2413 break;
2414 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2415 break;
2416 }
2417 } else {
2418 while ((info->tx_count || info->tx_active) &&
2419 info->tx_enabled) {
2420 msleep_interruptible(jiffies_to_msecs(char_time));
2421 if (signal_pending(current))
2422 break;
2423 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2424 break;
2425 }
2426 }
2427
2428 exit:
2429 if (debug_level >= DEBUG_LEVEL_INFO)
2430 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2431 __FILE__, __LINE__, info->device_name);
2432 }
2433
2434 /* Called by tty_hangup() when a hangup is signaled.
2435 * This is the same as closing all open files for the port.
2436 */
mgslpc_hangup(struct tty_struct * tty)2437 static void mgslpc_hangup(struct tty_struct *tty)
2438 {
2439 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2440
2441 if (debug_level >= DEBUG_LEVEL_INFO)
2442 printk("%s(%d):mgslpc_hangup(%s)\n",
2443 __FILE__, __LINE__, info->device_name);
2444
2445 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2446 return;
2447
2448 mgslpc_flush_buffer(tty);
2449 shutdown(info, tty);
2450 tty_port_hangup(&info->port);
2451 }
2452
carrier_raised(struct tty_port * port)2453 static int carrier_raised(struct tty_port *port)
2454 {
2455 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2456 unsigned long flags;
2457
2458 spin_lock_irqsave(&info->lock, flags);
2459 get_signals(info);
2460 spin_unlock_irqrestore(&info->lock, flags);
2461
2462 if (info->serial_signals & SerialSignal_DCD)
2463 return 1;
2464 return 0;
2465 }
2466
dtr_rts(struct tty_port * port,int onoff)2467 static void dtr_rts(struct tty_port *port, int onoff)
2468 {
2469 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2470 unsigned long flags;
2471
2472 spin_lock_irqsave(&info->lock, flags);
2473 if (onoff)
2474 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2475 else
2476 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2477 set_signals(info);
2478 spin_unlock_irqrestore(&info->lock, flags);
2479 }
2480
2481
mgslpc_open(struct tty_struct * tty,struct file * filp)2482 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2483 {
2484 MGSLPC_INFO *info;
2485 struct tty_port *port;
2486 int retval, line;
2487 unsigned long flags;
2488
2489 /* verify range of specified line number */
2490 line = tty->index;
2491 if (line >= mgslpc_device_count) {
2492 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2493 __FILE__, __LINE__, line);
2494 return -ENODEV;
2495 }
2496
2497 /* find the info structure for the specified line */
2498 info = mgslpc_device_list;
2499 while(info && info->line != line)
2500 info = info->next_device;
2501 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2502 return -ENODEV;
2503
2504 port = &info->port;
2505 tty->driver_data = info;
2506 tty_port_tty_set(port, tty);
2507
2508 if (debug_level >= DEBUG_LEVEL_INFO)
2509 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2510 __FILE__, __LINE__, tty->driver->name, port->count);
2511
2512 /* If port is closing, signal caller to try again */
2513 if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2514 if (port->flags & ASYNC_CLOSING)
2515 interruptible_sleep_on(&port->close_wait);
2516 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2517 -EAGAIN : -ERESTARTSYS);
2518 goto cleanup;
2519 }
2520
2521 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2522
2523 spin_lock_irqsave(&info->netlock, flags);
2524 if (info->netcount) {
2525 retval = -EBUSY;
2526 spin_unlock_irqrestore(&info->netlock, flags);
2527 goto cleanup;
2528 }
2529 spin_lock(&port->lock);
2530 port->count++;
2531 spin_unlock(&port->lock);
2532 spin_unlock_irqrestore(&info->netlock, flags);
2533
2534 if (port->count == 1) {
2535 /* 1st open on this device, init hardware */
2536 retval = startup(info, tty);
2537 if (retval < 0)
2538 goto cleanup;
2539 }
2540
2541 retval = tty_port_block_til_ready(&info->port, tty, filp);
2542 if (retval) {
2543 if (debug_level >= DEBUG_LEVEL_INFO)
2544 printk("%s(%d):block_til_ready(%s) returned %d\n",
2545 __FILE__, __LINE__, info->device_name, retval);
2546 goto cleanup;
2547 }
2548
2549 if (debug_level >= DEBUG_LEVEL_INFO)
2550 printk("%s(%d):mgslpc_open(%s) success\n",
2551 __FILE__, __LINE__, info->device_name);
2552 retval = 0;
2553
2554 cleanup:
2555 return retval;
2556 }
2557
2558 /*
2559 * /proc fs routines....
2560 */
2561
line_info(struct seq_file * m,MGSLPC_INFO * info)2562 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2563 {
2564 char stat_buf[30];
2565 unsigned long flags;
2566
2567 seq_printf(m, "%s:io:%04X irq:%d",
2568 info->device_name, info->io_base, info->irq_level);
2569
2570 /* output current serial signal states */
2571 spin_lock_irqsave(&info->lock, flags);
2572 get_signals(info);
2573 spin_unlock_irqrestore(&info->lock, flags);
2574
2575 stat_buf[0] = 0;
2576 stat_buf[1] = 0;
2577 if (info->serial_signals & SerialSignal_RTS)
2578 strcat(stat_buf, "|RTS");
2579 if (info->serial_signals & SerialSignal_CTS)
2580 strcat(stat_buf, "|CTS");
2581 if (info->serial_signals & SerialSignal_DTR)
2582 strcat(stat_buf, "|DTR");
2583 if (info->serial_signals & SerialSignal_DSR)
2584 strcat(stat_buf, "|DSR");
2585 if (info->serial_signals & SerialSignal_DCD)
2586 strcat(stat_buf, "|CD");
2587 if (info->serial_signals & SerialSignal_RI)
2588 strcat(stat_buf, "|RI");
2589
2590 if (info->params.mode == MGSL_MODE_HDLC) {
2591 seq_printf(m, " HDLC txok:%d rxok:%d",
2592 info->icount.txok, info->icount.rxok);
2593 if (info->icount.txunder)
2594 seq_printf(m, " txunder:%d", info->icount.txunder);
2595 if (info->icount.txabort)
2596 seq_printf(m, " txabort:%d", info->icount.txabort);
2597 if (info->icount.rxshort)
2598 seq_printf(m, " rxshort:%d", info->icount.rxshort);
2599 if (info->icount.rxlong)
2600 seq_printf(m, " rxlong:%d", info->icount.rxlong);
2601 if (info->icount.rxover)
2602 seq_printf(m, " rxover:%d", info->icount.rxover);
2603 if (info->icount.rxcrc)
2604 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2605 } else {
2606 seq_printf(m, " ASYNC tx:%d rx:%d",
2607 info->icount.tx, info->icount.rx);
2608 if (info->icount.frame)
2609 seq_printf(m, " fe:%d", info->icount.frame);
2610 if (info->icount.parity)
2611 seq_printf(m, " pe:%d", info->icount.parity);
2612 if (info->icount.brk)
2613 seq_printf(m, " brk:%d", info->icount.brk);
2614 if (info->icount.overrun)
2615 seq_printf(m, " oe:%d", info->icount.overrun);
2616 }
2617
2618 /* Append serial signal status to end */
2619 seq_printf(m, " %s\n", stat_buf+1);
2620
2621 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2622 info->tx_active,info->bh_requested,info->bh_running,
2623 info->pending_bh);
2624 }
2625
2626 /* Called to print information about devices
2627 */
mgslpc_proc_show(struct seq_file * m,void * v)2628 static int mgslpc_proc_show(struct seq_file *m, void *v)
2629 {
2630 MGSLPC_INFO *info;
2631
2632 seq_printf(m, "synclink driver:%s\n", driver_version);
2633
2634 info = mgslpc_device_list;
2635 while (info) {
2636 line_info(m, info);
2637 info = info->next_device;
2638 }
2639 return 0;
2640 }
2641
mgslpc_proc_open(struct inode * inode,struct file * file)2642 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2643 {
2644 return single_open(file, mgslpc_proc_show, NULL);
2645 }
2646
2647 static const struct file_operations mgslpc_proc_fops = {
2648 .owner = THIS_MODULE,
2649 .open = mgslpc_proc_open,
2650 .read = seq_read,
2651 .llseek = seq_lseek,
2652 .release = single_release,
2653 };
2654
rx_alloc_buffers(MGSLPC_INFO * info)2655 static int rx_alloc_buffers(MGSLPC_INFO *info)
2656 {
2657 /* each buffer has header and data */
2658 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2659
2660 /* calculate total allocation size for 8 buffers */
2661 info->rx_buf_total_size = info->rx_buf_size * 8;
2662
2663 /* limit total allocated memory */
2664 if (info->rx_buf_total_size > 0x10000)
2665 info->rx_buf_total_size = 0x10000;
2666
2667 /* calculate number of buffers */
2668 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2669
2670 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2671 if (info->rx_buf == NULL)
2672 return -ENOMEM;
2673
2674 /* unused flag buffer to satisfy receive_buf calling interface */
2675 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2676 if (!info->flag_buf) {
2677 kfree(info->rx_buf);
2678 info->rx_buf = NULL;
2679 return -ENOMEM;
2680 }
2681
2682 rx_reset_buffers(info);
2683 return 0;
2684 }
2685
rx_free_buffers(MGSLPC_INFO * info)2686 static void rx_free_buffers(MGSLPC_INFO *info)
2687 {
2688 kfree(info->rx_buf);
2689 info->rx_buf = NULL;
2690 kfree(info->flag_buf);
2691 info->flag_buf = NULL;
2692 }
2693
claim_resources(MGSLPC_INFO * info)2694 static int claim_resources(MGSLPC_INFO *info)
2695 {
2696 if (rx_alloc_buffers(info) < 0) {
2697 printk("Can't allocate rx buffer %s\n", info->device_name);
2698 release_resources(info);
2699 return -ENODEV;
2700 }
2701 return 0;
2702 }
2703
release_resources(MGSLPC_INFO * info)2704 static void release_resources(MGSLPC_INFO *info)
2705 {
2706 if (debug_level >= DEBUG_LEVEL_INFO)
2707 printk("release_resources(%s)\n", info->device_name);
2708 rx_free_buffers(info);
2709 }
2710
2711 /* Add the specified device instance data structure to the
2712 * global linked list of devices and increment the device count.
2713 *
2714 * Arguments: info pointer to device instance data
2715 */
mgslpc_add_device(MGSLPC_INFO * info)2716 static int mgslpc_add_device(MGSLPC_INFO *info)
2717 {
2718 MGSLPC_INFO *current_dev = NULL;
2719 struct device *tty_dev;
2720 int ret;
2721
2722 info->next_device = NULL;
2723 info->line = mgslpc_device_count;
2724 sprintf(info->device_name,"ttySLP%d",info->line);
2725
2726 if (info->line < MAX_DEVICE_COUNT) {
2727 if (maxframe[info->line])
2728 info->max_frame_size = maxframe[info->line];
2729 }
2730
2731 mgslpc_device_count++;
2732
2733 if (!mgslpc_device_list)
2734 mgslpc_device_list = info;
2735 else {
2736 current_dev = mgslpc_device_list;
2737 while (current_dev->next_device)
2738 current_dev = current_dev->next_device;
2739 current_dev->next_device = info;
2740 }
2741
2742 if (info->max_frame_size < 4096)
2743 info->max_frame_size = 4096;
2744 else if (info->max_frame_size > 65535)
2745 info->max_frame_size = 65535;
2746
2747 printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2748 info->device_name, info->io_base, info->irq_level);
2749
2750 #if SYNCLINK_GENERIC_HDLC
2751 ret = hdlcdev_init(info);
2752 if (ret != 0)
2753 goto failed;
2754 #endif
2755
2756 tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2757 &info->p_dev->dev);
2758 if (IS_ERR(tty_dev)) {
2759 ret = PTR_ERR(tty_dev);
2760 #if SYNCLINK_GENERIC_HDLC
2761 hdlcdev_exit(info);
2762 #endif
2763 goto failed;
2764 }
2765
2766 return 0;
2767
2768 failed:
2769 if (current_dev)
2770 current_dev->next_device = NULL;
2771 else
2772 mgslpc_device_list = NULL;
2773 mgslpc_device_count--;
2774 return ret;
2775 }
2776
mgslpc_remove_device(MGSLPC_INFO * remove_info)2777 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2778 {
2779 MGSLPC_INFO *info = mgslpc_device_list;
2780 MGSLPC_INFO *last = NULL;
2781
2782 while(info) {
2783 if (info == remove_info) {
2784 if (last)
2785 last->next_device = info->next_device;
2786 else
2787 mgslpc_device_list = info->next_device;
2788 tty_unregister_device(serial_driver, info->line);
2789 #if SYNCLINK_GENERIC_HDLC
2790 hdlcdev_exit(info);
2791 #endif
2792 release_resources(info);
2793 tty_port_destroy(&info->port);
2794 kfree(info);
2795 mgslpc_device_count--;
2796 return;
2797 }
2798 last = info;
2799 info = info->next_device;
2800 }
2801 }
2802
2803 static const struct pcmcia_device_id mgslpc_ids[] = {
2804 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2805 PCMCIA_DEVICE_NULL
2806 };
2807 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2808
2809 static struct pcmcia_driver mgslpc_driver = {
2810 .owner = THIS_MODULE,
2811 .name = "synclink_cs",
2812 .probe = mgslpc_probe,
2813 .remove = mgslpc_detach,
2814 .id_table = mgslpc_ids,
2815 .suspend = mgslpc_suspend,
2816 .resume = mgslpc_resume,
2817 };
2818
2819 static const struct tty_operations mgslpc_ops = {
2820 .open = mgslpc_open,
2821 .close = mgslpc_close,
2822 .write = mgslpc_write,
2823 .put_char = mgslpc_put_char,
2824 .flush_chars = mgslpc_flush_chars,
2825 .write_room = mgslpc_write_room,
2826 .chars_in_buffer = mgslpc_chars_in_buffer,
2827 .flush_buffer = mgslpc_flush_buffer,
2828 .ioctl = mgslpc_ioctl,
2829 .throttle = mgslpc_throttle,
2830 .unthrottle = mgslpc_unthrottle,
2831 .send_xchar = mgslpc_send_xchar,
2832 .break_ctl = mgslpc_break,
2833 .wait_until_sent = mgslpc_wait_until_sent,
2834 .set_termios = mgslpc_set_termios,
2835 .stop = tx_pause,
2836 .start = tx_release,
2837 .hangup = mgslpc_hangup,
2838 .tiocmget = tiocmget,
2839 .tiocmset = tiocmset,
2840 .get_icount = mgslpc_get_icount,
2841 .proc_fops = &mgslpc_proc_fops,
2842 };
2843
synclink_cs_init(void)2844 static int __init synclink_cs_init(void)
2845 {
2846 int rc;
2847
2848 if (break_on_load) {
2849 mgslpc_get_text_ptr();
2850 BREAKPOINT();
2851 }
2852
2853 serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2854 TTY_DRIVER_REAL_RAW |
2855 TTY_DRIVER_DYNAMIC_DEV);
2856 if (IS_ERR(serial_driver)) {
2857 rc = PTR_ERR(serial_driver);
2858 goto err;
2859 }
2860
2861 /* Initialize the tty_driver structure */
2862 serial_driver->driver_name = "synclink_cs";
2863 serial_driver->name = "ttySLP";
2864 serial_driver->major = ttymajor;
2865 serial_driver->minor_start = 64;
2866 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2867 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2868 serial_driver->init_termios = tty_std_termios;
2869 serial_driver->init_termios.c_cflag =
2870 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2871 tty_set_operations(serial_driver, &mgslpc_ops);
2872
2873 rc = tty_register_driver(serial_driver);
2874 if (rc < 0) {
2875 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2876 __FILE__, __LINE__);
2877 goto err_put_tty;
2878 }
2879
2880 rc = pcmcia_register_driver(&mgslpc_driver);
2881 if (rc < 0)
2882 goto err_unreg_tty;
2883
2884 printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2885 serial_driver->major);
2886
2887 return 0;
2888 err_unreg_tty:
2889 tty_unregister_driver(serial_driver);
2890 err_put_tty:
2891 put_tty_driver(serial_driver);
2892 err:
2893 return rc;
2894 }
2895
synclink_cs_exit(void)2896 static void __exit synclink_cs_exit(void)
2897 {
2898 pcmcia_unregister_driver(&mgslpc_driver);
2899 tty_unregister_driver(serial_driver);
2900 put_tty_driver(serial_driver);
2901 }
2902
2903 module_init(synclink_cs_init);
2904 module_exit(synclink_cs_exit);
2905
mgslpc_set_rate(MGSLPC_INFO * info,unsigned char channel,unsigned int rate)2906 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2907 {
2908 unsigned int M, N;
2909 unsigned char val;
2910
2911 /* note:standard BRG mode is broken in V3.2 chip
2912 * so enhanced mode is always used
2913 */
2914
2915 if (rate) {
2916 N = 3686400 / rate;
2917 if (!N)
2918 N = 1;
2919 N >>= 1;
2920 for (M = 1; N > 64 && M < 16; M++)
2921 N >>= 1;
2922 N--;
2923
2924 /* BGR[5..0] = N
2925 * BGR[9..6] = M
2926 * BGR[7..0] contained in BGR register
2927 * BGR[9..8] contained in CCR2[7..6]
2928 * divisor = (N+1)*2^M
2929 *
2930 * Note: M *must* not be zero (causes asymetric duty cycle)
2931 */
2932 write_reg(info, (unsigned char) (channel + BGR),
2933 (unsigned char) ((M << 6) + N));
2934 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2935 val |= ((M << 4) & 0xc0);
2936 write_reg(info, (unsigned char) (channel + CCR2), val);
2937 }
2938 }
2939
2940 /* Enabled the AUX clock output at the specified frequency.
2941 */
enable_auxclk(MGSLPC_INFO * info)2942 static void enable_auxclk(MGSLPC_INFO *info)
2943 {
2944 unsigned char val;
2945
2946 /* MODE
2947 *
2948 * 07..06 MDS[1..0] 10 = transparent HDLC mode
2949 * 05 ADM Address Mode, 0 = no addr recognition
2950 * 04 TMD Timer Mode, 0 = external
2951 * 03 RAC Receiver Active, 0 = inactive
2952 * 02 RTS 0=RTS active during xmit, 1=RTS always active
2953 * 01 TRS Timer Resolution, 1=512
2954 * 00 TLP Test Loop, 0 = no loop
2955 *
2956 * 1000 0010
2957 */
2958 val = 0x82;
2959
2960 /* channel B RTS is used to enable AUXCLK driver on SP505 */
2961 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2962 val |= BIT2;
2963 write_reg(info, CHB + MODE, val);
2964
2965 /* CCR0
2966 *
2967 * 07 PU Power Up, 1=active, 0=power down
2968 * 06 MCE Master Clock Enable, 1=enabled
2969 * 05 Reserved, 0
2970 * 04..02 SC[2..0] Encoding
2971 * 01..00 SM[1..0] Serial Mode, 00=HDLC
2972 *
2973 * 11000000
2974 */
2975 write_reg(info, CHB + CCR0, 0xc0);
2976
2977 /* CCR1
2978 *
2979 * 07 SFLG Shared Flag, 0 = disable shared flags
2980 * 06 GALP Go Active On Loop, 0 = not used
2981 * 05 GLP Go On Loop, 0 = not used
2982 * 04 ODS Output Driver Select, 1=TxD is push-pull output
2983 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
2984 * 02..00 CM[2..0] Clock Mode
2985 *
2986 * 0001 0111
2987 */
2988 write_reg(info, CHB + CCR1, 0x17);
2989
2990 /* CCR2 (Channel B)
2991 *
2992 * 07..06 BGR[9..8] Baud rate bits 9..8
2993 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
2994 * 04 SSEL Clock source select, 1=submode b
2995 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
2996 * 02 RWX Read/Write Exchange 0=disabled
2997 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
2998 * 00 DIV, data inversion 0=disabled, 1=enabled
2999 *
3000 * 0011 1000
3001 */
3002 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3003 write_reg(info, CHB + CCR2, 0x38);
3004 else
3005 write_reg(info, CHB + CCR2, 0x30);
3006
3007 /* CCR4
3008 *
3009 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3010 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3011 * 05 TST1 Test Pin, 0=normal operation
3012 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3013 * 03..02 Reserved, must be 0
3014 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3015 *
3016 * 0101 0000
3017 */
3018 write_reg(info, CHB + CCR4, 0x50);
3019
3020 /* if auxclk not enabled, set internal BRG so
3021 * CTS transitions can be detected (requires TxC)
3022 */
3023 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3024 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3025 else
3026 mgslpc_set_rate(info, CHB, 921600);
3027 }
3028
loopback_enable(MGSLPC_INFO * info)3029 static void loopback_enable(MGSLPC_INFO *info)
3030 {
3031 unsigned char val;
3032
3033 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3034 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3035 write_reg(info, CHA + CCR1, val);
3036
3037 /* CCR2:04 SSEL Clock source select, 1=submode b */
3038 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3039 write_reg(info, CHA + CCR2, val);
3040
3041 /* set LinkSpeed if available, otherwise default to 2Mbps */
3042 if (info->params.clock_speed)
3043 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3044 else
3045 mgslpc_set_rate(info, CHA, 1843200);
3046
3047 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3048 val = read_reg(info, CHA + MODE) | BIT0;
3049 write_reg(info, CHA + MODE, val);
3050 }
3051
hdlc_mode(MGSLPC_INFO * info)3052 static void hdlc_mode(MGSLPC_INFO *info)
3053 {
3054 unsigned char val;
3055 unsigned char clkmode, clksubmode;
3056
3057 /* disable all interrupts */
3058 irq_disable(info, CHA, 0xffff);
3059 irq_disable(info, CHB, 0xffff);
3060 port_irq_disable(info, 0xff);
3061
3062 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3063 clkmode = clksubmode = 0;
3064 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3065 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3066 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3067 clkmode = 7;
3068 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3069 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3070 /* clock mode 7b, rcv = BRG, xmt = BRG */
3071 clkmode = 7;
3072 clksubmode = 1;
3073 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3074 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3075 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3076 clkmode = 6;
3077 clksubmode = 1;
3078 } else {
3079 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3080 clkmode = 6;
3081 }
3082 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3083 /* clock mode 0b, rcv = RxC, xmt = BRG */
3084 clksubmode = 1;
3085 }
3086
3087 /* MODE
3088 *
3089 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3090 * 05 ADM Address Mode, 0 = no addr recognition
3091 * 04 TMD Timer Mode, 0 = external
3092 * 03 RAC Receiver Active, 0 = inactive
3093 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3094 * 01 TRS Timer Resolution, 1=512
3095 * 00 TLP Test Loop, 0 = no loop
3096 *
3097 * 1000 0010
3098 */
3099 val = 0x82;
3100 if (info->params.loopback)
3101 val |= BIT0;
3102
3103 /* preserve RTS state */
3104 if (info->serial_signals & SerialSignal_RTS)
3105 val |= BIT2;
3106 write_reg(info, CHA + MODE, val);
3107
3108 /* CCR0
3109 *
3110 * 07 PU Power Up, 1=active, 0=power down
3111 * 06 MCE Master Clock Enable, 1=enabled
3112 * 05 Reserved, 0
3113 * 04..02 SC[2..0] Encoding
3114 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3115 *
3116 * 11000000
3117 */
3118 val = 0xc0;
3119 switch (info->params.encoding)
3120 {
3121 case HDLC_ENCODING_NRZI:
3122 val |= BIT3;
3123 break;
3124 case HDLC_ENCODING_BIPHASE_SPACE:
3125 val |= BIT4;
3126 break; // FM0
3127 case HDLC_ENCODING_BIPHASE_MARK:
3128 val |= BIT4 + BIT2;
3129 break; // FM1
3130 case HDLC_ENCODING_BIPHASE_LEVEL:
3131 val |= BIT4 + BIT3;
3132 break; // Manchester
3133 }
3134 write_reg(info, CHA + CCR0, val);
3135
3136 /* CCR1
3137 *
3138 * 07 SFLG Shared Flag, 0 = disable shared flags
3139 * 06 GALP Go Active On Loop, 0 = not used
3140 * 05 GLP Go On Loop, 0 = not used
3141 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3142 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3143 * 02..00 CM[2..0] Clock Mode
3144 *
3145 * 0001 0000
3146 */
3147 val = 0x10 + clkmode;
3148 write_reg(info, CHA + CCR1, val);
3149
3150 /* CCR2
3151 *
3152 * 07..06 BGR[9..8] Baud rate bits 9..8
3153 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3154 * 04 SSEL Clock source select, 1=submode b
3155 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3156 * 02 RWX Read/Write Exchange 0=disabled
3157 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3158 * 00 DIV, data inversion 0=disabled, 1=enabled
3159 *
3160 * 0000 0000
3161 */
3162 val = 0x00;
3163 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3164 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3165 val |= BIT5;
3166 if (clksubmode)
3167 val |= BIT4;
3168 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3169 val |= BIT1;
3170 if (info->params.encoding == HDLC_ENCODING_NRZB)
3171 val |= BIT0;
3172 write_reg(info, CHA + CCR2, val);
3173
3174 /* CCR3
3175 *
3176 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3177 * 05 EPT Enable preamble transmission, 1=enabled
3178 * 04 RADD Receive address pushed to FIFO, 0=disabled
3179 * 03 CRL CRC Reset Level, 0=FFFF
3180 * 02 RCRC Rx CRC 0=On 1=Off
3181 * 01 TCRC Tx CRC 0=On 1=Off
3182 * 00 PSD DPLL Phase Shift Disable
3183 *
3184 * 0000 0000
3185 */
3186 val = 0x00;
3187 if (info->params.crc_type == HDLC_CRC_NONE)
3188 val |= BIT2 + BIT1;
3189 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3190 val |= BIT5;
3191 switch (info->params.preamble_length)
3192 {
3193 case HDLC_PREAMBLE_LENGTH_16BITS:
3194 val |= BIT6;
3195 break;
3196 case HDLC_PREAMBLE_LENGTH_32BITS:
3197 val |= BIT6;
3198 break;
3199 case HDLC_PREAMBLE_LENGTH_64BITS:
3200 val |= BIT7 + BIT6;
3201 break;
3202 }
3203 write_reg(info, CHA + CCR3, val);
3204
3205 /* PRE - Preamble pattern */
3206 val = 0;
3207 switch (info->params.preamble)
3208 {
3209 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3210 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3211 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3212 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3213 }
3214 write_reg(info, CHA + PRE, val);
3215
3216 /* CCR4
3217 *
3218 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3219 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3220 * 05 TST1 Test Pin, 0=normal operation
3221 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3222 * 03..02 Reserved, must be 0
3223 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3224 *
3225 * 0101 0000
3226 */
3227 val = 0x50;
3228 write_reg(info, CHA + CCR4, val);
3229 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3230 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3231 else
3232 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3233
3234 /* RLCR Receive length check register
3235 *
3236 * 7 1=enable receive length check
3237 * 6..0 Max frame length = (RL + 1) * 32
3238 */
3239 write_reg(info, CHA + RLCR, 0);
3240
3241 /* XBCH Transmit Byte Count High
3242 *
3243 * 07 DMA mode, 0 = interrupt driven
3244 * 06 NRM, 0=ABM (ignored)
3245 * 05 CAS Carrier Auto Start
3246 * 04 XC Transmit Continuously (ignored)
3247 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3248 *
3249 * 0000 0000
3250 */
3251 val = 0x00;
3252 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3253 val |= BIT5;
3254 write_reg(info, CHA + XBCH, val);
3255 enable_auxclk(info);
3256 if (info->params.loopback || info->testing_irq)
3257 loopback_enable(info);
3258 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3259 {
3260 irq_enable(info, CHB, IRQ_CTS);
3261 /* PVR[3] 1=AUTO CTS active */
3262 set_reg_bits(info, CHA + PVR, BIT3);
3263 } else
3264 clear_reg_bits(info, CHA + PVR, BIT3);
3265
3266 irq_enable(info, CHA,
3267 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3268 IRQ_UNDERRUN + IRQ_TXFIFO);
3269 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3270 wait_command_complete(info, CHA);
3271 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3272
3273 /* Master clock mode enabled above to allow reset commands
3274 * to complete even if no data clocks are present.
3275 *
3276 * Disable master clock mode for normal communications because
3277 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3278 * IRQ when in master clock mode.
3279 *
3280 * Leave master clock mode enabled for IRQ test because the
3281 * timer IRQ used by the test can only happen in master clock mode.
3282 */
3283 if (!info->testing_irq)
3284 clear_reg_bits(info, CHA + CCR0, BIT6);
3285
3286 tx_set_idle(info);
3287
3288 tx_stop(info);
3289 rx_stop(info);
3290 }
3291
rx_stop(MGSLPC_INFO * info)3292 static void rx_stop(MGSLPC_INFO *info)
3293 {
3294 if (debug_level >= DEBUG_LEVEL_ISR)
3295 printk("%s(%d):rx_stop(%s)\n",
3296 __FILE__, __LINE__, info->device_name);
3297
3298 /* MODE:03 RAC Receiver Active, 0=inactive */
3299 clear_reg_bits(info, CHA + MODE, BIT3);
3300
3301 info->rx_enabled = false;
3302 info->rx_overflow = false;
3303 }
3304
rx_start(MGSLPC_INFO * info)3305 static void rx_start(MGSLPC_INFO *info)
3306 {
3307 if (debug_level >= DEBUG_LEVEL_ISR)
3308 printk("%s(%d):rx_start(%s)\n",
3309 __FILE__, __LINE__, info->device_name);
3310
3311 rx_reset_buffers(info);
3312 info->rx_enabled = false;
3313 info->rx_overflow = false;
3314
3315 /* MODE:03 RAC Receiver Active, 1=active */
3316 set_reg_bits(info, CHA + MODE, BIT3);
3317
3318 info->rx_enabled = true;
3319 }
3320
tx_start(MGSLPC_INFO * info,struct tty_struct * tty)3321 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3322 {
3323 if (debug_level >= DEBUG_LEVEL_ISR)
3324 printk("%s(%d):tx_start(%s)\n",
3325 __FILE__, __LINE__, info->device_name);
3326
3327 if (info->tx_count) {
3328 /* If auto RTS enabled and RTS is inactive, then assert */
3329 /* RTS and set a flag indicating that the driver should */
3330 /* negate RTS when the transmission completes. */
3331 info->drop_rts_on_tx_done = false;
3332
3333 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3334 get_signals(info);
3335 if (!(info->serial_signals & SerialSignal_RTS)) {
3336 info->serial_signals |= SerialSignal_RTS;
3337 set_signals(info);
3338 info->drop_rts_on_tx_done = true;
3339 }
3340 }
3341
3342 if (info->params.mode == MGSL_MODE_ASYNC) {
3343 if (!info->tx_active) {
3344 info->tx_active = true;
3345 tx_ready(info, tty);
3346 }
3347 } else {
3348 info->tx_active = true;
3349 tx_ready(info, tty);
3350 mod_timer(&info->tx_timer, jiffies +
3351 msecs_to_jiffies(5000));
3352 }
3353 }
3354
3355 if (!info->tx_enabled)
3356 info->tx_enabled = true;
3357 }
3358
tx_stop(MGSLPC_INFO * info)3359 static void tx_stop(MGSLPC_INFO *info)
3360 {
3361 if (debug_level >= DEBUG_LEVEL_ISR)
3362 printk("%s(%d):tx_stop(%s)\n",
3363 __FILE__, __LINE__, info->device_name);
3364
3365 del_timer(&info->tx_timer);
3366
3367 info->tx_enabled = false;
3368 info->tx_active = false;
3369 }
3370
3371 /* Reset the adapter to a known state and prepare it for further use.
3372 */
reset_device(MGSLPC_INFO * info)3373 static void reset_device(MGSLPC_INFO *info)
3374 {
3375 /* power up both channels (set BIT7) */
3376 write_reg(info, CHA + CCR0, 0x80);
3377 write_reg(info, CHB + CCR0, 0x80);
3378 write_reg(info, CHA + MODE, 0);
3379 write_reg(info, CHB + MODE, 0);
3380
3381 /* disable all interrupts */
3382 irq_disable(info, CHA, 0xffff);
3383 irq_disable(info, CHB, 0xffff);
3384 port_irq_disable(info, 0xff);
3385
3386 /* PCR Port Configuration Register
3387 *
3388 * 07..04 DEC[3..0] Serial I/F select outputs
3389 * 03 output, 1=AUTO CTS control enabled
3390 * 02 RI Ring Indicator input 0=active
3391 * 01 DSR input 0=active
3392 * 00 DTR output 0=active
3393 *
3394 * 0000 0110
3395 */
3396 write_reg(info, PCR, 0x06);
3397
3398 /* PVR Port Value Register
3399 *
3400 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3401 * 03 AUTO CTS output 1=enabled
3402 * 02 RI Ring Indicator input
3403 * 01 DSR input
3404 * 00 DTR output (1=inactive)
3405 *
3406 * 0000 0001
3407 */
3408 // write_reg(info, PVR, PVR_DTR);
3409
3410 /* IPC Interrupt Port Configuration
3411 *
3412 * 07 VIS 1=Masked interrupts visible
3413 * 06..05 Reserved, 0
3414 * 04..03 SLA Slave address, 00 ignored
3415 * 02 CASM Cascading Mode, 1=daisy chain
3416 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3417 *
3418 * 0000 0101
3419 */
3420 write_reg(info, IPC, 0x05);
3421 }
3422
async_mode(MGSLPC_INFO * info)3423 static void async_mode(MGSLPC_INFO *info)
3424 {
3425 unsigned char val;
3426
3427 /* disable all interrupts */
3428 irq_disable(info, CHA, 0xffff);
3429 irq_disable(info, CHB, 0xffff);
3430 port_irq_disable(info, 0xff);
3431
3432 /* MODE
3433 *
3434 * 07 Reserved, 0
3435 * 06 FRTS RTS State, 0=active
3436 * 05 FCTS Flow Control on CTS
3437 * 04 FLON Flow Control Enable
3438 * 03 RAC Receiver Active, 0 = inactive
3439 * 02 RTS 0=Auto RTS, 1=manual RTS
3440 * 01 TRS Timer Resolution, 1=512
3441 * 00 TLP Test Loop, 0 = no loop
3442 *
3443 * 0000 0110
3444 */
3445 val = 0x06;
3446 if (info->params.loopback)
3447 val |= BIT0;
3448
3449 /* preserve RTS state */
3450 if (!(info->serial_signals & SerialSignal_RTS))
3451 val |= BIT6;
3452 write_reg(info, CHA + MODE, val);
3453
3454 /* CCR0
3455 *
3456 * 07 PU Power Up, 1=active, 0=power down
3457 * 06 MCE Master Clock Enable, 1=enabled
3458 * 05 Reserved, 0
3459 * 04..02 SC[2..0] Encoding, 000=NRZ
3460 * 01..00 SM[1..0] Serial Mode, 11=Async
3461 *
3462 * 1000 0011
3463 */
3464 write_reg(info, CHA + CCR0, 0x83);
3465
3466 /* CCR1
3467 *
3468 * 07..05 Reserved, 0
3469 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3470 * 03 BCR Bit Clock Rate, 1=16x
3471 * 02..00 CM[2..0] Clock Mode, 111=BRG
3472 *
3473 * 0001 1111
3474 */
3475 write_reg(info, CHA + CCR1, 0x1f);
3476
3477 /* CCR2 (channel A)
3478 *
3479 * 07..06 BGR[9..8] Baud rate bits 9..8
3480 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3481 * 04 SSEL Clock source select, 1=submode b
3482 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3483 * 02 RWX Read/Write Exchange 0=disabled
3484 * 01 Reserved, 0
3485 * 00 DIV, data inversion 0=disabled, 1=enabled
3486 *
3487 * 0001 0000
3488 */
3489 write_reg(info, CHA + CCR2, 0x10);
3490
3491 /* CCR3
3492 *
3493 * 07..01 Reserved, 0
3494 * 00 PSD DPLL Phase Shift Disable
3495 *
3496 * 0000 0000
3497 */
3498 write_reg(info, CHA + CCR3, 0);
3499
3500 /* CCR4
3501 *
3502 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3503 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3504 * 05 TST1 Test Pin, 0=normal operation
3505 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3506 * 03..00 Reserved, must be 0
3507 *
3508 * 0101 0000
3509 */
3510 write_reg(info, CHA + CCR4, 0x50);
3511 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3512
3513 /* DAFO Data Format
3514 *
3515 * 07 Reserved, 0
3516 * 06 XBRK transmit break, 0=normal operation
3517 * 05 Stop bits (0=1, 1=2)
3518 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3519 * 02 PAREN Parity Enable
3520 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3521 *
3522 */
3523 val = 0x00;
3524 if (info->params.data_bits != 8)
3525 val |= BIT0; /* 7 bits */
3526 if (info->params.stop_bits != 1)
3527 val |= BIT5;
3528 if (info->params.parity != ASYNC_PARITY_NONE)
3529 {
3530 val |= BIT2; /* Parity enable */
3531 if (info->params.parity == ASYNC_PARITY_ODD)
3532 val |= BIT3;
3533 else
3534 val |= BIT4;
3535 }
3536 write_reg(info, CHA + DAFO, val);
3537
3538 /* RFC Rx FIFO Control
3539 *
3540 * 07 Reserved, 0
3541 * 06 DPS, 1=parity bit not stored in data byte
3542 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3543 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3544 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3545 * 01 Reserved, 0
3546 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3547 *
3548 * 0101 1100
3549 */
3550 write_reg(info, CHA + RFC, 0x5c);
3551
3552 /* RLCR Receive length check register
3553 *
3554 * Max frame length = (RL + 1) * 32
3555 */
3556 write_reg(info, CHA + RLCR, 0);
3557
3558 /* XBCH Transmit Byte Count High
3559 *
3560 * 07 DMA mode, 0 = interrupt driven
3561 * 06 NRM, 0=ABM (ignored)
3562 * 05 CAS Carrier Auto Start
3563 * 04 XC Transmit Continuously (ignored)
3564 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3565 *
3566 * 0000 0000
3567 */
3568 val = 0x00;
3569 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3570 val |= BIT5;
3571 write_reg(info, CHA + XBCH, val);
3572 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3573 irq_enable(info, CHA, IRQ_CTS);
3574
3575 /* MODE:03 RAC Receiver Active, 1=active */
3576 set_reg_bits(info, CHA + MODE, BIT3);
3577 enable_auxclk(info);
3578 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3579 irq_enable(info, CHB, IRQ_CTS);
3580 /* PVR[3] 1=AUTO CTS active */
3581 set_reg_bits(info, CHA + PVR, BIT3);
3582 } else
3583 clear_reg_bits(info, CHA + PVR, BIT3);
3584 irq_enable(info, CHA,
3585 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3586 IRQ_ALLSENT + IRQ_TXFIFO);
3587 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3588 wait_command_complete(info, CHA);
3589 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3590 }
3591
3592 /* Set the HDLC idle mode for the transmitter.
3593 */
tx_set_idle(MGSLPC_INFO * info)3594 static void tx_set_idle(MGSLPC_INFO *info)
3595 {
3596 /* Note: ESCC2 only supports flags and one idle modes */
3597 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3598 set_reg_bits(info, CHA + CCR1, BIT3);
3599 else
3600 clear_reg_bits(info, CHA + CCR1, BIT3);
3601 }
3602
3603 /* get state of the V24 status (input) signals.
3604 */
get_signals(MGSLPC_INFO * info)3605 static void get_signals(MGSLPC_INFO *info)
3606 {
3607 unsigned char status = 0;
3608
3609 /* preserve RTS and DTR */
3610 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3611
3612 if (read_reg(info, CHB + VSTR) & BIT7)
3613 info->serial_signals |= SerialSignal_DCD;
3614 if (read_reg(info, CHB + STAR) & BIT1)
3615 info->serial_signals |= SerialSignal_CTS;
3616
3617 status = read_reg(info, CHA + PVR);
3618 if (!(status & PVR_RI))
3619 info->serial_signals |= SerialSignal_RI;
3620 if (!(status & PVR_DSR))
3621 info->serial_signals |= SerialSignal_DSR;
3622 }
3623
3624 /* Set the state of RTS and DTR based on contents of
3625 * serial_signals member of device extension.
3626 */
set_signals(MGSLPC_INFO * info)3627 static void set_signals(MGSLPC_INFO *info)
3628 {
3629 unsigned char val;
3630
3631 val = read_reg(info, CHA + MODE);
3632 if (info->params.mode == MGSL_MODE_ASYNC) {
3633 if (info->serial_signals & SerialSignal_RTS)
3634 val &= ~BIT6;
3635 else
3636 val |= BIT6;
3637 } else {
3638 if (info->serial_signals & SerialSignal_RTS)
3639 val |= BIT2;
3640 else
3641 val &= ~BIT2;
3642 }
3643 write_reg(info, CHA + MODE, val);
3644
3645 if (info->serial_signals & SerialSignal_DTR)
3646 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3647 else
3648 set_reg_bits(info, CHA + PVR, PVR_DTR);
3649 }
3650
rx_reset_buffers(MGSLPC_INFO * info)3651 static void rx_reset_buffers(MGSLPC_INFO *info)
3652 {
3653 RXBUF *buf;
3654 int i;
3655
3656 info->rx_put = 0;
3657 info->rx_get = 0;
3658 info->rx_frame_count = 0;
3659 for (i=0 ; i < info->rx_buf_count ; i++) {
3660 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3661 buf->status = buf->count = 0;
3662 }
3663 }
3664
3665 /* Attempt to return a received HDLC frame
3666 * Only frames received without errors are returned.
3667 *
3668 * Returns true if frame returned, otherwise false
3669 */
rx_get_frame(MGSLPC_INFO * info,struct tty_struct * tty)3670 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3671 {
3672 unsigned short status;
3673 RXBUF *buf;
3674 unsigned int framesize = 0;
3675 unsigned long flags;
3676 bool return_frame = false;
3677
3678 if (info->rx_frame_count == 0)
3679 return false;
3680
3681 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3682
3683 status = buf->status;
3684
3685 /* 07 VFR 1=valid frame
3686 * 06 RDO 1=data overrun
3687 * 05 CRC 1=OK, 0=error
3688 * 04 RAB 1=frame aborted
3689 */
3690 if ((status & 0xf0) != 0xA0) {
3691 if (!(status & BIT7) || (status & BIT4))
3692 info->icount.rxabort++;
3693 else if (status & BIT6)
3694 info->icount.rxover++;
3695 else if (!(status & BIT5)) {
3696 info->icount.rxcrc++;
3697 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3698 return_frame = true;
3699 }
3700 framesize = 0;
3701 #if SYNCLINK_GENERIC_HDLC
3702 {
3703 info->netdev->stats.rx_errors++;
3704 info->netdev->stats.rx_frame_errors++;
3705 }
3706 #endif
3707 } else
3708 return_frame = true;
3709
3710 if (return_frame)
3711 framesize = buf->count;
3712
3713 if (debug_level >= DEBUG_LEVEL_BH)
3714 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3715 __FILE__, __LINE__, info->device_name, status, framesize);
3716
3717 if (debug_level >= DEBUG_LEVEL_DATA)
3718 trace_block(info, buf->data, framesize, 0);
3719
3720 if (framesize) {
3721 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3722 framesize+1 > info->max_frame_size) ||
3723 framesize > info->max_frame_size)
3724 info->icount.rxlong++;
3725 else {
3726 if (status & BIT5)
3727 info->icount.rxok++;
3728
3729 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3730 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3731 ++framesize;
3732 }
3733
3734 #if SYNCLINK_GENERIC_HDLC
3735 if (info->netcount)
3736 hdlcdev_rx(info, buf->data, framesize);
3737 else
3738 #endif
3739 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3740 }
3741 }
3742
3743 spin_lock_irqsave(&info->lock, flags);
3744 buf->status = buf->count = 0;
3745 info->rx_frame_count--;
3746 info->rx_get++;
3747 if (info->rx_get >= info->rx_buf_count)
3748 info->rx_get = 0;
3749 spin_unlock_irqrestore(&info->lock, flags);
3750
3751 return true;
3752 }
3753
register_test(MGSLPC_INFO * info)3754 static bool register_test(MGSLPC_INFO *info)
3755 {
3756 static unsigned char patterns[] =
3757 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3758 static unsigned int count = ARRAY_SIZE(patterns);
3759 unsigned int i;
3760 bool rc = true;
3761 unsigned long flags;
3762
3763 spin_lock_irqsave(&info->lock, flags);
3764 reset_device(info);
3765
3766 for (i = 0; i < count; i++) {
3767 write_reg(info, XAD1, patterns[i]);
3768 write_reg(info, XAD2, patterns[(i + 1) % count]);
3769 if ((read_reg(info, XAD1) != patterns[i]) ||
3770 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3771 rc = false;
3772 break;
3773 }
3774 }
3775
3776 spin_unlock_irqrestore(&info->lock, flags);
3777 return rc;
3778 }
3779
irq_test(MGSLPC_INFO * info)3780 static bool irq_test(MGSLPC_INFO *info)
3781 {
3782 unsigned long end_time;
3783 unsigned long flags;
3784
3785 spin_lock_irqsave(&info->lock, flags);
3786 reset_device(info);
3787
3788 info->testing_irq = true;
3789 hdlc_mode(info);
3790
3791 info->irq_occurred = false;
3792
3793 /* init hdlc mode */
3794
3795 irq_enable(info, CHA, IRQ_TIMER);
3796 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3797 issue_command(info, CHA, CMD_START_TIMER);
3798
3799 spin_unlock_irqrestore(&info->lock, flags);
3800
3801 end_time=100;
3802 while(end_time-- && !info->irq_occurred) {
3803 msleep_interruptible(10);
3804 }
3805
3806 info->testing_irq = false;
3807
3808 spin_lock_irqsave(&info->lock, flags);
3809 reset_device(info);
3810 spin_unlock_irqrestore(&info->lock, flags);
3811
3812 return info->irq_occurred;
3813 }
3814
adapter_test(MGSLPC_INFO * info)3815 static int adapter_test(MGSLPC_INFO *info)
3816 {
3817 if (!register_test(info)) {
3818 info->init_error = DiagStatus_AddressFailure;
3819 printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3820 __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3821 return -ENODEV;
3822 }
3823
3824 if (!irq_test(info)) {
3825 info->init_error = DiagStatus_IrqFailure;
3826 printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3827 __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3828 return -ENODEV;
3829 }
3830
3831 if (debug_level >= DEBUG_LEVEL_INFO)
3832 printk("%s(%d):device %s passed diagnostics\n",
3833 __FILE__, __LINE__, info->device_name);
3834 return 0;
3835 }
3836
trace_block(MGSLPC_INFO * info,const char * data,int count,int xmit)3837 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3838 {
3839 int i;
3840 int linecount;
3841 if (xmit)
3842 printk("%s tx data:\n", info->device_name);
3843 else
3844 printk("%s rx data:\n", info->device_name);
3845
3846 while(count) {
3847 if (count > 16)
3848 linecount = 16;
3849 else
3850 linecount = count;
3851
3852 for(i=0;i<linecount;i++)
3853 printk("%02X ", (unsigned char)data[i]);
3854 for(;i<17;i++)
3855 printk(" ");
3856 for(i=0;i<linecount;i++) {
3857 if (data[i]>=040 && data[i]<=0176)
3858 printk("%c", data[i]);
3859 else
3860 printk(".");
3861 }
3862 printk("\n");
3863
3864 data += linecount;
3865 count -= linecount;
3866 }
3867 }
3868
3869 /* HDLC frame time out
3870 * update stats and do tx completion processing
3871 */
tx_timeout(unsigned long context)3872 static void tx_timeout(unsigned long context)
3873 {
3874 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3875 unsigned long flags;
3876
3877 if (debug_level >= DEBUG_LEVEL_INFO)
3878 printk("%s(%d):tx_timeout(%s)\n",
3879 __FILE__, __LINE__, info->device_name);
3880 if (info->tx_active &&
3881 info->params.mode == MGSL_MODE_HDLC) {
3882 info->icount.txtimeout++;
3883 }
3884 spin_lock_irqsave(&info->lock, flags);
3885 info->tx_active = false;
3886 info->tx_count = info->tx_put = info->tx_get = 0;
3887
3888 spin_unlock_irqrestore(&info->lock, flags);
3889
3890 #if SYNCLINK_GENERIC_HDLC
3891 if (info->netcount)
3892 hdlcdev_tx_done(info);
3893 else
3894 #endif
3895 {
3896 struct tty_struct *tty = tty_port_tty_get(&info->port);
3897 bh_transmit(info, tty);
3898 tty_kref_put(tty);
3899 }
3900 }
3901
3902 #if SYNCLINK_GENERIC_HDLC
3903
3904 /**
3905 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3906 * set encoding and frame check sequence (FCS) options
3907 *
3908 * dev pointer to network device structure
3909 * encoding serial encoding setting
3910 * parity FCS setting
3911 *
3912 * returns 0 if success, otherwise error code
3913 */
hdlcdev_attach(struct net_device * dev,unsigned short encoding,unsigned short parity)3914 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3915 unsigned short parity)
3916 {
3917 MGSLPC_INFO *info = dev_to_port(dev);
3918 struct tty_struct *tty;
3919 unsigned char new_encoding;
3920 unsigned short new_crctype;
3921
3922 /* return error if TTY interface open */
3923 if (info->port.count)
3924 return -EBUSY;
3925
3926 switch (encoding)
3927 {
3928 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
3929 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3930 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3931 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3932 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3933 default: return -EINVAL;
3934 }
3935
3936 switch (parity)
3937 {
3938 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
3939 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3940 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3941 default: return -EINVAL;
3942 }
3943
3944 info->params.encoding = new_encoding;
3945 info->params.crc_type = new_crctype;
3946
3947 /* if network interface up, reprogram hardware */
3948 if (info->netcount) {
3949 tty = tty_port_tty_get(&info->port);
3950 mgslpc_program_hw(info, tty);
3951 tty_kref_put(tty);
3952 }
3953
3954 return 0;
3955 }
3956
3957 /**
3958 * called by generic HDLC layer to send frame
3959 *
3960 * skb socket buffer containing HDLC frame
3961 * dev pointer to network device structure
3962 */
hdlcdev_xmit(struct sk_buff * skb,struct net_device * dev)3963 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3964 struct net_device *dev)
3965 {
3966 MGSLPC_INFO *info = dev_to_port(dev);
3967 unsigned long flags;
3968
3969 if (debug_level >= DEBUG_LEVEL_INFO)
3970 printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3971
3972 /* stop sending until this frame completes */
3973 netif_stop_queue(dev);
3974
3975 /* copy data to device buffers */
3976 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3977 info->tx_get = 0;
3978 info->tx_put = info->tx_count = skb->len;
3979
3980 /* update network statistics */
3981 dev->stats.tx_packets++;
3982 dev->stats.tx_bytes += skb->len;
3983
3984 /* done with socket buffer, so free it */
3985 dev_kfree_skb(skb);
3986
3987 /* save start time for transmit timeout detection */
3988 dev->trans_start = jiffies;
3989
3990 /* start hardware transmitter if necessary */
3991 spin_lock_irqsave(&info->lock, flags);
3992 if (!info->tx_active) {
3993 struct tty_struct *tty = tty_port_tty_get(&info->port);
3994 tx_start(info, tty);
3995 tty_kref_put(tty);
3996 }
3997 spin_unlock_irqrestore(&info->lock, flags);
3998
3999 return NETDEV_TX_OK;
4000 }
4001
4002 /**
4003 * called by network layer when interface enabled
4004 * claim resources and initialize hardware
4005 *
4006 * dev pointer to network device structure
4007 *
4008 * returns 0 if success, otherwise error code
4009 */
hdlcdev_open(struct net_device * dev)4010 static int hdlcdev_open(struct net_device *dev)
4011 {
4012 MGSLPC_INFO *info = dev_to_port(dev);
4013 struct tty_struct *tty;
4014 int rc;
4015 unsigned long flags;
4016
4017 if (debug_level >= DEBUG_LEVEL_INFO)
4018 printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
4019
4020 /* generic HDLC layer open processing */
4021 rc = hdlc_open(dev);
4022 if (rc != 0)
4023 return rc;
4024
4025 /* arbitrate between network and tty opens */
4026 spin_lock_irqsave(&info->netlock, flags);
4027 if (info->port.count != 0 || info->netcount != 0) {
4028 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4029 spin_unlock_irqrestore(&info->netlock, flags);
4030 return -EBUSY;
4031 }
4032 info->netcount=1;
4033 spin_unlock_irqrestore(&info->netlock, flags);
4034
4035 tty = tty_port_tty_get(&info->port);
4036 /* claim resources and init adapter */
4037 rc = startup(info, tty);
4038 if (rc != 0) {
4039 tty_kref_put(tty);
4040 spin_lock_irqsave(&info->netlock, flags);
4041 info->netcount=0;
4042 spin_unlock_irqrestore(&info->netlock, flags);
4043 return rc;
4044 }
4045 /* assert RTS and DTR, apply hardware settings */
4046 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4047 mgslpc_program_hw(info, tty);
4048 tty_kref_put(tty);
4049
4050 /* enable network layer transmit */
4051 dev->trans_start = jiffies;
4052 netif_start_queue(dev);
4053
4054 /* inform generic HDLC layer of current DCD status */
4055 spin_lock_irqsave(&info->lock, flags);
4056 get_signals(info);
4057 spin_unlock_irqrestore(&info->lock, flags);
4058 if (info->serial_signals & SerialSignal_DCD)
4059 netif_carrier_on(dev);
4060 else
4061 netif_carrier_off(dev);
4062 return 0;
4063 }
4064
4065 /**
4066 * called by network layer when interface is disabled
4067 * shutdown hardware and release resources
4068 *
4069 * dev pointer to network device structure
4070 *
4071 * returns 0 if success, otherwise error code
4072 */
hdlcdev_close(struct net_device * dev)4073 static int hdlcdev_close(struct net_device *dev)
4074 {
4075 MGSLPC_INFO *info = dev_to_port(dev);
4076 struct tty_struct *tty = tty_port_tty_get(&info->port);
4077 unsigned long flags;
4078
4079 if (debug_level >= DEBUG_LEVEL_INFO)
4080 printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4081
4082 netif_stop_queue(dev);
4083
4084 /* shutdown adapter and release resources */
4085 shutdown(info, tty);
4086 tty_kref_put(tty);
4087 hdlc_close(dev);
4088
4089 spin_lock_irqsave(&info->netlock, flags);
4090 info->netcount=0;
4091 spin_unlock_irqrestore(&info->netlock, flags);
4092
4093 return 0;
4094 }
4095
4096 /**
4097 * called by network layer to process IOCTL call to network device
4098 *
4099 * dev pointer to network device structure
4100 * ifr pointer to network interface request structure
4101 * cmd IOCTL command code
4102 *
4103 * returns 0 if success, otherwise error code
4104 */
hdlcdev_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)4105 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4106 {
4107 const size_t size = sizeof(sync_serial_settings);
4108 sync_serial_settings new_line;
4109 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4110 MGSLPC_INFO *info = dev_to_port(dev);
4111 unsigned int flags;
4112
4113 if (debug_level >= DEBUG_LEVEL_INFO)
4114 printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4115
4116 /* return error if TTY interface open */
4117 if (info->port.count)
4118 return -EBUSY;
4119
4120 if (cmd != SIOCWANDEV)
4121 return hdlc_ioctl(dev, ifr, cmd);
4122
4123 memset(&new_line, 0, size);
4124
4125 switch(ifr->ifr_settings.type) {
4126 case IF_GET_IFACE: /* return current sync_serial_settings */
4127
4128 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4129 if (ifr->ifr_settings.size < size) {
4130 ifr->ifr_settings.size = size; /* data size wanted */
4131 return -ENOBUFS;
4132 }
4133
4134 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4135 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4136 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4137 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4138
4139 switch (flags){
4140 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4141 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4142 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4143 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4144 default: new_line.clock_type = CLOCK_DEFAULT;
4145 }
4146
4147 new_line.clock_rate = info->params.clock_speed;
4148 new_line.loopback = info->params.loopback ? 1:0;
4149
4150 if (copy_to_user(line, &new_line, size))
4151 return -EFAULT;
4152 return 0;
4153
4154 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4155
4156 if(!capable(CAP_NET_ADMIN))
4157 return -EPERM;
4158 if (copy_from_user(&new_line, line, size))
4159 return -EFAULT;
4160
4161 switch (new_line.clock_type)
4162 {
4163 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4164 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4165 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4166 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4167 case CLOCK_DEFAULT: flags = info->params.flags &
4168 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4169 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4170 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4171 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4172 default: return -EINVAL;
4173 }
4174
4175 if (new_line.loopback != 0 && new_line.loopback != 1)
4176 return -EINVAL;
4177
4178 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4179 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4180 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4181 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4182 info->params.flags |= flags;
4183
4184 info->params.loopback = new_line.loopback;
4185
4186 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4187 info->params.clock_speed = new_line.clock_rate;
4188 else
4189 info->params.clock_speed = 0;
4190
4191 /* if network interface up, reprogram hardware */
4192 if (info->netcount) {
4193 struct tty_struct *tty = tty_port_tty_get(&info->port);
4194 mgslpc_program_hw(info, tty);
4195 tty_kref_put(tty);
4196 }
4197 return 0;
4198
4199 default:
4200 return hdlc_ioctl(dev, ifr, cmd);
4201 }
4202 }
4203
4204 /**
4205 * called by network layer when transmit timeout is detected
4206 *
4207 * dev pointer to network device structure
4208 */
hdlcdev_tx_timeout(struct net_device * dev)4209 static void hdlcdev_tx_timeout(struct net_device *dev)
4210 {
4211 MGSLPC_INFO *info = dev_to_port(dev);
4212 unsigned long flags;
4213
4214 if (debug_level >= DEBUG_LEVEL_INFO)
4215 printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4216
4217 dev->stats.tx_errors++;
4218 dev->stats.tx_aborted_errors++;
4219
4220 spin_lock_irqsave(&info->lock, flags);
4221 tx_stop(info);
4222 spin_unlock_irqrestore(&info->lock, flags);
4223
4224 netif_wake_queue(dev);
4225 }
4226
4227 /**
4228 * called by device driver when transmit completes
4229 * reenable network layer transmit if stopped
4230 *
4231 * info pointer to device instance information
4232 */
hdlcdev_tx_done(MGSLPC_INFO * info)4233 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4234 {
4235 if (netif_queue_stopped(info->netdev))
4236 netif_wake_queue(info->netdev);
4237 }
4238
4239 /**
4240 * called by device driver when frame received
4241 * pass frame to network layer
4242 *
4243 * info pointer to device instance information
4244 * buf pointer to buffer contianing frame data
4245 * size count of data bytes in buf
4246 */
hdlcdev_rx(MGSLPC_INFO * info,char * buf,int size)4247 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4248 {
4249 struct sk_buff *skb = dev_alloc_skb(size);
4250 struct net_device *dev = info->netdev;
4251
4252 if (debug_level >= DEBUG_LEVEL_INFO)
4253 printk("hdlcdev_rx(%s)\n", dev->name);
4254
4255 if (skb == NULL) {
4256 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4257 dev->stats.rx_dropped++;
4258 return;
4259 }
4260
4261 memcpy(skb_put(skb, size), buf, size);
4262
4263 skb->protocol = hdlc_type_trans(skb, dev);
4264
4265 dev->stats.rx_packets++;
4266 dev->stats.rx_bytes += size;
4267
4268 netif_rx(skb);
4269 }
4270
4271 static const struct net_device_ops hdlcdev_ops = {
4272 .ndo_open = hdlcdev_open,
4273 .ndo_stop = hdlcdev_close,
4274 .ndo_change_mtu = hdlc_change_mtu,
4275 .ndo_start_xmit = hdlc_start_xmit,
4276 .ndo_do_ioctl = hdlcdev_ioctl,
4277 .ndo_tx_timeout = hdlcdev_tx_timeout,
4278 };
4279
4280 /**
4281 * called by device driver when adding device instance
4282 * do generic HDLC initialization
4283 *
4284 * info pointer to device instance information
4285 *
4286 * returns 0 if success, otherwise error code
4287 */
hdlcdev_init(MGSLPC_INFO * info)4288 static int hdlcdev_init(MGSLPC_INFO *info)
4289 {
4290 int rc;
4291 struct net_device *dev;
4292 hdlc_device *hdlc;
4293
4294 /* allocate and initialize network and HDLC layer objects */
4295
4296 dev = alloc_hdlcdev(info);
4297 if (dev == NULL) {
4298 printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4299 return -ENOMEM;
4300 }
4301
4302 /* for network layer reporting purposes only */
4303 dev->base_addr = info->io_base;
4304 dev->irq = info->irq_level;
4305
4306 /* network layer callbacks and settings */
4307 dev->netdev_ops = &hdlcdev_ops;
4308 dev->watchdog_timeo = 10 * HZ;
4309 dev->tx_queue_len = 50;
4310
4311 /* generic HDLC layer callbacks and settings */
4312 hdlc = dev_to_hdlc(dev);
4313 hdlc->attach = hdlcdev_attach;
4314 hdlc->xmit = hdlcdev_xmit;
4315
4316 /* register objects with HDLC layer */
4317 rc = register_hdlc_device(dev);
4318 if (rc) {
4319 printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4320 free_netdev(dev);
4321 return rc;
4322 }
4323
4324 info->netdev = dev;
4325 return 0;
4326 }
4327
4328 /**
4329 * called by device driver when removing device instance
4330 * do generic HDLC cleanup
4331 *
4332 * info pointer to device instance information
4333 */
hdlcdev_exit(MGSLPC_INFO * info)4334 static void hdlcdev_exit(MGSLPC_INFO *info)
4335 {
4336 unregister_hdlc_device(info->netdev);
4337 free_netdev(info->netdev);
4338 info->netdev = NULL;
4339 }
4340
4341 #endif /* CONFIG_HDLC */
4342
4343