1 /*
2 * sym53c416.c
3 * Low-level SCSI driver for sym53c416 chip.
4 * Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com)
5 *
6 * Changes :
7 *
8 * Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking
9 * Alan Cox <alan@lxorguk.ukuu.org.uk> : Cleaned up code formatting
10 * Fixed an irq locking bug
11 * Added ISAPnP support
12 * Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates
13 * Added another card with ISAPnP support
14 *
15 * LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>]
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2, or (at your option) any
20 * later version.
21 *
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
26 *
27 */
28
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/string.h>
34 #include <linux/ioport.h>
35 #include <linux/interrupt.h>
36 #include <linux/delay.h>
37 #include <linux/proc_fs.h>
38 #include <linux/spinlock.h>
39 #include <asm/dma.h>
40 #include <asm/io.h>
41 #include <linux/blkdev.h>
42 #include <linux/isapnp.h>
43 #include "scsi.h"
44 #include <scsi/scsi_host.h>
45 #include "sym53c416.h"
46
47 #define VERSION_STRING "Version 1.0.0-ac"
48
49 #define TC_LOW 0x00 /* Transfer counter low */
50 #define TC_MID 0x01 /* Transfer counter mid */
51 #define SCSI_FIFO 0x02 /* SCSI FIFO register */
52 #define COMMAND_REG 0x03 /* Command Register */
53 #define STATUS_REG 0x04 /* Status Register (READ) */
54 #define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */
55 #define INT_REG 0x05 /* Interrupt Register (READ) */
56 #define TOM 0x05 /* Time out multiplier (WRITE) */
57 #define STP 0x06 /* Synchronous Transfer period */
58 #define SYNC_OFFSET 0x07 /* Synchronous Offset */
59 #define CONF_REG_1 0x08 /* Configuration register 1 */
60 #define CONF_REG_2 0x0B /* Configuration register 2 */
61 #define CONF_REG_3 0x0C /* Configuration register 3 */
62 #define CONF_REG_4 0x0D /* Configuration register 4 */
63 #define TC_HIGH 0x0E /* Transfer counter high */
64 #define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */
65 #define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */
66 #define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */
67 #define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */
68 #define PIO_FIFO_CNT 0x14 /* PIO FIFO count */
69 #define PIO_INT_REG 0x15 /* PIO interrupt register */
70 #define CONF_REG_5 0x16 /* Configuration register 5 */
71 #define FEATURE_EN 0x1D /* Feature Enable register */
72
73 /* Configuration register 1 entries: */
74 /* Bits 2-0: SCSI ID of host adapter */
75 #define SCM 0x80 /* Slow Cable Mode */
76 #define SRID 0x40 /* SCSI Reset Interrupt Disable */
77 #define PTM 0x20 /* Parity Test Mode */
78 #define EPC 0x10 /* Enable Parity Checking */
79 #define CTME 0x08 /* Special Test Mode */
80
81 /* Configuration register 2 entries: */
82 #define FE 0x40 /* Features Enable */
83 #define SCSI2 0x08 /* SCSI 2 Enable */
84 #define TBPA 0x04 /* Target Bad Parity Abort */
85
86 /* Configuration register 3 entries: */
87 #define IDMRC 0x80 /* ID Message Reserved Check */
88 #define QTE 0x40 /* Queue Tag Enable */
89 #define CDB10 0x20 /* Command Descriptor Block 10 */
90 #define FSCSI 0x10 /* FastSCSI */
91 #define FCLK 0x08 /* FastClock */
92
93 /* Configuration register 4 entries: */
94 #define RBS 0x08 /* Register bank select */
95 #define EAN 0x04 /* Enable Active Negotiation */
96
97 /* Configuration register 5 entries: */
98 #define LPSR 0x80 /* Lower Power SCSI Reset */
99 #define IE 0x20 /* Interrupt Enable */
100 #define LPM 0x02 /* Low Power Mode */
101 #define WSE0 0x01 /* 0WS Enable */
102
103 /* Interrupt register entries: */
104 #define SRST 0x80 /* SCSI Reset */
105 #define ILCMD 0x40 /* Illegal Command */
106 #define DIS 0x20 /* Disconnect */
107 #define BS 0x10 /* Bus Service */
108 #define FC 0x08 /* Function Complete */
109 #define RESEL 0x04 /* Reselected */
110 #define SI 0x03 /* Selection Interrupt */
111
112 /* Status Register Entries: */
113 #define SCI 0x80 /* SCSI Core Int */
114 #define GE 0x40 /* Gross Error */
115 #define PE 0x20 /* Parity Error */
116 #define TC 0x10 /* Terminal Count */
117 #define VGC 0x08 /* Valid Group Code */
118 #define PHBITS 0x07 /* Phase bits */
119
120 /* PIO Interrupt Register Entries: */
121 #define SCI 0x80 /* SCSI Core Int */
122 #define PFI 0x40 /* PIO FIFO Interrupt */
123 #define FULL 0x20 /* PIO FIFO Full */
124 #define EMPTY 0x10 /* PIO FIFO Empty */
125 #define CE 0x08 /* Collision Error */
126 #define OUE 0x04 /* Overflow / Underflow error */
127 #define FIE 0x02 /* Full Interrupt Enable */
128 #define EIE 0x01 /* Empty Interrupt Enable */
129
130 /* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */
131 #define PHASE_DATA_OUT 0x00
132 #define PHASE_DATA_IN 0x01
133 #define PHASE_COMMAND 0x02
134 #define PHASE_STATUS 0x03
135 #define PHASE_RESERVED_1 0x04
136 #define PHASE_RESERVED_2 0x05
137 #define PHASE_MESSAGE_OUT 0x06
138 #define PHASE_MESSAGE_IN 0x07
139
140 /* SYM53C416 core commands */
141 #define NOOP 0x00
142 #define FLUSH_FIFO 0x01
143 #define RESET_CHIP 0x02
144 #define RESET_SCSI_BUS 0x03
145 #define DISABLE_SEL_RESEL 0x45
146 #define RESEL_SEQ 0x40
147 #define SEL_WITHOUT_ATN_SEQ 0x41
148 #define SEL_WITH_ATN_SEQ 0x42
149 #define SEL_WITH_ATN_AND_STOP_SEQ 0x43
150 #define ENABLE_SEL_RESEL 0x44
151 #define SEL_WITH_ATN3_SEQ 0x46
152 #define RESEL3_SEQ 0x47
153 #define SND_MSG 0x20
154 #define SND_STAT 0x21
155 #define SND_DATA 0x22
156 #define DISCONNECT_SEQ 0x23
157 #define TERMINATE_SEQ 0x24
158 #define TARGET_COMM_COMPLETE_SEQ 0x25
159 #define DISCONN 0x27
160 #define RECV_MSG_SEQ 0x28
161 #define RECV_CMD 0x29
162 #define RECV_DATA 0x2A
163 #define RECV_CMD_SEQ 0x2B
164 #define TARGET_ABORT_PIO 0x04
165 #define TRANSFER_INFORMATION 0x10
166 #define INIT_COMM_COMPLETE_SEQ 0x11
167 #define MSG_ACCEPTED 0x12
168 #define TRANSFER_PAD 0x18
169 #define SET_ATN 0x1A
170 #define RESET_ATN 0x1B
171 #define ILLEGAL 0xFF
172
173 #define PIO_MODE 0x80
174
175 #define IO_RANGE 0x20 /* 0x00 - 0x1F */
176 #define ID "sym53c416" /* Attention: copied to the sym53c416.h */
177 #define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */
178
179 #define READ_TIMEOUT 150
180 #define WRITE_TIMEOUT 150
181
182 #ifdef MODULE
183
184 #define sym53c416_base sym53c416
185 #define sym53c416_base_1 sym53c416_1
186 #define sym53c416_base_2 sym53c416_2
187 #define sym53c416_base_3 sym53c416_3
188
189 static unsigned int sym53c416_base[2];
190 static unsigned int sym53c416_base_1[2];
191 static unsigned int sym53c416_base_2[2];
192 static unsigned int sym53c416_base_3[2];
193
194 #endif
195
196 #define MAXHOSTS 4
197
198 #define SG_ADDRESS(buffer) ((char *) sg_virt((buffer)))
199
200 enum phases
201 {
202 idle,
203 data_out,
204 data_in,
205 command_ph,
206 status_ph,
207 message_out,
208 message_in
209 };
210
211 typedef struct
212 {
213 int base;
214 int irq;
215 int scsi_id;
216 } host;
217
218 static host hosts[MAXHOSTS] = {
219 {0, 0, SYM53C416_SCSI_ID},
220 {0, 0, SYM53C416_SCSI_ID},
221 {0, 0, SYM53C416_SCSI_ID},
222 {0, 0, SYM53C416_SCSI_ID}
223 };
224
225 static int host_index = 0;
226 static char info[120];
227 static Scsi_Cmnd *current_command = NULL;
228 static int fastpio = 1;
229
230 static int probeaddrs[] = {0x200, 0x220, 0x240, 0};
231
sym53c416_set_transfer_counter(int base,unsigned int len)232 static void sym53c416_set_transfer_counter(int base, unsigned int len)
233 {
234 /* Program Transfer Counter */
235 outb(len & 0x0000FF, base + TC_LOW);
236 outb((len & 0x00FF00) >> 8, base + TC_MID);
237 outb((len & 0xFF0000) >> 16, base + TC_HIGH);
238 }
239
240 static DEFINE_SPINLOCK(sym53c416_lock);
241
242 /* Returns the number of bytes read */
sym53c416_read(int base,unsigned char * buffer,unsigned int len)243 static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len)
244 {
245 unsigned int orig_len = len;
246 unsigned long flags = 0;
247 unsigned int bytes_left;
248 unsigned long i;
249 int timeout = READ_TIMEOUT;
250
251 /* Do transfer */
252 spin_lock_irqsave(&sym53c416_lock, flags);
253 while(len && timeout)
254 {
255 bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */
256 if(fastpio && bytes_left > 3)
257 {
258 insl(base + PIO_FIFO_1, buffer, bytes_left >> 2);
259 buffer += bytes_left & 0xFC;
260 len -= bytes_left & 0xFC;
261 }
262 else if(bytes_left > 0)
263 {
264 len -= bytes_left;
265 for(; bytes_left > 0; bytes_left--)
266 *(buffer++) = inb(base + PIO_FIFO_1);
267 }
268 else
269 {
270 i = jiffies + timeout;
271 spin_unlock_irqrestore(&sym53c416_lock, flags);
272 while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout)
273 if(inb(base + PIO_INT_REG) & SCI)
274 timeout = 0;
275 spin_lock_irqsave(&sym53c416_lock, flags);
276 if(inb(base + PIO_INT_REG) & EMPTY)
277 timeout = 0;
278 }
279 }
280 spin_unlock_irqrestore(&sym53c416_lock, flags);
281 return orig_len - len;
282 }
283
284 /* Returns the number of bytes written */
sym53c416_write(int base,unsigned char * buffer,unsigned int len)285 static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len)
286 {
287 unsigned int orig_len = len;
288 unsigned long flags = 0;
289 unsigned int bufferfree;
290 unsigned long i;
291 unsigned int timeout = WRITE_TIMEOUT;
292
293 /* Do transfer */
294 spin_lock_irqsave(&sym53c416_lock, flags);
295 while(len && timeout)
296 {
297 bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT);
298 if(bufferfree > len)
299 bufferfree = len;
300 if(fastpio && bufferfree > 3)
301 {
302 outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2);
303 buffer += bufferfree & 0xFC;
304 len -= bufferfree & 0xFC;
305 }
306 else if(bufferfree > 0)
307 {
308 len -= bufferfree;
309 for(; bufferfree > 0; bufferfree--)
310 outb(*(buffer++), base + PIO_FIFO_1);
311 }
312 else
313 {
314 i = jiffies + timeout;
315 spin_unlock_irqrestore(&sym53c416_lock, flags);
316 while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout)
317 ;
318 spin_lock_irqsave(&sym53c416_lock, flags);
319 if(inb(base + PIO_INT_REG) & FULL)
320 timeout = 0;
321 }
322 }
323 spin_unlock_irqrestore(&sym53c416_lock, flags);
324 return orig_len - len;
325 }
326
sym53c416_intr_handle(int irq,void * dev_id)327 static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id)
328 {
329 struct Scsi_Host *dev = dev_id;
330 int base = dev->io_port;
331 int i;
332 unsigned long flags = 0;
333 unsigned char status_reg, pio_int_reg, int_reg;
334 struct scatterlist *sg;
335 unsigned int tot_trans = 0;
336
337 spin_lock_irqsave(dev->host_lock,flags);
338 status_reg = inb(base + STATUS_REG);
339 pio_int_reg = inb(base + PIO_INT_REG);
340 int_reg = inb(base + INT_REG);
341 spin_unlock_irqrestore(dev->host_lock, flags);
342
343 /* First, we handle error conditions */
344 if(int_reg & SCI) /* SCSI Reset */
345 {
346 printk(KERN_DEBUG "sym53c416: Reset received\n");
347 current_command->SCp.phase = idle;
348 current_command->result = DID_RESET << 16;
349 spin_lock_irqsave(dev->host_lock, flags);
350 current_command->scsi_done(current_command);
351 spin_unlock_irqrestore(dev->host_lock, flags);
352 goto out;
353 }
354 if(int_reg & ILCMD) /* Illegal Command */
355 {
356 printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG));
357 current_command->SCp.phase = idle;
358 current_command->result = DID_ERROR << 16;
359 spin_lock_irqsave(dev->host_lock, flags);
360 current_command->scsi_done(current_command);
361 spin_unlock_irqrestore(dev->host_lock, flags);
362 goto out;
363 }
364 if(status_reg & GE) /* Gross Error */
365 {
366 printk(KERN_WARNING "sym53c416: Controller reports gross error.\n");
367 current_command->SCp.phase = idle;
368 current_command->result = DID_ERROR << 16;
369 spin_lock_irqsave(dev->host_lock, flags);
370 current_command->scsi_done(current_command);
371 spin_unlock_irqrestore(dev->host_lock, flags);
372 goto out;
373 }
374 if(status_reg & PE) /* Parity Error */
375 {
376 printk(KERN_WARNING "sym53c416:SCSI parity error.\n");
377 current_command->SCp.phase = idle;
378 current_command->result = DID_PARITY << 16;
379 spin_lock_irqsave(dev->host_lock, flags);
380 current_command->scsi_done(current_command);
381 spin_unlock_irqrestore(dev->host_lock, flags);
382 goto out;
383 }
384 if(pio_int_reg & (CE | OUE))
385 {
386 printk(KERN_WARNING "sym53c416: PIO interrupt error.\n");
387 current_command->SCp.phase = idle;
388 current_command->result = DID_ERROR << 16;
389 spin_lock_irqsave(dev->host_lock, flags);
390 current_command->scsi_done(current_command);
391 spin_unlock_irqrestore(dev->host_lock, flags);
392 goto out;
393 }
394 if(int_reg & DIS) /* Disconnect */
395 {
396 if(current_command->SCp.phase != message_in)
397 current_command->result = DID_NO_CONNECT << 16;
398 else
399 current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16);
400 current_command->SCp.phase = idle;
401 spin_lock_irqsave(dev->host_lock, flags);
402 current_command->scsi_done(current_command);
403 spin_unlock_irqrestore(dev->host_lock, flags);
404 goto out;
405 }
406 /* Now we handle SCSI phases */
407
408 switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */
409 {
410 case PHASE_DATA_OUT:
411 {
412 if(int_reg & BS)
413 {
414 current_command->SCp.phase = data_out;
415 outb(FLUSH_FIFO, base + COMMAND_REG);
416 sym53c416_set_transfer_counter(base,
417 scsi_bufflen(current_command));
418 outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
419
420 scsi_for_each_sg(current_command,
421 sg, scsi_sg_count(current_command), i) {
422 tot_trans += sym53c416_write(base,
423 SG_ADDRESS(sg),
424 sg->length);
425 }
426 if(tot_trans < current_command->underflow)
427 printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
428 }
429 break;
430 }
431
432 case PHASE_DATA_IN:
433 {
434 if(int_reg & BS)
435 {
436 current_command->SCp.phase = data_in;
437 outb(FLUSH_FIFO, base + COMMAND_REG);
438 sym53c416_set_transfer_counter(base,
439 scsi_bufflen(current_command));
440
441 outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
442
443 scsi_for_each_sg(current_command,
444 sg, scsi_sg_count(current_command), i) {
445 tot_trans += sym53c416_read(base,
446 SG_ADDRESS(sg),
447 sg->length);
448 }
449 if(tot_trans < current_command->underflow)
450 printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
451 }
452 break;
453 }
454
455 case PHASE_COMMAND:
456 {
457 current_command->SCp.phase = command_ph;
458 printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n");
459 break;
460 }
461
462 case PHASE_STATUS:
463 {
464 current_command->SCp.phase = status_ph;
465 outb(FLUSH_FIFO, base + COMMAND_REG);
466 outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG);
467 break;
468 }
469
470 case PHASE_RESERVED_1:
471 case PHASE_RESERVED_2:
472 {
473 printk(KERN_ERR "sym53c416: Reserved phase occurred.\n");
474 break;
475 }
476
477 case PHASE_MESSAGE_OUT:
478 {
479 current_command->SCp.phase = message_out;
480 outb(SET_ATN, base + COMMAND_REG);
481 outb(MSG_ACCEPTED, base + COMMAND_REG);
482 break;
483 }
484
485 case PHASE_MESSAGE_IN:
486 {
487 current_command->SCp.phase = message_in;
488 current_command->SCp.Status = inb(base + SCSI_FIFO);
489 current_command->SCp.Message = inb(base + SCSI_FIFO);
490 if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT)
491 outb(SET_ATN, base + COMMAND_REG);
492 outb(MSG_ACCEPTED, base + COMMAND_REG);
493 break;
494 }
495 }
496 out:
497 return IRQ_HANDLED;
498 }
499
sym53c416_init(int base,int scsi_id)500 static void sym53c416_init(int base, int scsi_id)
501 {
502 outb(RESET_CHIP, base + COMMAND_REG);
503 outb(NOOP, base + COMMAND_REG);
504 outb(0x99, base + TOM); /* Time out of 250 ms */
505 outb(0x05, base + STP);
506 outb(0x00, base + SYNC_OFFSET);
507 outb(EPC | scsi_id, base + CONF_REG_1);
508 outb(FE | SCSI2 | TBPA, base + CONF_REG_2);
509 outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3);
510 outb(0x83 | EAN, base + CONF_REG_4);
511 outb(IE | WSE0, base + CONF_REG_5);
512 outb(0, base + FEATURE_EN);
513 }
514
sym53c416_probeirq(int base,int scsi_id)515 static int sym53c416_probeirq(int base, int scsi_id)
516 {
517 int irq, irqs;
518 unsigned long i;
519
520 /* Clear interrupt register */
521 inb(base + INT_REG);
522 /* Start probing for irq's */
523 irqs = probe_irq_on();
524 /* Reinit chip */
525 sym53c416_init(base, scsi_id);
526 /* Cause interrupt */
527 outb(NOOP, base + COMMAND_REG);
528 outb(ILLEGAL, base + COMMAND_REG);
529 outb(0x07, base + DEST_BUS_ID);
530 outb(0x00, base + DEST_BUS_ID);
531 /* Wait for interrupt to occur */
532 i = jiffies + 20;
533 while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI))
534 barrier();
535 if(time_before_eq(i, jiffies)) /* timed out */
536 return 0;
537 /* Get occurred irq */
538 irq = probe_irq_off(irqs);
539 sym53c416_init(base, scsi_id);
540 return irq;
541 }
542
543 /* Setup: sym53c416=base,irq */
sym53c416_setup(char * str,int * ints)544 void sym53c416_setup(char *str, int *ints)
545 {
546 int i;
547
548 if(host_index >= MAXHOSTS)
549 {
550 printk(KERN_WARNING "sym53c416: Too many hosts defined\n");
551 return;
552 }
553 if(ints[0] < 1 || ints[0] > 2)
554 {
555 printk(KERN_ERR "sym53c416: Wrong number of parameters:\n");
556 printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n");
557 return;
558 }
559 for(i = 0; i < host_index && i >= 0; i++)
560 if(hosts[i].base == ints[1])
561 i = -2;
562 if(i >= 0)
563 {
564 hosts[host_index].base = ints[1];
565 hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0;
566 host_index++;
567 }
568 }
569
sym53c416_test(int base)570 static int sym53c416_test(int base)
571 {
572 outb(RESET_CHIP, base + COMMAND_REG);
573 outb(NOOP, base + COMMAND_REG);
574 if(inb(base + COMMAND_REG) != NOOP)
575 return 0;
576 if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF)
577 return 0;
578 if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY)
579 return 0;
580 return 1;
581 }
582
583
584 static struct isapnp_device_id id_table[] = {
585 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
586 ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 },
587 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
588 ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 },
589 { ISAPNP_DEVICE_SINGLE_END }
590 };
591
592 MODULE_DEVICE_TABLE(isapnp, id_table);
593
sym53c416_probe(void)594 static void sym53c416_probe(void)
595 {
596 int *base = probeaddrs;
597 int ints[2];
598
599 ints[0] = 1;
600 for(; *base; base++) {
601 if (request_region(*base, IO_RANGE, ID)) {
602 if (sym53c416_test(*base)) {
603 ints[1] = *base;
604 sym53c416_setup(NULL, ints);
605 }
606 release_region(*base, IO_RANGE);
607 }
608 }
609 }
610
sym53c416_detect(struct scsi_host_template * tpnt)611 int __init sym53c416_detect(struct scsi_host_template *tpnt)
612 {
613 unsigned long flags;
614 struct Scsi_Host * shpnt = NULL;
615 int i;
616 int count;
617 struct pnp_dev *idev = NULL;
618
619 #ifdef MODULE
620 int ints[3];
621
622 ints[0] = 2;
623 if(sym53c416_base[0])
624 {
625 ints[1] = sym53c416_base[0];
626 ints[2] = sym53c416_base[1];
627 sym53c416_setup(NULL, ints);
628 }
629 if(sym53c416_base_1[0])
630 {
631 ints[1] = sym53c416_base_1[0];
632 ints[2] = sym53c416_base_1[1];
633 sym53c416_setup(NULL, ints);
634 }
635 if(sym53c416_base_2[0])
636 {
637 ints[1] = sym53c416_base_2[0];
638 ints[2] = sym53c416_base_2[1];
639 sym53c416_setup(NULL, ints);
640 }
641 if(sym53c416_base_3[0])
642 {
643 ints[1] = sym53c416_base_3[0];
644 ints[2] = sym53c416_base_3[1];
645 sym53c416_setup(NULL, ints);
646 }
647 #endif
648 printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING);
649
650 for (i=0; id_table[i].vendor != 0; i++) {
651 while((idev=pnp_find_dev(NULL, id_table[i].vendor,
652 id_table[i].function, idev))!=NULL)
653 {
654 int i[3];
655
656 if(pnp_device_attach(idev)<0)
657 {
658 printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n");
659 continue;
660 }
661 if(pnp_activate_dev(idev) < 0)
662 {
663 printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n");
664 pnp_device_detach(idev);
665 continue;
666
667 }
668
669 i[0] = 2;
670 i[1] = pnp_port_start(idev, 0);
671 i[2] = pnp_irq(idev, 0);
672
673 printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n",
674 i[1], i[2]);
675 sym53c416_setup(NULL, i);
676 }
677 }
678 sym53c416_probe();
679
680 /* Now we register and set up each host adapter found... */
681 for(count = 0, i = 0; i < host_index; i++) {
682 if (!request_region(hosts[i].base, IO_RANGE, ID))
683 continue;
684 if (!sym53c416_test(hosts[i].base)) {
685 printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base);
686 goto fail_release_region;
687 }
688
689 /* We don't have an irq yet, so we should probe for one */
690 if (!hosts[i].irq)
691 hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id);
692 if (!hosts[i].irq)
693 goto fail_release_region;
694
695 shpnt = scsi_register(tpnt, 0);
696 if (!shpnt)
697 goto fail_release_region;
698 /* Request for specified IRQ */
699 if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt))
700 goto fail_free_host;
701
702 spin_lock_irqsave(&sym53c416_lock, flags);
703 shpnt->unique_id = hosts[i].base;
704 shpnt->io_port = hosts[i].base;
705 shpnt->n_io_port = IO_RANGE;
706 shpnt->irq = hosts[i].irq;
707 shpnt->this_id = hosts[i].scsi_id;
708 sym53c416_init(hosts[i].base, hosts[i].scsi_id);
709 count++;
710 spin_unlock_irqrestore(&sym53c416_lock, flags);
711 continue;
712
713 fail_free_host:
714 scsi_unregister(shpnt);
715 fail_release_region:
716 release_region(hosts[i].base, IO_RANGE);
717 }
718 return count;
719 }
720
sym53c416_info(struct Scsi_Host * SChost)721 const char *sym53c416_info(struct Scsi_Host *SChost)
722 {
723 int i;
724 int base = SChost->io_port;
725 int irq = SChost->irq;
726 int scsi_id = 0;
727 int rev = inb(base + TC_HIGH);
728
729 for(i = 0; i < host_index; i++)
730 if(hosts[i].base == base)
731 scsi_id = hosts[i].scsi_id;
732 sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow");
733 return info;
734 }
735
sym53c416_queuecommand_lck(Scsi_Cmnd * SCpnt,void (* done)(Scsi_Cmnd *))736 static int sym53c416_queuecommand_lck(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
737 {
738 int base;
739 unsigned long flags = 0;
740 int i;
741
742 /* Store base register as we can have more than one controller in the system */
743 base = SCpnt->device->host->io_port;
744 current_command = SCpnt; /* set current command */
745 current_command->scsi_done = done; /* set ptr to done function */
746 current_command->SCp.phase = command_ph; /* currect phase is the command phase */
747 current_command->SCp.Status = 0;
748 current_command->SCp.Message = 0;
749
750 spin_lock_irqsave(&sym53c416_lock, flags);
751 outb(scmd_id(SCpnt), base + DEST_BUS_ID); /* Set scsi id target */
752 outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */
753 /* Write SCSI command into the SCSI fifo */
754 for(i = 0; i < SCpnt->cmd_len; i++)
755 outb(SCpnt->cmnd[i], base + SCSI_FIFO);
756 /* Start selection sequence */
757 outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG);
758 /* Now an interrupt will be generated which we will catch in out interrupt routine */
759 spin_unlock_irqrestore(&sym53c416_lock, flags);
760 return 0;
761 }
762
DEF_SCSI_QCMD(sym53c416_queuecommand)763 DEF_SCSI_QCMD(sym53c416_queuecommand)
764
765 static int sym53c416_host_reset(Scsi_Cmnd *SCpnt)
766 {
767 int base;
768 int scsi_id = -1;
769 int i;
770 unsigned long flags;
771
772 spin_lock_irqsave(&sym53c416_lock, flags);
773
774 /* printk("sym53c416_reset\n"); */
775 base = SCpnt->device->host->io_port;
776 /* search scsi_id - fixme, we shouldn't need to iterate for this! */
777 for(i = 0; i < host_index && scsi_id == -1; i++)
778 if(hosts[i].base == base)
779 scsi_id = hosts[i].scsi_id;
780 outb(RESET_CHIP, base + COMMAND_REG);
781 outb(NOOP | PIO_MODE, base + COMMAND_REG);
782 outb(RESET_SCSI_BUS, base + COMMAND_REG);
783 sym53c416_init(base, scsi_id);
784
785 spin_unlock_irqrestore(&sym53c416_lock, flags);
786 return SUCCESS;
787 }
788
sym53c416_release(struct Scsi_Host * shost)789 static int sym53c416_release(struct Scsi_Host *shost)
790 {
791 if (shost->irq)
792 free_irq(shost->irq, shost);
793 if (shost->io_port && shost->n_io_port)
794 release_region(shost->io_port, shost->n_io_port);
795 return 0;
796 }
797
sym53c416_bios_param(struct scsi_device * sdev,struct block_device * dev,sector_t capacity,int * ip)798 static int sym53c416_bios_param(struct scsi_device *sdev,
799 struct block_device *dev,
800 sector_t capacity, int *ip)
801 {
802 int size;
803
804 size = capacity;
805 ip[0] = 64; /* heads */
806 ip[1] = 32; /* sectors */
807 if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */
808 {
809 ip[0] = 255; /* heads */
810 ip[1] = 63; /* sectors */
811 ip[2] = size / (255 * 63); /* cylinders */
812 }
813 return 0;
814 }
815
816 /* Loadable module support */
817 #ifdef MODULE
818
819 MODULE_AUTHOR("Lieven Willems");
820 MODULE_LICENSE("GPL");
821
822 module_param_array(sym53c416, uint, NULL, 0);
823 module_param_array(sym53c416_1, uint, NULL, 0);
824 module_param_array(sym53c416_2, uint, NULL, 0);
825 module_param_array(sym53c416_3, uint, NULL, 0);
826
827 #endif
828
829 static struct scsi_host_template driver_template = {
830 .proc_name = "sym53c416",
831 .name = "Symbios Logic 53c416",
832 .detect = sym53c416_detect,
833 .info = sym53c416_info,
834 .queuecommand = sym53c416_queuecommand,
835 .eh_host_reset_handler =sym53c416_host_reset,
836 .release = sym53c416_release,
837 .bios_param = sym53c416_bios_param,
838 .can_queue = 1,
839 .this_id = SYM53C416_SCSI_ID,
840 .sg_tablesize = 32,
841 .cmd_per_lun = 1,
842 .unchecked_isa_dma = 1,
843 .use_clustering = ENABLE_CLUSTERING,
844 };
845 #include "scsi_module.c"
846