1 #include <linux/device.h>
2 #include <linux/cpu.h>
3 #include <linux/smp.h>
4 #include <linux/percpu.h>
5 #include <linux/init.h>
6 #include <linux/sched.h>
7 #include <linux/export.h>
8 #include <linux/nodemask.h>
9 #include <linux/cpumask.h>
10 #include <linux/notifier.h>
11
12 #include <asm/current.h>
13 #include <asm/processor.h>
14 #include <asm/cputable.h>
15 #include <asm/hvcall.h>
16 #include <asm/prom.h>
17 #include <asm/machdep.h>
18 #include <asm/smp.h>
19 #include <asm/pmc.h>
20
21 #include "cacheinfo.h"
22
23 #ifdef CONFIG_PPC64
24 #include <asm/paca.h>
25 #include <asm/lppaca.h>
26 #endif
27
28 static DEFINE_PER_CPU(struct cpu, cpu_devices);
29
30 /*
31 * SMT snooze delay stuff, 64-bit only for now
32 */
33
34 #ifdef CONFIG_PPC64
35
36 /* Time in microseconds we delay before sleeping in the idle loop */
37 DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
38
store_smt_snooze_delay(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)39 static ssize_t store_smt_snooze_delay(struct device *dev,
40 struct device_attribute *attr,
41 const char *buf,
42 size_t count)
43 {
44 struct cpu *cpu = container_of(dev, struct cpu, dev);
45 ssize_t ret;
46 long snooze;
47
48 ret = sscanf(buf, "%ld", &snooze);
49 if (ret != 1)
50 return -EINVAL;
51
52 per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
53 update_smt_snooze_delay(cpu->dev.id, snooze);
54
55 return count;
56 }
57
show_smt_snooze_delay(struct device * dev,struct device_attribute * attr,char * buf)58 static ssize_t show_smt_snooze_delay(struct device *dev,
59 struct device_attribute *attr,
60 char *buf)
61 {
62 struct cpu *cpu = container_of(dev, struct cpu, dev);
63
64 return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
65 }
66
67 static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
68 store_smt_snooze_delay);
69
setup_smt_snooze_delay(char * str)70 static int __init setup_smt_snooze_delay(char *str)
71 {
72 unsigned int cpu;
73 long snooze;
74
75 if (!cpu_has_feature(CPU_FTR_SMT))
76 return 1;
77
78 snooze = simple_strtol(str, NULL, 10);
79 for_each_possible_cpu(cpu)
80 per_cpu(smt_snooze_delay, cpu) = snooze;
81
82 return 1;
83 }
84 __setup("smt-snooze-delay=", setup_smt_snooze_delay);
85
86 #endif /* CONFIG_PPC64 */
87
88 /*
89 * Enabling PMCs will slow partition context switch times so we only do
90 * it the first time we write to the PMCs.
91 */
92
93 static DEFINE_PER_CPU(char, pmcs_enabled);
94
ppc_enable_pmcs(void)95 void ppc_enable_pmcs(void)
96 {
97 ppc_set_pmu_inuse(1);
98
99 /* Only need to enable them once */
100 if (__get_cpu_var(pmcs_enabled))
101 return;
102
103 __get_cpu_var(pmcs_enabled) = 1;
104
105 if (ppc_md.enable_pmcs)
106 ppc_md.enable_pmcs();
107 }
108 EXPORT_SYMBOL(ppc_enable_pmcs);
109
110 #define SYSFS_PMCSETUP(NAME, ADDRESS) \
111 static void read_##NAME(void *val) \
112 { \
113 *(unsigned long *)val = mfspr(ADDRESS); \
114 } \
115 static void write_##NAME(void *val) \
116 { \
117 ppc_enable_pmcs(); \
118 mtspr(ADDRESS, *(unsigned long *)val); \
119 } \
120 static ssize_t show_##NAME(struct device *dev, \
121 struct device_attribute *attr, \
122 char *buf) \
123 { \
124 struct cpu *cpu = container_of(dev, struct cpu, dev); \
125 unsigned long val; \
126 smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
127 return sprintf(buf, "%lx\n", val); \
128 } \
129 static ssize_t __used \
130 store_##NAME(struct device *dev, struct device_attribute *attr, \
131 const char *buf, size_t count) \
132 { \
133 struct cpu *cpu = container_of(dev, struct cpu, dev); \
134 unsigned long val; \
135 int ret = sscanf(buf, "%lx", &val); \
136 if (ret != 1) \
137 return -EINVAL; \
138 smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
139 return count; \
140 }
141
142
143 /* Let's define all possible registers, we'll only hook up the ones
144 * that are implemented on the current processor
145 */
146
147 #if defined(CONFIG_PPC64)
148 #define HAS_PPC_PMC_CLASSIC 1
149 #define HAS_PPC_PMC_IBM 1
150 #define HAS_PPC_PMC_PA6T 1
151 #elif defined(CONFIG_6xx)
152 #define HAS_PPC_PMC_CLASSIC 1
153 #define HAS_PPC_PMC_IBM 1
154 #define HAS_PPC_PMC_G4 1
155 #endif
156
157
158 #ifdef HAS_PPC_PMC_CLASSIC
159 SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
160 SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
161 SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
162 SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
163 SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
164 SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
165 SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
166 SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
167
168 #ifdef HAS_PPC_PMC_G4
169 SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
170 #endif
171
172 #ifdef CONFIG_PPC64
173 SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
174 SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
175
176 SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
177 SYSFS_PMCSETUP(purr, SPRN_PURR);
178 SYSFS_PMCSETUP(spurr, SPRN_SPURR);
179 SYSFS_PMCSETUP(dscr, SPRN_DSCR);
180 SYSFS_PMCSETUP(pir, SPRN_PIR);
181
182 static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
183 static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
184 static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
185 static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
186 static DEVICE_ATTR(pir, 0400, show_pir, NULL);
187
188 unsigned long dscr_default = 0;
189 EXPORT_SYMBOL(dscr_default);
190
show_dscr_default(struct device * dev,struct device_attribute * attr,char * buf)191 static ssize_t show_dscr_default(struct device *dev,
192 struct device_attribute *attr, char *buf)
193 {
194 return sprintf(buf, "%lx\n", dscr_default);
195 }
196
update_dscr(void * dummy)197 static void update_dscr(void *dummy)
198 {
199 if (!current->thread.dscr_inherit) {
200 current->thread.dscr = dscr_default;
201 mtspr(SPRN_DSCR, dscr_default);
202 }
203 }
204
store_dscr_default(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)205 static ssize_t __used store_dscr_default(struct device *dev,
206 struct device_attribute *attr, const char *buf,
207 size_t count)
208 {
209 unsigned long val;
210 int ret = 0;
211
212 ret = sscanf(buf, "%lx", &val);
213 if (ret != 1)
214 return -EINVAL;
215 dscr_default = val;
216
217 on_each_cpu(update_dscr, NULL, 1);
218
219 return count;
220 }
221
222 static DEVICE_ATTR(dscr_default, 0600,
223 show_dscr_default, store_dscr_default);
224
sysfs_create_dscr_default(void)225 static void sysfs_create_dscr_default(void)
226 {
227 int err = 0;
228 if (cpu_has_feature(CPU_FTR_DSCR))
229 err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
230 }
231 #endif /* CONFIG_PPC64 */
232
233 #ifdef HAS_PPC_PMC_PA6T
234 SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
235 SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
236 SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
237 SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
238 SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
239 SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
240 #ifdef CONFIG_DEBUG_KERNEL
241 SYSFS_PMCSETUP(hid0, SPRN_HID0);
242 SYSFS_PMCSETUP(hid1, SPRN_HID1);
243 SYSFS_PMCSETUP(hid4, SPRN_HID4);
244 SYSFS_PMCSETUP(hid5, SPRN_HID5);
245 SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
246 SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
247 SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
248 SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
249 SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
250 SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
251 SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
252 SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
253 SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
254 SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
255 SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
256 SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
257 SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
258 SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
259 SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
260 SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
261 SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
262 SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
263 SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
264 SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
265 SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
266 SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
267 SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
268 SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
269 #endif /* CONFIG_DEBUG_KERNEL */
270 #endif /* HAS_PPC_PMC_PA6T */
271
272 #ifdef HAS_PPC_PMC_IBM
273 static struct device_attribute ibm_common_attrs[] = {
274 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
275 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
276 };
277 #endif /* HAS_PPC_PMC_G4 */
278
279 #ifdef HAS_PPC_PMC_G4
280 static struct device_attribute g4_common_attrs[] = {
281 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
282 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
283 __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
284 };
285 #endif /* HAS_PPC_PMC_G4 */
286
287 static struct device_attribute classic_pmc_attrs[] = {
288 __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
289 __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
290 __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
291 __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
292 __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
293 __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
294 #ifdef CONFIG_PPC64
295 __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
296 __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
297 #endif
298 };
299
300 #ifdef HAS_PPC_PMC_PA6T
301 static struct device_attribute pa6t_attrs[] = {
302 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
303 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
304 __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
305 __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
306 __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
307 __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
308 __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
309 __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
310 #ifdef CONFIG_DEBUG_KERNEL
311 __ATTR(hid0, 0600, show_hid0, store_hid0),
312 __ATTR(hid1, 0600, show_hid1, store_hid1),
313 __ATTR(hid4, 0600, show_hid4, store_hid4),
314 __ATTR(hid5, 0600, show_hid5, store_hid5),
315 __ATTR(ima0, 0600, show_ima0, store_ima0),
316 __ATTR(ima1, 0600, show_ima1, store_ima1),
317 __ATTR(ima2, 0600, show_ima2, store_ima2),
318 __ATTR(ima3, 0600, show_ima3, store_ima3),
319 __ATTR(ima4, 0600, show_ima4, store_ima4),
320 __ATTR(ima5, 0600, show_ima5, store_ima5),
321 __ATTR(ima6, 0600, show_ima6, store_ima6),
322 __ATTR(ima7, 0600, show_ima7, store_ima7),
323 __ATTR(ima8, 0600, show_ima8, store_ima8),
324 __ATTR(ima9, 0600, show_ima9, store_ima9),
325 __ATTR(imaat, 0600, show_imaat, store_imaat),
326 __ATTR(btcr, 0600, show_btcr, store_btcr),
327 __ATTR(pccr, 0600, show_pccr, store_pccr),
328 __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
329 __ATTR(der, 0600, show_der, store_der),
330 __ATTR(mer, 0600, show_mer, store_mer),
331 __ATTR(ber, 0600, show_ber, store_ber),
332 __ATTR(ier, 0600, show_ier, store_ier),
333 __ATTR(sier, 0600, show_sier, store_sier),
334 __ATTR(siar, 0600, show_siar, store_siar),
335 __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
336 __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
337 __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
338 __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
339 #endif /* CONFIG_DEBUG_KERNEL */
340 };
341 #endif /* HAS_PPC_PMC_PA6T */
342 #endif /* HAS_PPC_PMC_CLASSIC */
343
register_cpu_online(unsigned int cpu)344 static void __cpuinit register_cpu_online(unsigned int cpu)
345 {
346 struct cpu *c = &per_cpu(cpu_devices, cpu);
347 struct device *s = &c->dev;
348 struct device_attribute *attrs, *pmc_attrs;
349 int i, nattrs;
350
351 #ifdef CONFIG_PPC64
352 if (cpu_has_feature(CPU_FTR_SMT))
353 device_create_file(s, &dev_attr_smt_snooze_delay);
354 #endif
355
356 /* PMC stuff */
357 switch (cur_cpu_spec->pmc_type) {
358 #ifdef HAS_PPC_PMC_IBM
359 case PPC_PMC_IBM:
360 attrs = ibm_common_attrs;
361 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
362 pmc_attrs = classic_pmc_attrs;
363 break;
364 #endif /* HAS_PPC_PMC_IBM */
365 #ifdef HAS_PPC_PMC_G4
366 case PPC_PMC_G4:
367 attrs = g4_common_attrs;
368 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
369 pmc_attrs = classic_pmc_attrs;
370 break;
371 #endif /* HAS_PPC_PMC_G4 */
372 #ifdef HAS_PPC_PMC_PA6T
373 case PPC_PMC_PA6T:
374 /* PA Semi starts counting at PMC0 */
375 attrs = pa6t_attrs;
376 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
377 pmc_attrs = NULL;
378 break;
379 #endif /* HAS_PPC_PMC_PA6T */
380 default:
381 attrs = NULL;
382 nattrs = 0;
383 pmc_attrs = NULL;
384 }
385
386 for (i = 0; i < nattrs; i++)
387 device_create_file(s, &attrs[i]);
388
389 if (pmc_attrs)
390 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
391 device_create_file(s, &pmc_attrs[i]);
392
393 #ifdef CONFIG_PPC64
394 if (cpu_has_feature(CPU_FTR_MMCRA))
395 device_create_file(s, &dev_attr_mmcra);
396
397 if (cpu_has_feature(CPU_FTR_PURR))
398 device_create_file(s, &dev_attr_purr);
399
400 if (cpu_has_feature(CPU_FTR_SPURR))
401 device_create_file(s, &dev_attr_spurr);
402
403 if (cpu_has_feature(CPU_FTR_DSCR))
404 device_create_file(s, &dev_attr_dscr);
405
406 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
407 device_create_file(s, &dev_attr_pir);
408 #endif /* CONFIG_PPC64 */
409
410 cacheinfo_cpu_online(cpu);
411 }
412
413 #ifdef CONFIG_HOTPLUG_CPU
unregister_cpu_online(unsigned int cpu)414 static void unregister_cpu_online(unsigned int cpu)
415 {
416 struct cpu *c = &per_cpu(cpu_devices, cpu);
417 struct device *s = &c->dev;
418 struct device_attribute *attrs, *pmc_attrs;
419 int i, nattrs;
420
421 BUG_ON(!c->hotpluggable);
422
423 #ifdef CONFIG_PPC64
424 if (cpu_has_feature(CPU_FTR_SMT))
425 device_remove_file(s, &dev_attr_smt_snooze_delay);
426 #endif
427
428 /* PMC stuff */
429 switch (cur_cpu_spec->pmc_type) {
430 #ifdef HAS_PPC_PMC_IBM
431 case PPC_PMC_IBM:
432 attrs = ibm_common_attrs;
433 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
434 pmc_attrs = classic_pmc_attrs;
435 break;
436 #endif /* HAS_PPC_PMC_IBM */
437 #ifdef HAS_PPC_PMC_G4
438 case PPC_PMC_G4:
439 attrs = g4_common_attrs;
440 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
441 pmc_attrs = classic_pmc_attrs;
442 break;
443 #endif /* HAS_PPC_PMC_G4 */
444 #ifdef HAS_PPC_PMC_PA6T
445 case PPC_PMC_PA6T:
446 /* PA Semi starts counting at PMC0 */
447 attrs = pa6t_attrs;
448 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
449 pmc_attrs = NULL;
450 break;
451 #endif /* HAS_PPC_PMC_PA6T */
452 default:
453 attrs = NULL;
454 nattrs = 0;
455 pmc_attrs = NULL;
456 }
457
458 for (i = 0; i < nattrs; i++)
459 device_remove_file(s, &attrs[i]);
460
461 if (pmc_attrs)
462 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
463 device_remove_file(s, &pmc_attrs[i]);
464
465 #ifdef CONFIG_PPC64
466 if (cpu_has_feature(CPU_FTR_MMCRA))
467 device_remove_file(s, &dev_attr_mmcra);
468
469 if (cpu_has_feature(CPU_FTR_PURR))
470 device_remove_file(s, &dev_attr_purr);
471
472 if (cpu_has_feature(CPU_FTR_SPURR))
473 device_remove_file(s, &dev_attr_spurr);
474
475 if (cpu_has_feature(CPU_FTR_DSCR))
476 device_remove_file(s, &dev_attr_dscr);
477
478 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
479 device_remove_file(s, &dev_attr_pir);
480 #endif /* CONFIG_PPC64 */
481
482 cacheinfo_cpu_offline(cpu);
483 }
484
485 #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
arch_cpu_probe(const char * buf,size_t count)486 ssize_t arch_cpu_probe(const char *buf, size_t count)
487 {
488 if (ppc_md.cpu_probe)
489 return ppc_md.cpu_probe(buf, count);
490
491 return -EINVAL;
492 }
493
arch_cpu_release(const char * buf,size_t count)494 ssize_t arch_cpu_release(const char *buf, size_t count)
495 {
496 if (ppc_md.cpu_release)
497 return ppc_md.cpu_release(buf, count);
498
499 return -EINVAL;
500 }
501 #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
502
503 #endif /* CONFIG_HOTPLUG_CPU */
504
sysfs_cpu_notify(struct notifier_block * self,unsigned long action,void * hcpu)505 static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
506 unsigned long action, void *hcpu)
507 {
508 unsigned int cpu = (unsigned int)(long)hcpu;
509
510 switch (action) {
511 case CPU_ONLINE:
512 case CPU_ONLINE_FROZEN:
513 register_cpu_online(cpu);
514 break;
515 #ifdef CONFIG_HOTPLUG_CPU
516 case CPU_DEAD:
517 case CPU_DEAD_FROZEN:
518 unregister_cpu_online(cpu);
519 break;
520 #endif
521 }
522 return NOTIFY_OK;
523 }
524
525 static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
526 .notifier_call = sysfs_cpu_notify,
527 };
528
529 static DEFINE_MUTEX(cpu_mutex);
530
cpu_add_dev_attr(struct device_attribute * attr)531 int cpu_add_dev_attr(struct device_attribute *attr)
532 {
533 int cpu;
534
535 mutex_lock(&cpu_mutex);
536
537 for_each_possible_cpu(cpu) {
538 device_create_file(get_cpu_device(cpu), attr);
539 }
540
541 mutex_unlock(&cpu_mutex);
542 return 0;
543 }
544 EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
545
cpu_add_dev_attr_group(struct attribute_group * attrs)546 int cpu_add_dev_attr_group(struct attribute_group *attrs)
547 {
548 int cpu;
549 struct device *dev;
550 int ret;
551
552 mutex_lock(&cpu_mutex);
553
554 for_each_possible_cpu(cpu) {
555 dev = get_cpu_device(cpu);
556 ret = sysfs_create_group(&dev->kobj, attrs);
557 WARN_ON(ret != 0);
558 }
559
560 mutex_unlock(&cpu_mutex);
561 return 0;
562 }
563 EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
564
565
cpu_remove_dev_attr(struct device_attribute * attr)566 void cpu_remove_dev_attr(struct device_attribute *attr)
567 {
568 int cpu;
569
570 mutex_lock(&cpu_mutex);
571
572 for_each_possible_cpu(cpu) {
573 device_remove_file(get_cpu_device(cpu), attr);
574 }
575
576 mutex_unlock(&cpu_mutex);
577 }
578 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
579
cpu_remove_dev_attr_group(struct attribute_group * attrs)580 void cpu_remove_dev_attr_group(struct attribute_group *attrs)
581 {
582 int cpu;
583 struct device *dev;
584
585 mutex_lock(&cpu_mutex);
586
587 for_each_possible_cpu(cpu) {
588 dev = get_cpu_device(cpu);
589 sysfs_remove_group(&dev->kobj, attrs);
590 }
591
592 mutex_unlock(&cpu_mutex);
593 }
594 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
595
596
597 /* NUMA stuff */
598
599 #ifdef CONFIG_NUMA
register_nodes(void)600 static void register_nodes(void)
601 {
602 int i;
603
604 for (i = 0; i < MAX_NUMNODES; i++)
605 register_one_node(i);
606 }
607
sysfs_add_device_to_node(struct device * dev,int nid)608 int sysfs_add_device_to_node(struct device *dev, int nid)
609 {
610 struct node *node = node_devices[nid];
611 return sysfs_create_link(&node->dev.kobj, &dev->kobj,
612 kobject_name(&dev->kobj));
613 }
614 EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
615
sysfs_remove_device_from_node(struct device * dev,int nid)616 void sysfs_remove_device_from_node(struct device *dev, int nid)
617 {
618 struct node *node = node_devices[nid];
619 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
620 }
621 EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
622
623 #else
register_nodes(void)624 static void register_nodes(void)
625 {
626 return;
627 }
628
629 #endif
630
631 /* Only valid if CPU is present. */
show_physical_id(struct device * dev,struct device_attribute * attr,char * buf)632 static ssize_t show_physical_id(struct device *dev,
633 struct device_attribute *attr, char *buf)
634 {
635 struct cpu *cpu = container_of(dev, struct cpu, dev);
636
637 return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
638 }
639 static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
640
topology_init(void)641 static int __init topology_init(void)
642 {
643 int cpu;
644
645 register_nodes();
646 register_cpu_notifier(&sysfs_cpu_nb);
647
648 for_each_possible_cpu(cpu) {
649 struct cpu *c = &per_cpu(cpu_devices, cpu);
650
651 /*
652 * For now, we just see if the system supports making
653 * the RTAS calls for CPU hotplug. But, there may be a
654 * more comprehensive way to do this for an individual
655 * CPU. For instance, the boot cpu might never be valid
656 * for hotplugging.
657 */
658 if (ppc_md.cpu_die)
659 c->hotpluggable = 1;
660
661 if (cpu_online(cpu) || c->hotpluggable) {
662 register_cpu(c, cpu);
663
664 device_create_file(&c->dev, &dev_attr_physical_id);
665 }
666
667 if (cpu_online(cpu))
668 register_cpu_online(cpu);
669 }
670 #ifdef CONFIG_PPC64
671 sysfs_create_dscr_default();
672 #endif /* CONFIG_PPC64 */
673
674 return 0;
675 }
676 subsys_initcall(topology_init);
677