1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include <linux/aer.h>
26 #include "net_driver.h"
27 #include "efx.h"
28 #include "nic.h"
29 #include "selftest.h"
30
31 #include "mcdi.h"
32 #include "workarounds.h"
33
34 /**************************************************************************
35 *
36 * Type name strings
37 *
38 **************************************************************************
39 */
40
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 };
72
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DISABLE] = "DISABLE",
81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
82 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
84 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
85 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
86 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
87 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
88 };
89
90 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
91 * queued onto this work queue. This is not a per-nic work queue, because
92 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
93 */
94 static struct workqueue_struct *reset_workqueue;
95
96 /**************************************************************************
97 *
98 * Configurable values
99 *
100 *************************************************************************/
101
102 /*
103 * Use separate channels for TX and RX events
104 *
105 * Set this to 1 to use separate channels for TX and RX. It allows us
106 * to control interrupt affinity separately for TX and RX.
107 *
108 * This is only used in MSI-X interrupt mode
109 */
110 static bool separate_tx_channels;
111 module_param(separate_tx_channels, bool, 0444);
112 MODULE_PARM_DESC(separate_tx_channels,
113 "Use separate channels for TX and RX");
114
115 /* This is the weight assigned to each of the (per-channel) virtual
116 * NAPI devices.
117 */
118 static int napi_weight = 64;
119
120 /* This is the time (in jiffies) between invocations of the hardware
121 * monitor.
122 * On Falcon-based NICs, this will:
123 * - Check the on-board hardware monitor;
124 * - Poll the link state and reconfigure the hardware as necessary.
125 * On Siena-based NICs for power systems with EEH support, this will give EEH a
126 * chance to start.
127 */
128 static unsigned int efx_monitor_interval = 1 * HZ;
129
130 /* Initial interrupt moderation settings. They can be modified after
131 * module load with ethtool.
132 *
133 * The default for RX should strike a balance between increasing the
134 * round-trip latency and reducing overhead.
135 */
136 static unsigned int rx_irq_mod_usec = 60;
137
138 /* Initial interrupt moderation settings. They can be modified after
139 * module load with ethtool.
140 *
141 * This default is chosen to ensure that a 10G link does not go idle
142 * while a TX queue is stopped after it has become full. A queue is
143 * restarted when it drops below half full. The time this takes (assuming
144 * worst case 3 descriptors per packet and 1024 descriptors) is
145 * 512 / 3 * 1.2 = 205 usec.
146 */
147 static unsigned int tx_irq_mod_usec = 150;
148
149 /* This is the first interrupt mode to try out of:
150 * 0 => MSI-X
151 * 1 => MSI
152 * 2 => legacy
153 */
154 static unsigned int interrupt_mode;
155
156 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
157 * i.e. the number of CPUs among which we may distribute simultaneous
158 * interrupt handling.
159 *
160 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
161 * The default (0) means to assign an interrupt to each core.
162 */
163 static unsigned int rss_cpus;
164 module_param(rss_cpus, uint, 0444);
165 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
166
167 static bool phy_flash_cfg;
168 module_param(phy_flash_cfg, bool, 0644);
169 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
170
171 static unsigned irq_adapt_low_thresh = 8000;
172 module_param(irq_adapt_low_thresh, uint, 0644);
173 MODULE_PARM_DESC(irq_adapt_low_thresh,
174 "Threshold score for reducing IRQ moderation");
175
176 static unsigned irq_adapt_high_thresh = 16000;
177 module_param(irq_adapt_high_thresh, uint, 0644);
178 MODULE_PARM_DESC(irq_adapt_high_thresh,
179 "Threshold score for increasing IRQ moderation");
180
181 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
182 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
183 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
184 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
185 module_param(debug, uint, 0);
186 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
187
188 /**************************************************************************
189 *
190 * Utility functions and prototypes
191 *
192 *************************************************************************/
193
194 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq);
195 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq);
196 static void efx_remove_channel(struct efx_channel *channel);
197 static void efx_remove_channels(struct efx_nic *efx);
198 static const struct efx_channel_type efx_default_channel_type;
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_init_napi_channel(struct efx_channel *channel);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_napi_channel(struct efx_channel *channel);
203 static void efx_fini_struct(struct efx_nic *efx);
204 static void efx_start_all(struct efx_nic *efx);
205 static void efx_stop_all(struct efx_nic *efx);
206
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
208 do { \
209 if ((efx->state == STATE_READY) || \
210 (efx->state == STATE_RECOVERY) || \
211 (efx->state == STATE_DISABLED)) \
212 ASSERT_RTNL(); \
213 } while (0)
214
efx_check_disabled(struct efx_nic * efx)215 static int efx_check_disabled(struct efx_nic *efx)
216 {
217 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
218 netif_err(efx, drv, efx->net_dev,
219 "device is disabled due to earlier errors\n");
220 return -EIO;
221 }
222 return 0;
223 }
224
225 /**************************************************************************
226 *
227 * Event queue processing
228 *
229 *************************************************************************/
230
231 /* Process channel's event queue
232 *
233 * This function is responsible for processing the event queue of a
234 * single channel. The caller must guarantee that this function will
235 * never be concurrently called more than once on the same channel,
236 * though different channels may be being processed concurrently.
237 */
efx_process_channel(struct efx_channel * channel,int budget)238 static int efx_process_channel(struct efx_channel *channel, int budget)
239 {
240 int spent;
241
242 if (unlikely(!channel->enabled))
243 return 0;
244
245 spent = efx_nic_process_eventq(channel, budget);
246 if (spent && efx_channel_has_rx_queue(channel)) {
247 struct efx_rx_queue *rx_queue =
248 efx_channel_get_rx_queue(channel);
249
250 efx_rx_flush_packet(channel);
251 if (rx_queue->enabled)
252 efx_fast_push_rx_descriptors(rx_queue);
253 }
254
255 return spent;
256 }
257
258 /* Mark channel as finished processing
259 *
260 * Note that since we will not receive further interrupts for this
261 * channel before we finish processing and call the eventq_read_ack()
262 * method, there is no need to use the interrupt hold-off timers.
263 */
efx_channel_processed(struct efx_channel * channel)264 static inline void efx_channel_processed(struct efx_channel *channel)
265 {
266 /* The interrupt handler for this channel may set work_pending
267 * as soon as we acknowledge the events we've seen. Make sure
268 * it's cleared before then. */
269 channel->work_pending = false;
270 smp_wmb();
271
272 efx_nic_eventq_read_ack(channel);
273 }
274
275 /* NAPI poll handler
276 *
277 * NAPI guarantees serialisation of polls of the same device, which
278 * provides the guarantee required by efx_process_channel().
279 */
efx_poll(struct napi_struct * napi,int budget)280 static int efx_poll(struct napi_struct *napi, int budget)
281 {
282 struct efx_channel *channel =
283 container_of(napi, struct efx_channel, napi_str);
284 struct efx_nic *efx = channel->efx;
285 int spent;
286
287 netif_vdbg(efx, intr, efx->net_dev,
288 "channel %d NAPI poll executing on CPU %d\n",
289 channel->channel, raw_smp_processor_id());
290
291 spent = efx_process_channel(channel, budget);
292
293 if (spent < budget) {
294 if (efx_channel_has_rx_queue(channel) &&
295 efx->irq_rx_adaptive &&
296 unlikely(++channel->irq_count == 1000)) {
297 if (unlikely(channel->irq_mod_score <
298 irq_adapt_low_thresh)) {
299 if (channel->irq_moderation > 1) {
300 channel->irq_moderation -= 1;
301 efx->type->push_irq_moderation(channel);
302 }
303 } else if (unlikely(channel->irq_mod_score >
304 irq_adapt_high_thresh)) {
305 if (channel->irq_moderation <
306 efx->irq_rx_moderation) {
307 channel->irq_moderation += 1;
308 efx->type->push_irq_moderation(channel);
309 }
310 }
311 channel->irq_count = 0;
312 channel->irq_mod_score = 0;
313 }
314
315 efx_filter_rfs_expire(channel);
316
317 /* There is no race here; although napi_disable() will
318 * only wait for napi_complete(), this isn't a problem
319 * since efx_channel_processed() will have no effect if
320 * interrupts have already been disabled.
321 */
322 napi_complete(napi);
323 efx_channel_processed(channel);
324 }
325
326 return spent;
327 }
328
329 /* Process the eventq of the specified channel immediately on this CPU
330 *
331 * Disable hardware generated interrupts, wait for any existing
332 * processing to finish, then directly poll (and ack ) the eventq.
333 * Finally reenable NAPI and interrupts.
334 *
335 * This is for use only during a loopback self-test. It must not
336 * deliver any packets up the stack as this can result in deadlock.
337 */
efx_process_channel_now(struct efx_channel * channel)338 void efx_process_channel_now(struct efx_channel *channel)
339 {
340 struct efx_nic *efx = channel->efx;
341
342 BUG_ON(channel->channel >= efx->n_channels);
343 BUG_ON(!channel->enabled);
344 BUG_ON(!efx->loopback_selftest);
345
346 /* Disable interrupts and wait for ISRs to complete */
347 efx_nic_disable_interrupts(efx);
348 if (efx->legacy_irq) {
349 synchronize_irq(efx->legacy_irq);
350 efx->legacy_irq_enabled = false;
351 }
352 if (channel->irq)
353 synchronize_irq(channel->irq);
354
355 /* Wait for any NAPI processing to complete */
356 napi_disable(&channel->napi_str);
357
358 /* Poll the channel */
359 efx_process_channel(channel, channel->eventq_mask + 1);
360
361 /* Ack the eventq. This may cause an interrupt to be generated
362 * when they are reenabled */
363 efx_channel_processed(channel);
364
365 napi_enable(&channel->napi_str);
366 if (efx->legacy_irq)
367 efx->legacy_irq_enabled = true;
368 efx_nic_enable_interrupts(efx);
369 }
370
371 /* Create event queue
372 * Event queue memory allocations are done only once. If the channel
373 * is reset, the memory buffer will be reused; this guards against
374 * errors during channel reset and also simplifies interrupt handling.
375 */
efx_probe_eventq(struct efx_channel * channel)376 static int efx_probe_eventq(struct efx_channel *channel)
377 {
378 struct efx_nic *efx = channel->efx;
379 unsigned long entries;
380
381 netif_dbg(efx, probe, efx->net_dev,
382 "chan %d create event queue\n", channel->channel);
383
384 /* Build an event queue with room for one event per tx and rx buffer,
385 * plus some extra for link state events and MCDI completions. */
386 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
387 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
388 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
389
390 return efx_nic_probe_eventq(channel);
391 }
392
393 /* Prepare channel's event queue */
efx_init_eventq(struct efx_channel * channel)394 static void efx_init_eventq(struct efx_channel *channel)
395 {
396 netif_dbg(channel->efx, drv, channel->efx->net_dev,
397 "chan %d init event queue\n", channel->channel);
398
399 channel->eventq_read_ptr = 0;
400
401 efx_nic_init_eventq(channel);
402 }
403
404 /* Enable event queue processing and NAPI */
efx_start_eventq(struct efx_channel * channel)405 static void efx_start_eventq(struct efx_channel *channel)
406 {
407 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
408 "chan %d start event queue\n", channel->channel);
409
410 /* The interrupt handler for this channel may set work_pending
411 * as soon as we enable it. Make sure it's cleared before
412 * then. Similarly, make sure it sees the enabled flag set.
413 */
414 channel->work_pending = false;
415 channel->enabled = true;
416 smp_wmb();
417
418 napi_enable(&channel->napi_str);
419 efx_nic_eventq_read_ack(channel);
420 }
421
422 /* Disable event queue processing and NAPI */
efx_stop_eventq(struct efx_channel * channel)423 static void efx_stop_eventq(struct efx_channel *channel)
424 {
425 if (!channel->enabled)
426 return;
427
428 napi_disable(&channel->napi_str);
429 channel->enabled = false;
430 }
431
efx_fini_eventq(struct efx_channel * channel)432 static void efx_fini_eventq(struct efx_channel *channel)
433 {
434 netif_dbg(channel->efx, drv, channel->efx->net_dev,
435 "chan %d fini event queue\n", channel->channel);
436
437 efx_nic_fini_eventq(channel);
438 }
439
efx_remove_eventq(struct efx_channel * channel)440 static void efx_remove_eventq(struct efx_channel *channel)
441 {
442 netif_dbg(channel->efx, drv, channel->efx->net_dev,
443 "chan %d remove event queue\n", channel->channel);
444
445 efx_nic_remove_eventq(channel);
446 }
447
448 /**************************************************************************
449 *
450 * Channel handling
451 *
452 *************************************************************************/
453
454 /* Allocate and initialise a channel structure. */
455 static struct efx_channel *
efx_alloc_channel(struct efx_nic * efx,int i,struct efx_channel * old_channel)456 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
457 {
458 struct efx_channel *channel;
459 struct efx_rx_queue *rx_queue;
460 struct efx_tx_queue *tx_queue;
461 int j;
462
463 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
464 if (!channel)
465 return NULL;
466
467 channel->efx = efx;
468 channel->channel = i;
469 channel->type = &efx_default_channel_type;
470
471 for (j = 0; j < EFX_TXQ_TYPES; j++) {
472 tx_queue = &channel->tx_queue[j];
473 tx_queue->efx = efx;
474 tx_queue->queue = i * EFX_TXQ_TYPES + j;
475 tx_queue->channel = channel;
476 }
477
478 rx_queue = &channel->rx_queue;
479 rx_queue->efx = efx;
480 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
481 (unsigned long)rx_queue);
482
483 return channel;
484 }
485
486 /* Allocate and initialise a channel structure, copying parameters
487 * (but not resources) from an old channel structure.
488 */
489 static struct efx_channel *
efx_copy_channel(const struct efx_channel * old_channel)490 efx_copy_channel(const struct efx_channel *old_channel)
491 {
492 struct efx_channel *channel;
493 struct efx_rx_queue *rx_queue;
494 struct efx_tx_queue *tx_queue;
495 int j;
496
497 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
498 if (!channel)
499 return NULL;
500
501 *channel = *old_channel;
502
503 channel->napi_dev = NULL;
504 memset(&channel->eventq, 0, sizeof(channel->eventq));
505
506 for (j = 0; j < EFX_TXQ_TYPES; j++) {
507 tx_queue = &channel->tx_queue[j];
508 if (tx_queue->channel)
509 tx_queue->channel = channel;
510 tx_queue->buffer = NULL;
511 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
512 }
513
514 rx_queue = &channel->rx_queue;
515 rx_queue->buffer = NULL;
516 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
517 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
518 (unsigned long)rx_queue);
519
520 return channel;
521 }
522
efx_probe_channel(struct efx_channel * channel)523 static int efx_probe_channel(struct efx_channel *channel)
524 {
525 struct efx_tx_queue *tx_queue;
526 struct efx_rx_queue *rx_queue;
527 int rc;
528
529 netif_dbg(channel->efx, probe, channel->efx->net_dev,
530 "creating channel %d\n", channel->channel);
531
532 rc = channel->type->pre_probe(channel);
533 if (rc)
534 goto fail;
535
536 rc = efx_probe_eventq(channel);
537 if (rc)
538 goto fail;
539
540 efx_for_each_channel_tx_queue(tx_queue, channel) {
541 rc = efx_probe_tx_queue(tx_queue);
542 if (rc)
543 goto fail;
544 }
545
546 efx_for_each_channel_rx_queue(rx_queue, channel) {
547 rc = efx_probe_rx_queue(rx_queue);
548 if (rc)
549 goto fail;
550 }
551
552 channel->n_rx_frm_trunc = 0;
553
554 return 0;
555
556 fail:
557 efx_remove_channel(channel);
558 return rc;
559 }
560
561 static void
efx_get_channel_name(struct efx_channel * channel,char * buf,size_t len)562 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
563 {
564 struct efx_nic *efx = channel->efx;
565 const char *type;
566 int number;
567
568 number = channel->channel;
569 if (efx->tx_channel_offset == 0) {
570 type = "";
571 } else if (channel->channel < efx->tx_channel_offset) {
572 type = "-rx";
573 } else {
574 type = "-tx";
575 number -= efx->tx_channel_offset;
576 }
577 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
578 }
579
efx_set_channel_names(struct efx_nic * efx)580 static void efx_set_channel_names(struct efx_nic *efx)
581 {
582 struct efx_channel *channel;
583
584 efx_for_each_channel(channel, efx)
585 channel->type->get_name(channel,
586 efx->channel_name[channel->channel],
587 sizeof(efx->channel_name[0]));
588 }
589
efx_probe_channels(struct efx_nic * efx)590 static int efx_probe_channels(struct efx_nic *efx)
591 {
592 struct efx_channel *channel;
593 int rc;
594
595 /* Restart special buffer allocation */
596 efx->next_buffer_table = 0;
597
598 /* Probe channels in reverse, so that any 'extra' channels
599 * use the start of the buffer table. This allows the traffic
600 * channels to be resized without moving them or wasting the
601 * entries before them.
602 */
603 efx_for_each_channel_rev(channel, efx) {
604 rc = efx_probe_channel(channel);
605 if (rc) {
606 netif_err(efx, probe, efx->net_dev,
607 "failed to create channel %d\n",
608 channel->channel);
609 goto fail;
610 }
611 }
612 efx_set_channel_names(efx);
613
614 return 0;
615
616 fail:
617 efx_remove_channels(efx);
618 return rc;
619 }
620
621 /* Channels are shutdown and reinitialised whilst the NIC is running
622 * to propagate configuration changes (mtu, checksum offload), or
623 * to clear hardware error conditions
624 */
efx_start_datapath(struct efx_nic * efx)625 static void efx_start_datapath(struct efx_nic *efx)
626 {
627 bool old_rx_scatter = efx->rx_scatter;
628 struct efx_tx_queue *tx_queue;
629 struct efx_rx_queue *rx_queue;
630 struct efx_channel *channel;
631 size_t rx_buf_len;
632
633 /* Calculate the rx buffer allocation parameters required to
634 * support the current MTU, including padding for header
635 * alignment and overruns.
636 */
637 efx->rx_dma_len = (efx->type->rx_buffer_hash_size +
638 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
639 efx->type->rx_buffer_padding);
640 rx_buf_len = (sizeof(struct efx_rx_page_state) +
641 NET_IP_ALIGN + efx->rx_dma_len);
642 if (rx_buf_len <= PAGE_SIZE) {
643 efx->rx_scatter = false;
644 efx->rx_buffer_order = 0;
645 } else if (efx->type->can_rx_scatter) {
646 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
647 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
648 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
649 EFX_RX_BUF_ALIGNMENT) >
650 PAGE_SIZE);
651 efx->rx_scatter = true;
652 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
653 efx->rx_buffer_order = 0;
654 } else {
655 efx->rx_scatter = false;
656 efx->rx_buffer_order = get_order(rx_buf_len);
657 }
658
659 efx_rx_config_page_split(efx);
660 if (efx->rx_buffer_order)
661 netif_dbg(efx, drv, efx->net_dev,
662 "RX buf len=%u; page order=%u batch=%u\n",
663 efx->rx_dma_len, efx->rx_buffer_order,
664 efx->rx_pages_per_batch);
665 else
666 netif_dbg(efx, drv, efx->net_dev,
667 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
668 efx->rx_dma_len, efx->rx_page_buf_step,
669 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
670
671 /* RX filters also have scatter-enabled flags */
672 if (efx->rx_scatter != old_rx_scatter)
673 efx_filter_update_rx_scatter(efx);
674
675 /* We must keep at least one descriptor in a TX ring empty.
676 * We could avoid this when the queue size does not exactly
677 * match the hardware ring size, but it's not that important.
678 * Therefore we stop the queue when one more skb might fill
679 * the ring completely. We wake it when half way back to
680 * empty.
681 */
682 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
683 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
684
685 /* Initialise the channels */
686 efx_for_each_channel(channel, efx) {
687 efx_for_each_channel_tx_queue(tx_queue, channel)
688 efx_init_tx_queue(tx_queue);
689
690 efx_for_each_channel_rx_queue(rx_queue, channel) {
691 efx_init_rx_queue(rx_queue);
692 efx_nic_generate_fill_event(rx_queue);
693 }
694
695 WARN_ON(channel->rx_pkt_n_frags);
696 }
697
698 if (netif_device_present(efx->net_dev))
699 netif_tx_wake_all_queues(efx->net_dev);
700 }
701
efx_stop_datapath(struct efx_nic * efx)702 static void efx_stop_datapath(struct efx_nic *efx)
703 {
704 struct efx_channel *channel;
705 struct efx_tx_queue *tx_queue;
706 struct efx_rx_queue *rx_queue;
707 struct pci_dev *dev = efx->pci_dev;
708 int rc;
709
710 EFX_ASSERT_RESET_SERIALISED(efx);
711 BUG_ON(efx->port_enabled);
712
713 /* Only perform flush if dma is enabled */
714 if (dev->is_busmaster && efx->state != STATE_RECOVERY) {
715 rc = efx_nic_flush_queues(efx);
716
717 if (rc && EFX_WORKAROUND_7803(efx)) {
718 /* Schedule a reset to recover from the flush failure. The
719 * descriptor caches reference memory we're about to free,
720 * but falcon_reconfigure_mac_wrapper() won't reconnect
721 * the MACs because of the pending reset. */
722 netif_err(efx, drv, efx->net_dev,
723 "Resetting to recover from flush failure\n");
724 efx_schedule_reset(efx, RESET_TYPE_ALL);
725 } else if (rc) {
726 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
727 } else {
728 netif_dbg(efx, drv, efx->net_dev,
729 "successfully flushed all queues\n");
730 }
731 }
732
733 efx_for_each_channel(channel, efx) {
734 /* RX packet processing is pipelined, so wait for the
735 * NAPI handler to complete. At least event queue 0
736 * might be kept active by non-data events, so don't
737 * use napi_synchronize() but actually disable NAPI
738 * temporarily.
739 */
740 if (efx_channel_has_rx_queue(channel)) {
741 efx_stop_eventq(channel);
742 efx_start_eventq(channel);
743 }
744
745 efx_for_each_channel_rx_queue(rx_queue, channel)
746 efx_fini_rx_queue(rx_queue);
747 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
748 efx_fini_tx_queue(tx_queue);
749 }
750 }
751
efx_remove_channel(struct efx_channel * channel)752 static void efx_remove_channel(struct efx_channel *channel)
753 {
754 struct efx_tx_queue *tx_queue;
755 struct efx_rx_queue *rx_queue;
756
757 netif_dbg(channel->efx, drv, channel->efx->net_dev,
758 "destroy chan %d\n", channel->channel);
759
760 efx_for_each_channel_rx_queue(rx_queue, channel)
761 efx_remove_rx_queue(rx_queue);
762 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
763 efx_remove_tx_queue(tx_queue);
764 efx_remove_eventq(channel);
765 channel->type->post_remove(channel);
766 }
767
efx_remove_channels(struct efx_nic * efx)768 static void efx_remove_channels(struct efx_nic *efx)
769 {
770 struct efx_channel *channel;
771
772 efx_for_each_channel(channel, efx)
773 efx_remove_channel(channel);
774 }
775
776 int
efx_realloc_channels(struct efx_nic * efx,u32 rxq_entries,u32 txq_entries)777 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
778 {
779 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
780 u32 old_rxq_entries, old_txq_entries;
781 unsigned i, next_buffer_table = 0;
782 int rc;
783
784 rc = efx_check_disabled(efx);
785 if (rc)
786 return rc;
787
788 /* Not all channels should be reallocated. We must avoid
789 * reallocating their buffer table entries.
790 */
791 efx_for_each_channel(channel, efx) {
792 struct efx_rx_queue *rx_queue;
793 struct efx_tx_queue *tx_queue;
794
795 if (channel->type->copy)
796 continue;
797 next_buffer_table = max(next_buffer_table,
798 channel->eventq.index +
799 channel->eventq.entries);
800 efx_for_each_channel_rx_queue(rx_queue, channel)
801 next_buffer_table = max(next_buffer_table,
802 rx_queue->rxd.index +
803 rx_queue->rxd.entries);
804 efx_for_each_channel_tx_queue(tx_queue, channel)
805 next_buffer_table = max(next_buffer_table,
806 tx_queue->txd.index +
807 tx_queue->txd.entries);
808 }
809
810 efx_device_detach_sync(efx);
811 efx_stop_all(efx);
812 efx_stop_interrupts(efx, true);
813
814 /* Clone channels (where possible) */
815 memset(other_channel, 0, sizeof(other_channel));
816 for (i = 0; i < efx->n_channels; i++) {
817 channel = efx->channel[i];
818 if (channel->type->copy)
819 channel = channel->type->copy(channel);
820 if (!channel) {
821 rc = -ENOMEM;
822 goto out;
823 }
824 other_channel[i] = channel;
825 }
826
827 /* Swap entry counts and channel pointers */
828 old_rxq_entries = efx->rxq_entries;
829 old_txq_entries = efx->txq_entries;
830 efx->rxq_entries = rxq_entries;
831 efx->txq_entries = txq_entries;
832 for (i = 0; i < efx->n_channels; i++) {
833 channel = efx->channel[i];
834 efx->channel[i] = other_channel[i];
835 other_channel[i] = channel;
836 }
837
838 /* Restart buffer table allocation */
839 efx->next_buffer_table = next_buffer_table;
840
841 for (i = 0; i < efx->n_channels; i++) {
842 channel = efx->channel[i];
843 if (!channel->type->copy)
844 continue;
845 rc = efx_probe_channel(channel);
846 if (rc)
847 goto rollback;
848 efx_init_napi_channel(efx->channel[i]);
849 }
850
851 out:
852 /* Destroy unused channel structures */
853 for (i = 0; i < efx->n_channels; i++) {
854 channel = other_channel[i];
855 if (channel && channel->type->copy) {
856 efx_fini_napi_channel(channel);
857 efx_remove_channel(channel);
858 kfree(channel);
859 }
860 }
861
862 efx_start_interrupts(efx, true);
863 efx_start_all(efx);
864 netif_device_attach(efx->net_dev);
865 return rc;
866
867 rollback:
868 /* Swap back */
869 efx->rxq_entries = old_rxq_entries;
870 efx->txq_entries = old_txq_entries;
871 for (i = 0; i < efx->n_channels; i++) {
872 channel = efx->channel[i];
873 efx->channel[i] = other_channel[i];
874 other_channel[i] = channel;
875 }
876 goto out;
877 }
878
efx_schedule_slow_fill(struct efx_rx_queue * rx_queue)879 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
880 {
881 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
882 }
883
884 static const struct efx_channel_type efx_default_channel_type = {
885 .pre_probe = efx_channel_dummy_op_int,
886 .post_remove = efx_channel_dummy_op_void,
887 .get_name = efx_get_channel_name,
888 .copy = efx_copy_channel,
889 .keep_eventq = false,
890 };
891
efx_channel_dummy_op_int(struct efx_channel * channel)892 int efx_channel_dummy_op_int(struct efx_channel *channel)
893 {
894 return 0;
895 }
896
efx_channel_dummy_op_void(struct efx_channel * channel)897 void efx_channel_dummy_op_void(struct efx_channel *channel)
898 {
899 }
900
901 /**************************************************************************
902 *
903 * Port handling
904 *
905 **************************************************************************/
906
907 /* This ensures that the kernel is kept informed (via
908 * netif_carrier_on/off) of the link status, and also maintains the
909 * link status's stop on the port's TX queue.
910 */
efx_link_status_changed(struct efx_nic * efx)911 void efx_link_status_changed(struct efx_nic *efx)
912 {
913 struct efx_link_state *link_state = &efx->link_state;
914
915 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
916 * that no events are triggered between unregister_netdev() and the
917 * driver unloading. A more general condition is that NETDEV_CHANGE
918 * can only be generated between NETDEV_UP and NETDEV_DOWN */
919 if (!netif_running(efx->net_dev))
920 return;
921
922 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
923 efx->n_link_state_changes++;
924
925 if (link_state->up)
926 netif_carrier_on(efx->net_dev);
927 else
928 netif_carrier_off(efx->net_dev);
929 }
930
931 /* Status message for kernel log */
932 if (link_state->up)
933 netif_info(efx, link, efx->net_dev,
934 "link up at %uMbps %s-duplex (MTU %d)%s\n",
935 link_state->speed, link_state->fd ? "full" : "half",
936 efx->net_dev->mtu,
937 (efx->promiscuous ? " [PROMISC]" : ""));
938 else
939 netif_info(efx, link, efx->net_dev, "link down\n");
940 }
941
efx_link_set_advertising(struct efx_nic * efx,u32 advertising)942 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
943 {
944 efx->link_advertising = advertising;
945 if (advertising) {
946 if (advertising & ADVERTISED_Pause)
947 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
948 else
949 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
950 if (advertising & ADVERTISED_Asym_Pause)
951 efx->wanted_fc ^= EFX_FC_TX;
952 }
953 }
954
efx_link_set_wanted_fc(struct efx_nic * efx,u8 wanted_fc)955 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
956 {
957 efx->wanted_fc = wanted_fc;
958 if (efx->link_advertising) {
959 if (wanted_fc & EFX_FC_RX)
960 efx->link_advertising |= (ADVERTISED_Pause |
961 ADVERTISED_Asym_Pause);
962 else
963 efx->link_advertising &= ~(ADVERTISED_Pause |
964 ADVERTISED_Asym_Pause);
965 if (wanted_fc & EFX_FC_TX)
966 efx->link_advertising ^= ADVERTISED_Asym_Pause;
967 }
968 }
969
970 static void efx_fini_port(struct efx_nic *efx);
971
972 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
973 * the MAC appropriately. All other PHY configuration changes are pushed
974 * through phy_op->set_settings(), and pushed asynchronously to the MAC
975 * through efx_monitor().
976 *
977 * Callers must hold the mac_lock
978 */
__efx_reconfigure_port(struct efx_nic * efx)979 int __efx_reconfigure_port(struct efx_nic *efx)
980 {
981 enum efx_phy_mode phy_mode;
982 int rc;
983
984 WARN_ON(!mutex_is_locked(&efx->mac_lock));
985
986 /* Serialise the promiscuous flag with efx_set_rx_mode. */
987 netif_addr_lock_bh(efx->net_dev);
988 netif_addr_unlock_bh(efx->net_dev);
989
990 /* Disable PHY transmit in mac level loopbacks */
991 phy_mode = efx->phy_mode;
992 if (LOOPBACK_INTERNAL(efx))
993 efx->phy_mode |= PHY_MODE_TX_DISABLED;
994 else
995 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
996
997 rc = efx->type->reconfigure_port(efx);
998
999 if (rc)
1000 efx->phy_mode = phy_mode;
1001
1002 return rc;
1003 }
1004
1005 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1006 * disabled. */
efx_reconfigure_port(struct efx_nic * efx)1007 int efx_reconfigure_port(struct efx_nic *efx)
1008 {
1009 int rc;
1010
1011 EFX_ASSERT_RESET_SERIALISED(efx);
1012
1013 mutex_lock(&efx->mac_lock);
1014 rc = __efx_reconfigure_port(efx);
1015 mutex_unlock(&efx->mac_lock);
1016
1017 return rc;
1018 }
1019
1020 /* Asynchronous work item for changing MAC promiscuity and multicast
1021 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1022 * MAC directly. */
efx_mac_work(struct work_struct * data)1023 static void efx_mac_work(struct work_struct *data)
1024 {
1025 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1026
1027 mutex_lock(&efx->mac_lock);
1028 if (efx->port_enabled)
1029 efx->type->reconfigure_mac(efx);
1030 mutex_unlock(&efx->mac_lock);
1031 }
1032
efx_probe_port(struct efx_nic * efx)1033 static int efx_probe_port(struct efx_nic *efx)
1034 {
1035 int rc;
1036
1037 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1038
1039 if (phy_flash_cfg)
1040 efx->phy_mode = PHY_MODE_SPECIAL;
1041
1042 /* Connect up MAC/PHY operations table */
1043 rc = efx->type->probe_port(efx);
1044 if (rc)
1045 return rc;
1046
1047 /* Initialise MAC address to permanent address */
1048 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1049
1050 return 0;
1051 }
1052
efx_init_port(struct efx_nic * efx)1053 static int efx_init_port(struct efx_nic *efx)
1054 {
1055 int rc;
1056
1057 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1058
1059 mutex_lock(&efx->mac_lock);
1060
1061 rc = efx->phy_op->init(efx);
1062 if (rc)
1063 goto fail1;
1064
1065 efx->port_initialized = true;
1066
1067 /* Reconfigure the MAC before creating dma queues (required for
1068 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1069 efx->type->reconfigure_mac(efx);
1070
1071 /* Ensure the PHY advertises the correct flow control settings */
1072 rc = efx->phy_op->reconfigure(efx);
1073 if (rc)
1074 goto fail2;
1075
1076 mutex_unlock(&efx->mac_lock);
1077 return 0;
1078
1079 fail2:
1080 efx->phy_op->fini(efx);
1081 fail1:
1082 mutex_unlock(&efx->mac_lock);
1083 return rc;
1084 }
1085
efx_start_port(struct efx_nic * efx)1086 static void efx_start_port(struct efx_nic *efx)
1087 {
1088 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1089 BUG_ON(efx->port_enabled);
1090
1091 mutex_lock(&efx->mac_lock);
1092 efx->port_enabled = true;
1093
1094 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1095 * and then cancelled by efx_flush_all() */
1096 efx->type->reconfigure_mac(efx);
1097
1098 mutex_unlock(&efx->mac_lock);
1099 }
1100
1101 /* Prevent efx_mac_work() and efx_monitor() from working */
efx_stop_port(struct efx_nic * efx)1102 static void efx_stop_port(struct efx_nic *efx)
1103 {
1104 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1105
1106 mutex_lock(&efx->mac_lock);
1107 efx->port_enabled = false;
1108 mutex_unlock(&efx->mac_lock);
1109
1110 /* Serialise against efx_set_multicast_list() */
1111 netif_addr_lock_bh(efx->net_dev);
1112 netif_addr_unlock_bh(efx->net_dev);
1113 }
1114
efx_fini_port(struct efx_nic * efx)1115 static void efx_fini_port(struct efx_nic *efx)
1116 {
1117 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1118
1119 if (!efx->port_initialized)
1120 return;
1121
1122 efx->phy_op->fini(efx);
1123 efx->port_initialized = false;
1124
1125 efx->link_state.up = false;
1126 efx_link_status_changed(efx);
1127 }
1128
efx_remove_port(struct efx_nic * efx)1129 static void efx_remove_port(struct efx_nic *efx)
1130 {
1131 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1132
1133 efx->type->remove_port(efx);
1134 }
1135
1136 /**************************************************************************
1137 *
1138 * NIC handling
1139 *
1140 **************************************************************************/
1141
1142 /* This configures the PCI device to enable I/O and DMA. */
efx_init_io(struct efx_nic * efx)1143 static int efx_init_io(struct efx_nic *efx)
1144 {
1145 struct pci_dev *pci_dev = efx->pci_dev;
1146 dma_addr_t dma_mask = efx->type->max_dma_mask;
1147 int rc;
1148
1149 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1150
1151 rc = pci_enable_device(pci_dev);
1152 if (rc) {
1153 netif_err(efx, probe, efx->net_dev,
1154 "failed to enable PCI device\n");
1155 goto fail1;
1156 }
1157
1158 pci_set_master(pci_dev);
1159
1160 /* Set the PCI DMA mask. Try all possibilities from our
1161 * genuine mask down to 32 bits, because some architectures
1162 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1163 * masks event though they reject 46 bit masks.
1164 */
1165 while (dma_mask > 0x7fffffffUL) {
1166 if (dma_supported(&pci_dev->dev, dma_mask)) {
1167 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1168 if (rc == 0)
1169 break;
1170 }
1171 dma_mask >>= 1;
1172 }
1173 if (rc) {
1174 netif_err(efx, probe, efx->net_dev,
1175 "could not find a suitable DMA mask\n");
1176 goto fail2;
1177 }
1178 netif_dbg(efx, probe, efx->net_dev,
1179 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1180 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1181 if (rc) {
1182 /* dma_set_coherent_mask() is not *allowed* to
1183 * fail with a mask that dma_set_mask() accepted,
1184 * but just in case...
1185 */
1186 netif_err(efx, probe, efx->net_dev,
1187 "failed to set consistent DMA mask\n");
1188 goto fail2;
1189 }
1190
1191 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1192 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1193 if (rc) {
1194 netif_err(efx, probe, efx->net_dev,
1195 "request for memory BAR failed\n");
1196 rc = -EIO;
1197 goto fail3;
1198 }
1199 efx->membase = ioremap_nocache(efx->membase_phys,
1200 efx->type->mem_map_size);
1201 if (!efx->membase) {
1202 netif_err(efx, probe, efx->net_dev,
1203 "could not map memory BAR at %llx+%x\n",
1204 (unsigned long long)efx->membase_phys,
1205 efx->type->mem_map_size);
1206 rc = -ENOMEM;
1207 goto fail4;
1208 }
1209 netif_dbg(efx, probe, efx->net_dev,
1210 "memory BAR at %llx+%x (virtual %p)\n",
1211 (unsigned long long)efx->membase_phys,
1212 efx->type->mem_map_size, efx->membase);
1213
1214 return 0;
1215
1216 fail4:
1217 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1218 fail3:
1219 efx->membase_phys = 0;
1220 fail2:
1221 pci_disable_device(efx->pci_dev);
1222 fail1:
1223 return rc;
1224 }
1225
efx_fini_io(struct efx_nic * efx)1226 static void efx_fini_io(struct efx_nic *efx)
1227 {
1228 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1229
1230 if (efx->membase) {
1231 iounmap(efx->membase);
1232 efx->membase = NULL;
1233 }
1234
1235 if (efx->membase_phys) {
1236 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1237 efx->membase_phys = 0;
1238 }
1239
1240 pci_disable_device(efx->pci_dev);
1241 }
1242
efx_wanted_parallelism(struct efx_nic * efx)1243 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1244 {
1245 cpumask_var_t thread_mask;
1246 unsigned int count;
1247 int cpu;
1248
1249 if (rss_cpus) {
1250 count = rss_cpus;
1251 } else {
1252 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1253 netif_warn(efx, probe, efx->net_dev,
1254 "RSS disabled due to allocation failure\n");
1255 return 1;
1256 }
1257
1258 count = 0;
1259 for_each_online_cpu(cpu) {
1260 if (!cpumask_test_cpu(cpu, thread_mask)) {
1261 ++count;
1262 cpumask_or(thread_mask, thread_mask,
1263 topology_thread_cpumask(cpu));
1264 }
1265 }
1266
1267 free_cpumask_var(thread_mask);
1268 }
1269
1270 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1271 * table entries that are inaccessible to VFs
1272 */
1273 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1274 count > efx_vf_size(efx)) {
1275 netif_warn(efx, probe, efx->net_dev,
1276 "Reducing number of RSS channels from %u to %u for "
1277 "VF support. Increase vf-msix-limit to use more "
1278 "channels on the PF.\n",
1279 count, efx_vf_size(efx));
1280 count = efx_vf_size(efx);
1281 }
1282
1283 return count;
1284 }
1285
1286 static int
efx_init_rx_cpu_rmap(struct efx_nic * efx,struct msix_entry * xentries)1287 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1288 {
1289 #ifdef CONFIG_RFS_ACCEL
1290 unsigned int i;
1291 int rc;
1292
1293 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1294 if (!efx->net_dev->rx_cpu_rmap)
1295 return -ENOMEM;
1296 for (i = 0; i < efx->n_rx_channels; i++) {
1297 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1298 xentries[i].vector);
1299 if (rc) {
1300 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1301 efx->net_dev->rx_cpu_rmap = NULL;
1302 return rc;
1303 }
1304 }
1305 #endif
1306 return 0;
1307 }
1308
1309 /* Probe the number and type of interrupts we are able to obtain, and
1310 * the resulting numbers of channels and RX queues.
1311 */
efx_probe_interrupts(struct efx_nic * efx)1312 static int efx_probe_interrupts(struct efx_nic *efx)
1313 {
1314 unsigned int max_channels =
1315 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1316 unsigned int extra_channels = 0;
1317 unsigned int i, j;
1318 int rc;
1319
1320 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1321 if (efx->extra_channel_type[i])
1322 ++extra_channels;
1323
1324 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1325 struct msix_entry xentries[EFX_MAX_CHANNELS];
1326 unsigned int n_channels;
1327
1328 n_channels = efx_wanted_parallelism(efx);
1329 if (separate_tx_channels)
1330 n_channels *= 2;
1331 n_channels += extra_channels;
1332 n_channels = min(n_channels, max_channels);
1333
1334 for (i = 0; i < n_channels; i++)
1335 xentries[i].entry = i;
1336 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1337 if (rc > 0) {
1338 netif_err(efx, drv, efx->net_dev,
1339 "WARNING: Insufficient MSI-X vectors"
1340 " available (%d < %u).\n", rc, n_channels);
1341 netif_err(efx, drv, efx->net_dev,
1342 "WARNING: Performance may be reduced.\n");
1343 EFX_BUG_ON_PARANOID(rc >= n_channels);
1344 n_channels = rc;
1345 rc = pci_enable_msix(efx->pci_dev, xentries,
1346 n_channels);
1347 }
1348
1349 if (rc == 0) {
1350 efx->n_channels = n_channels;
1351 if (n_channels > extra_channels)
1352 n_channels -= extra_channels;
1353 if (separate_tx_channels) {
1354 efx->n_tx_channels = max(n_channels / 2, 1U);
1355 efx->n_rx_channels = max(n_channels -
1356 efx->n_tx_channels,
1357 1U);
1358 } else {
1359 efx->n_tx_channels = n_channels;
1360 efx->n_rx_channels = n_channels;
1361 }
1362 rc = efx_init_rx_cpu_rmap(efx, xentries);
1363 if (rc) {
1364 pci_disable_msix(efx->pci_dev);
1365 return rc;
1366 }
1367 for (i = 0; i < efx->n_channels; i++)
1368 efx_get_channel(efx, i)->irq =
1369 xentries[i].vector;
1370 } else {
1371 /* Fall back to single channel MSI */
1372 efx->interrupt_mode = EFX_INT_MODE_MSI;
1373 netif_err(efx, drv, efx->net_dev,
1374 "could not enable MSI-X\n");
1375 }
1376 }
1377
1378 /* Try single interrupt MSI */
1379 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1380 efx->n_channels = 1;
1381 efx->n_rx_channels = 1;
1382 efx->n_tx_channels = 1;
1383 rc = pci_enable_msi(efx->pci_dev);
1384 if (rc == 0) {
1385 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1386 } else {
1387 netif_err(efx, drv, efx->net_dev,
1388 "could not enable MSI\n");
1389 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1390 }
1391 }
1392
1393 /* Assume legacy interrupts */
1394 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1395 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1396 efx->n_rx_channels = 1;
1397 efx->n_tx_channels = 1;
1398 efx->legacy_irq = efx->pci_dev->irq;
1399 }
1400
1401 /* Assign extra channels if possible */
1402 j = efx->n_channels;
1403 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1404 if (!efx->extra_channel_type[i])
1405 continue;
1406 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1407 efx->n_channels <= extra_channels) {
1408 efx->extra_channel_type[i]->handle_no_channel(efx);
1409 } else {
1410 --j;
1411 efx_get_channel(efx, j)->type =
1412 efx->extra_channel_type[i];
1413 }
1414 }
1415
1416 /* RSS might be usable on VFs even if it is disabled on the PF */
1417 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1418 efx->n_rx_channels : efx_vf_size(efx));
1419
1420 return 0;
1421 }
1422
1423 /* Enable interrupts, then probe and start the event queues */
efx_start_interrupts(struct efx_nic * efx,bool may_keep_eventq)1424 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1425 {
1426 struct efx_channel *channel;
1427
1428 BUG_ON(efx->state == STATE_DISABLED);
1429
1430 if (efx->legacy_irq)
1431 efx->legacy_irq_enabled = true;
1432 efx_nic_enable_interrupts(efx);
1433
1434 efx_for_each_channel(channel, efx) {
1435 if (!channel->type->keep_eventq || !may_keep_eventq)
1436 efx_init_eventq(channel);
1437 efx_start_eventq(channel);
1438 }
1439
1440 efx_mcdi_mode_event(efx);
1441 }
1442
efx_stop_interrupts(struct efx_nic * efx,bool may_keep_eventq)1443 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1444 {
1445 struct efx_channel *channel;
1446
1447 if (efx->state == STATE_DISABLED)
1448 return;
1449
1450 efx_mcdi_mode_poll(efx);
1451
1452 efx_nic_disable_interrupts(efx);
1453 if (efx->legacy_irq) {
1454 synchronize_irq(efx->legacy_irq);
1455 efx->legacy_irq_enabled = false;
1456 }
1457
1458 efx_for_each_channel(channel, efx) {
1459 if (channel->irq)
1460 synchronize_irq(channel->irq);
1461
1462 efx_stop_eventq(channel);
1463 if (!channel->type->keep_eventq || !may_keep_eventq)
1464 efx_fini_eventq(channel);
1465 }
1466 }
1467
efx_remove_interrupts(struct efx_nic * efx)1468 static void efx_remove_interrupts(struct efx_nic *efx)
1469 {
1470 struct efx_channel *channel;
1471
1472 /* Remove MSI/MSI-X interrupts */
1473 efx_for_each_channel(channel, efx)
1474 channel->irq = 0;
1475 pci_disable_msi(efx->pci_dev);
1476 pci_disable_msix(efx->pci_dev);
1477
1478 /* Remove legacy interrupt */
1479 efx->legacy_irq = 0;
1480 }
1481
efx_set_channels(struct efx_nic * efx)1482 static void efx_set_channels(struct efx_nic *efx)
1483 {
1484 struct efx_channel *channel;
1485 struct efx_tx_queue *tx_queue;
1486
1487 efx->tx_channel_offset =
1488 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1489
1490 /* We need to mark which channels really have RX and TX
1491 * queues, and adjust the TX queue numbers if we have separate
1492 * RX-only and TX-only channels.
1493 */
1494 efx_for_each_channel(channel, efx) {
1495 if (channel->channel < efx->n_rx_channels)
1496 channel->rx_queue.core_index = channel->channel;
1497 else
1498 channel->rx_queue.core_index = -1;
1499
1500 efx_for_each_channel_tx_queue(tx_queue, channel)
1501 tx_queue->queue -= (efx->tx_channel_offset *
1502 EFX_TXQ_TYPES);
1503 }
1504 }
1505
efx_probe_nic(struct efx_nic * efx)1506 static int efx_probe_nic(struct efx_nic *efx)
1507 {
1508 size_t i;
1509 int rc;
1510
1511 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1512
1513 /* Carry out hardware-type specific initialisation */
1514 rc = efx->type->probe(efx);
1515 if (rc)
1516 return rc;
1517
1518 /* Determine the number of channels and queues by trying to hook
1519 * in MSI-X interrupts. */
1520 rc = efx_probe_interrupts(efx);
1521 if (rc)
1522 goto fail;
1523
1524 efx->type->dimension_resources(efx);
1525
1526 if (efx->n_channels > 1)
1527 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1528 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1529 efx->rx_indir_table[i] =
1530 ethtool_rxfh_indir_default(i, efx->rss_spread);
1531
1532 efx_set_channels(efx);
1533 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1534 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1535
1536 /* Initialise the interrupt moderation settings */
1537 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1538 true);
1539
1540 return 0;
1541
1542 fail:
1543 efx->type->remove(efx);
1544 return rc;
1545 }
1546
efx_remove_nic(struct efx_nic * efx)1547 static void efx_remove_nic(struct efx_nic *efx)
1548 {
1549 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1550
1551 efx_remove_interrupts(efx);
1552 efx->type->remove(efx);
1553 }
1554
1555 /**************************************************************************
1556 *
1557 * NIC startup/shutdown
1558 *
1559 *************************************************************************/
1560
efx_probe_all(struct efx_nic * efx)1561 static int efx_probe_all(struct efx_nic *efx)
1562 {
1563 int rc;
1564
1565 rc = efx_probe_nic(efx);
1566 if (rc) {
1567 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1568 goto fail1;
1569 }
1570
1571 rc = efx_probe_port(efx);
1572 if (rc) {
1573 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1574 goto fail2;
1575 }
1576
1577 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1578 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1579 rc = -EINVAL;
1580 goto fail3;
1581 }
1582 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1583
1584 rc = efx_probe_filters(efx);
1585 if (rc) {
1586 netif_err(efx, probe, efx->net_dev,
1587 "failed to create filter tables\n");
1588 goto fail3;
1589 }
1590
1591 rc = efx_probe_channels(efx);
1592 if (rc)
1593 goto fail4;
1594
1595 return 0;
1596
1597 fail4:
1598 efx_remove_filters(efx);
1599 fail3:
1600 efx_remove_port(efx);
1601 fail2:
1602 efx_remove_nic(efx);
1603 fail1:
1604 return rc;
1605 }
1606
1607 /* If the interface is supposed to be running but is not, start
1608 * the hardware and software data path, regular activity for the port
1609 * (MAC statistics, link polling, etc.) and schedule the port to be
1610 * reconfigured. Interrupts must already be enabled. This function
1611 * is safe to call multiple times, so long as the NIC is not disabled.
1612 * Requires the RTNL lock.
1613 */
efx_start_all(struct efx_nic * efx)1614 static void efx_start_all(struct efx_nic *efx)
1615 {
1616 EFX_ASSERT_RESET_SERIALISED(efx);
1617 BUG_ON(efx->state == STATE_DISABLED);
1618
1619 /* Check that it is appropriate to restart the interface. All
1620 * of these flags are safe to read under just the rtnl lock */
1621 if (efx->port_enabled || !netif_running(efx->net_dev))
1622 return;
1623
1624 efx_start_port(efx);
1625 efx_start_datapath(efx);
1626
1627 /* Start the hardware monitor if there is one */
1628 if (efx->type->monitor != NULL)
1629 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1630 efx_monitor_interval);
1631
1632 /* If link state detection is normally event-driven, we have
1633 * to poll now because we could have missed a change
1634 */
1635 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1636 mutex_lock(&efx->mac_lock);
1637 if (efx->phy_op->poll(efx))
1638 efx_link_status_changed(efx);
1639 mutex_unlock(&efx->mac_lock);
1640 }
1641
1642 efx->type->start_stats(efx);
1643 }
1644
1645 /* Flush all delayed work. Should only be called when no more delayed work
1646 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1647 * since we're holding the rtnl_lock at this point. */
efx_flush_all(struct efx_nic * efx)1648 static void efx_flush_all(struct efx_nic *efx)
1649 {
1650 /* Make sure the hardware monitor and event self-test are stopped */
1651 cancel_delayed_work_sync(&efx->monitor_work);
1652 efx_selftest_async_cancel(efx);
1653 /* Stop scheduled port reconfigurations */
1654 cancel_work_sync(&efx->mac_work);
1655 }
1656
1657 /* Quiesce the hardware and software data path, and regular activity
1658 * for the port without bringing the link down. Safe to call multiple
1659 * times with the NIC in almost any state, but interrupts should be
1660 * enabled. Requires the RTNL lock.
1661 */
efx_stop_all(struct efx_nic * efx)1662 static void efx_stop_all(struct efx_nic *efx)
1663 {
1664 EFX_ASSERT_RESET_SERIALISED(efx);
1665
1666 /* port_enabled can be read safely under the rtnl lock */
1667 if (!efx->port_enabled)
1668 return;
1669
1670 efx->type->stop_stats(efx);
1671 efx_stop_port(efx);
1672
1673 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1674 efx_flush_all(efx);
1675
1676 /* Stop the kernel transmit interface. This is only valid if
1677 * the device is stopped or detached; otherwise the watchdog
1678 * may fire immediately.
1679 */
1680 WARN_ON(netif_running(efx->net_dev) &&
1681 netif_device_present(efx->net_dev));
1682 netif_tx_disable(efx->net_dev);
1683
1684 efx_stop_datapath(efx);
1685 }
1686
efx_remove_all(struct efx_nic * efx)1687 static void efx_remove_all(struct efx_nic *efx)
1688 {
1689 efx_remove_channels(efx);
1690 efx_remove_filters(efx);
1691 efx_remove_port(efx);
1692 efx_remove_nic(efx);
1693 }
1694
1695 /**************************************************************************
1696 *
1697 * Interrupt moderation
1698 *
1699 **************************************************************************/
1700
irq_mod_ticks(unsigned int usecs,unsigned int quantum_ns)1701 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1702 {
1703 if (usecs == 0)
1704 return 0;
1705 if (usecs * 1000 < quantum_ns)
1706 return 1; /* never round down to 0 */
1707 return usecs * 1000 / quantum_ns;
1708 }
1709
1710 /* Set interrupt moderation parameters */
efx_init_irq_moderation(struct efx_nic * efx,unsigned int tx_usecs,unsigned int rx_usecs,bool rx_adaptive,bool rx_may_override_tx)1711 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1712 unsigned int rx_usecs, bool rx_adaptive,
1713 bool rx_may_override_tx)
1714 {
1715 struct efx_channel *channel;
1716 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1717 efx->timer_quantum_ns,
1718 1000);
1719 unsigned int tx_ticks;
1720 unsigned int rx_ticks;
1721
1722 EFX_ASSERT_RESET_SERIALISED(efx);
1723
1724 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1725 return -EINVAL;
1726
1727 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1728 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1729
1730 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1731 !rx_may_override_tx) {
1732 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1733 "RX and TX IRQ moderation must be equal\n");
1734 return -EINVAL;
1735 }
1736
1737 efx->irq_rx_adaptive = rx_adaptive;
1738 efx->irq_rx_moderation = rx_ticks;
1739 efx_for_each_channel(channel, efx) {
1740 if (efx_channel_has_rx_queue(channel))
1741 channel->irq_moderation = rx_ticks;
1742 else if (efx_channel_has_tx_queues(channel))
1743 channel->irq_moderation = tx_ticks;
1744 }
1745
1746 return 0;
1747 }
1748
efx_get_irq_moderation(struct efx_nic * efx,unsigned int * tx_usecs,unsigned int * rx_usecs,bool * rx_adaptive)1749 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1750 unsigned int *rx_usecs, bool *rx_adaptive)
1751 {
1752 /* We must round up when converting ticks to microseconds
1753 * because we round down when converting the other way.
1754 */
1755
1756 *rx_adaptive = efx->irq_rx_adaptive;
1757 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1758 efx->timer_quantum_ns,
1759 1000);
1760
1761 /* If channels are shared between RX and TX, so is IRQ
1762 * moderation. Otherwise, IRQ moderation is the same for all
1763 * TX channels and is not adaptive.
1764 */
1765 if (efx->tx_channel_offset == 0)
1766 *tx_usecs = *rx_usecs;
1767 else
1768 *tx_usecs = DIV_ROUND_UP(
1769 efx->channel[efx->tx_channel_offset]->irq_moderation *
1770 efx->timer_quantum_ns,
1771 1000);
1772 }
1773
1774 /**************************************************************************
1775 *
1776 * Hardware monitor
1777 *
1778 **************************************************************************/
1779
1780 /* Run periodically off the general workqueue */
efx_monitor(struct work_struct * data)1781 static void efx_monitor(struct work_struct *data)
1782 {
1783 struct efx_nic *efx = container_of(data, struct efx_nic,
1784 monitor_work.work);
1785
1786 netif_vdbg(efx, timer, efx->net_dev,
1787 "hardware monitor executing on CPU %d\n",
1788 raw_smp_processor_id());
1789 BUG_ON(efx->type->monitor == NULL);
1790
1791 /* If the mac_lock is already held then it is likely a port
1792 * reconfiguration is already in place, which will likely do
1793 * most of the work of monitor() anyway. */
1794 if (mutex_trylock(&efx->mac_lock)) {
1795 if (efx->port_enabled)
1796 efx->type->monitor(efx);
1797 mutex_unlock(&efx->mac_lock);
1798 }
1799
1800 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1801 efx_monitor_interval);
1802 }
1803
1804 /**************************************************************************
1805 *
1806 * ioctls
1807 *
1808 *************************************************************************/
1809
1810 /* Net device ioctl
1811 * Context: process, rtnl_lock() held.
1812 */
efx_ioctl(struct net_device * net_dev,struct ifreq * ifr,int cmd)1813 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1814 {
1815 struct efx_nic *efx = netdev_priv(net_dev);
1816 struct mii_ioctl_data *data = if_mii(ifr);
1817
1818 if (cmd == SIOCSHWTSTAMP)
1819 return efx_ptp_ioctl(efx, ifr, cmd);
1820
1821 /* Convert phy_id from older PRTAD/DEVAD format */
1822 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1823 (data->phy_id & 0xfc00) == 0x0400)
1824 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1825
1826 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1827 }
1828
1829 /**************************************************************************
1830 *
1831 * NAPI interface
1832 *
1833 **************************************************************************/
1834
efx_init_napi_channel(struct efx_channel * channel)1835 static void efx_init_napi_channel(struct efx_channel *channel)
1836 {
1837 struct efx_nic *efx = channel->efx;
1838
1839 channel->napi_dev = efx->net_dev;
1840 netif_napi_add(channel->napi_dev, &channel->napi_str,
1841 efx_poll, napi_weight);
1842 }
1843
efx_init_napi(struct efx_nic * efx)1844 static void efx_init_napi(struct efx_nic *efx)
1845 {
1846 struct efx_channel *channel;
1847
1848 efx_for_each_channel(channel, efx)
1849 efx_init_napi_channel(channel);
1850 }
1851
efx_fini_napi_channel(struct efx_channel * channel)1852 static void efx_fini_napi_channel(struct efx_channel *channel)
1853 {
1854 if (channel->napi_dev)
1855 netif_napi_del(&channel->napi_str);
1856 channel->napi_dev = NULL;
1857 }
1858
efx_fini_napi(struct efx_nic * efx)1859 static void efx_fini_napi(struct efx_nic *efx)
1860 {
1861 struct efx_channel *channel;
1862
1863 efx_for_each_channel(channel, efx)
1864 efx_fini_napi_channel(channel);
1865 }
1866
1867 /**************************************************************************
1868 *
1869 * Kernel netpoll interface
1870 *
1871 *************************************************************************/
1872
1873 #ifdef CONFIG_NET_POLL_CONTROLLER
1874
1875 /* Although in the common case interrupts will be disabled, this is not
1876 * guaranteed. However, all our work happens inside the NAPI callback,
1877 * so no locking is required.
1878 */
efx_netpoll(struct net_device * net_dev)1879 static void efx_netpoll(struct net_device *net_dev)
1880 {
1881 struct efx_nic *efx = netdev_priv(net_dev);
1882 struct efx_channel *channel;
1883
1884 efx_for_each_channel(channel, efx)
1885 efx_schedule_channel(channel);
1886 }
1887
1888 #endif
1889
1890 /**************************************************************************
1891 *
1892 * Kernel net device interface
1893 *
1894 *************************************************************************/
1895
1896 /* Context: process, rtnl_lock() held. */
efx_net_open(struct net_device * net_dev)1897 static int efx_net_open(struct net_device *net_dev)
1898 {
1899 struct efx_nic *efx = netdev_priv(net_dev);
1900 int rc;
1901
1902 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1903 raw_smp_processor_id());
1904
1905 rc = efx_check_disabled(efx);
1906 if (rc)
1907 return rc;
1908 if (efx->phy_mode & PHY_MODE_SPECIAL)
1909 return -EBUSY;
1910 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1911 return -EIO;
1912
1913 /* Notify the kernel of the link state polled during driver load,
1914 * before the monitor starts running */
1915 efx_link_status_changed(efx);
1916
1917 efx_start_all(efx);
1918 efx_selftest_async_start(efx);
1919 return 0;
1920 }
1921
1922 /* Context: process, rtnl_lock() held.
1923 * Note that the kernel will ignore our return code; this method
1924 * should really be a void.
1925 */
efx_net_stop(struct net_device * net_dev)1926 static int efx_net_stop(struct net_device *net_dev)
1927 {
1928 struct efx_nic *efx = netdev_priv(net_dev);
1929
1930 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1931 raw_smp_processor_id());
1932
1933 /* Stop the device and flush all the channels */
1934 efx_stop_all(efx);
1935
1936 return 0;
1937 }
1938
1939 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
efx_net_stats(struct net_device * net_dev,struct rtnl_link_stats64 * stats)1940 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1941 struct rtnl_link_stats64 *stats)
1942 {
1943 struct efx_nic *efx = netdev_priv(net_dev);
1944 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1945
1946 spin_lock_bh(&efx->stats_lock);
1947
1948 efx->type->update_stats(efx);
1949
1950 stats->rx_packets = mac_stats->rx_packets;
1951 stats->tx_packets = mac_stats->tx_packets;
1952 stats->rx_bytes = mac_stats->rx_bytes;
1953 stats->tx_bytes = mac_stats->tx_bytes;
1954 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1955 stats->multicast = mac_stats->rx_multicast;
1956 stats->collisions = mac_stats->tx_collision;
1957 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1958 mac_stats->rx_length_error);
1959 stats->rx_crc_errors = mac_stats->rx_bad;
1960 stats->rx_frame_errors = mac_stats->rx_align_error;
1961 stats->rx_fifo_errors = mac_stats->rx_overflow;
1962 stats->rx_missed_errors = mac_stats->rx_missed;
1963 stats->tx_window_errors = mac_stats->tx_late_collision;
1964
1965 stats->rx_errors = (stats->rx_length_errors +
1966 stats->rx_crc_errors +
1967 stats->rx_frame_errors +
1968 mac_stats->rx_symbol_error);
1969 stats->tx_errors = (stats->tx_window_errors +
1970 mac_stats->tx_bad);
1971
1972 spin_unlock_bh(&efx->stats_lock);
1973
1974 return stats;
1975 }
1976
1977 /* Context: netif_tx_lock held, BHs disabled. */
efx_watchdog(struct net_device * net_dev)1978 static void efx_watchdog(struct net_device *net_dev)
1979 {
1980 struct efx_nic *efx = netdev_priv(net_dev);
1981
1982 netif_err(efx, tx_err, efx->net_dev,
1983 "TX stuck with port_enabled=%d: resetting channels\n",
1984 efx->port_enabled);
1985
1986 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1987 }
1988
1989
1990 /* Context: process, rtnl_lock() held. */
efx_change_mtu(struct net_device * net_dev,int new_mtu)1991 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1992 {
1993 struct efx_nic *efx = netdev_priv(net_dev);
1994 int rc;
1995
1996 rc = efx_check_disabled(efx);
1997 if (rc)
1998 return rc;
1999 if (new_mtu > EFX_MAX_MTU)
2000 return -EINVAL;
2001
2002 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2003
2004 efx_device_detach_sync(efx);
2005 efx_stop_all(efx);
2006
2007 mutex_lock(&efx->mac_lock);
2008 net_dev->mtu = new_mtu;
2009 efx->type->reconfigure_mac(efx);
2010 mutex_unlock(&efx->mac_lock);
2011
2012 efx_start_all(efx);
2013 netif_device_attach(efx->net_dev);
2014 return 0;
2015 }
2016
efx_set_mac_address(struct net_device * net_dev,void * data)2017 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2018 {
2019 struct efx_nic *efx = netdev_priv(net_dev);
2020 struct sockaddr *addr = data;
2021 char *new_addr = addr->sa_data;
2022
2023 if (!is_valid_ether_addr(new_addr)) {
2024 netif_err(efx, drv, efx->net_dev,
2025 "invalid ethernet MAC address requested: %pM\n",
2026 new_addr);
2027 return -EADDRNOTAVAIL;
2028 }
2029
2030 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2031 efx_sriov_mac_address_changed(efx);
2032
2033 /* Reconfigure the MAC */
2034 mutex_lock(&efx->mac_lock);
2035 efx->type->reconfigure_mac(efx);
2036 mutex_unlock(&efx->mac_lock);
2037
2038 return 0;
2039 }
2040
2041 /* Context: netif_addr_lock held, BHs disabled. */
efx_set_rx_mode(struct net_device * net_dev)2042 static void efx_set_rx_mode(struct net_device *net_dev)
2043 {
2044 struct efx_nic *efx = netdev_priv(net_dev);
2045 struct netdev_hw_addr *ha;
2046 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
2047 u32 crc;
2048 int bit;
2049
2050 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
2051
2052 /* Build multicast hash table */
2053 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
2054 memset(mc_hash, 0xff, sizeof(*mc_hash));
2055 } else {
2056 memset(mc_hash, 0x00, sizeof(*mc_hash));
2057 netdev_for_each_mc_addr(ha, net_dev) {
2058 crc = ether_crc_le(ETH_ALEN, ha->addr);
2059 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
2060 __set_bit_le(bit, mc_hash);
2061 }
2062
2063 /* Broadcast packets go through the multicast hash filter.
2064 * ether_crc_le() of the broadcast address is 0xbe2612ff
2065 * so we always add bit 0xff to the mask.
2066 */
2067 __set_bit_le(0xff, mc_hash);
2068 }
2069
2070 if (efx->port_enabled)
2071 queue_work(efx->workqueue, &efx->mac_work);
2072 /* Otherwise efx_start_port() will do this */
2073 }
2074
efx_set_features(struct net_device * net_dev,netdev_features_t data)2075 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2076 {
2077 struct efx_nic *efx = netdev_priv(net_dev);
2078
2079 /* If disabling RX n-tuple filtering, clear existing filters */
2080 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2081 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2082
2083 return 0;
2084 }
2085
2086 static const struct net_device_ops efx_netdev_ops = {
2087 .ndo_open = efx_net_open,
2088 .ndo_stop = efx_net_stop,
2089 .ndo_get_stats64 = efx_net_stats,
2090 .ndo_tx_timeout = efx_watchdog,
2091 .ndo_start_xmit = efx_hard_start_xmit,
2092 .ndo_validate_addr = eth_validate_addr,
2093 .ndo_do_ioctl = efx_ioctl,
2094 .ndo_change_mtu = efx_change_mtu,
2095 .ndo_set_mac_address = efx_set_mac_address,
2096 .ndo_set_rx_mode = efx_set_rx_mode,
2097 .ndo_set_features = efx_set_features,
2098 #ifdef CONFIG_SFC_SRIOV
2099 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2100 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2101 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2102 .ndo_get_vf_config = efx_sriov_get_vf_config,
2103 #endif
2104 #ifdef CONFIG_NET_POLL_CONTROLLER
2105 .ndo_poll_controller = efx_netpoll,
2106 #endif
2107 .ndo_setup_tc = efx_setup_tc,
2108 #ifdef CONFIG_RFS_ACCEL
2109 .ndo_rx_flow_steer = efx_filter_rfs,
2110 #endif
2111 };
2112
efx_update_name(struct efx_nic * efx)2113 static void efx_update_name(struct efx_nic *efx)
2114 {
2115 strcpy(efx->name, efx->net_dev->name);
2116 efx_mtd_rename(efx);
2117 efx_set_channel_names(efx);
2118 }
2119
efx_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2120 static int efx_netdev_event(struct notifier_block *this,
2121 unsigned long event, void *ptr)
2122 {
2123 struct net_device *net_dev = ptr;
2124
2125 if (net_dev->netdev_ops == &efx_netdev_ops &&
2126 event == NETDEV_CHANGENAME)
2127 efx_update_name(netdev_priv(net_dev));
2128
2129 return NOTIFY_DONE;
2130 }
2131
2132 static struct notifier_block efx_netdev_notifier = {
2133 .notifier_call = efx_netdev_event,
2134 };
2135
2136 static ssize_t
show_phy_type(struct device * dev,struct device_attribute * attr,char * buf)2137 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2138 {
2139 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2140 return sprintf(buf, "%d\n", efx->phy_type);
2141 }
2142 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2143
efx_register_netdev(struct efx_nic * efx)2144 static int efx_register_netdev(struct efx_nic *efx)
2145 {
2146 struct net_device *net_dev = efx->net_dev;
2147 struct efx_channel *channel;
2148 int rc;
2149
2150 net_dev->watchdog_timeo = 5 * HZ;
2151 net_dev->irq = efx->pci_dev->irq;
2152 net_dev->netdev_ops = &efx_netdev_ops;
2153 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2154 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2155
2156 rtnl_lock();
2157
2158 /* Enable resets to be scheduled and check whether any were
2159 * already requested. If so, the NIC is probably hosed so we
2160 * abort.
2161 */
2162 efx->state = STATE_READY;
2163 smp_mb(); /* ensure we change state before checking reset_pending */
2164 if (efx->reset_pending) {
2165 netif_err(efx, probe, efx->net_dev,
2166 "aborting probe due to scheduled reset\n");
2167 rc = -EIO;
2168 goto fail_locked;
2169 }
2170
2171 rc = dev_alloc_name(net_dev, net_dev->name);
2172 if (rc < 0)
2173 goto fail_locked;
2174 efx_update_name(efx);
2175
2176 /* Always start with carrier off; PHY events will detect the link */
2177 netif_carrier_off(net_dev);
2178
2179 rc = register_netdevice(net_dev);
2180 if (rc)
2181 goto fail_locked;
2182
2183 efx_for_each_channel(channel, efx) {
2184 struct efx_tx_queue *tx_queue;
2185 efx_for_each_channel_tx_queue(tx_queue, channel)
2186 efx_init_tx_queue_core_txq(tx_queue);
2187 }
2188
2189 rtnl_unlock();
2190
2191 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2192 if (rc) {
2193 netif_err(efx, drv, efx->net_dev,
2194 "failed to init net dev attributes\n");
2195 goto fail_registered;
2196 }
2197
2198 return 0;
2199
2200 fail_registered:
2201 rtnl_lock();
2202 unregister_netdevice(net_dev);
2203 fail_locked:
2204 efx->state = STATE_UNINIT;
2205 rtnl_unlock();
2206 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2207 return rc;
2208 }
2209
efx_unregister_netdev(struct efx_nic * efx)2210 static void efx_unregister_netdev(struct efx_nic *efx)
2211 {
2212 struct efx_channel *channel;
2213 struct efx_tx_queue *tx_queue;
2214
2215 if (!efx->net_dev)
2216 return;
2217
2218 BUG_ON(netdev_priv(efx->net_dev) != efx);
2219
2220 /* Free up any skbs still remaining. This has to happen before
2221 * we try to unregister the netdev as running their destructors
2222 * may be needed to get the device ref. count to 0. */
2223 efx_for_each_channel(channel, efx) {
2224 efx_for_each_channel_tx_queue(tx_queue, channel)
2225 efx_release_tx_buffers(tx_queue);
2226 }
2227
2228 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2229 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2230
2231 rtnl_lock();
2232 unregister_netdevice(efx->net_dev);
2233 efx->state = STATE_UNINIT;
2234 rtnl_unlock();
2235 }
2236
2237 /**************************************************************************
2238 *
2239 * Device reset and suspend
2240 *
2241 **************************************************************************/
2242
2243 /* Tears down the entire software state and most of the hardware state
2244 * before reset. */
efx_reset_down(struct efx_nic * efx,enum reset_type method)2245 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2246 {
2247 EFX_ASSERT_RESET_SERIALISED(efx);
2248
2249 efx_stop_all(efx);
2250 efx_stop_interrupts(efx, false);
2251
2252 mutex_lock(&efx->mac_lock);
2253 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2254 efx->phy_op->fini(efx);
2255 efx->type->fini(efx);
2256 }
2257
2258 /* This function will always ensure that the locks acquired in
2259 * efx_reset_down() are released. A failure return code indicates
2260 * that we were unable to reinitialise the hardware, and the
2261 * driver should be disabled. If ok is false, then the rx and tx
2262 * engines are not restarted, pending a RESET_DISABLE. */
efx_reset_up(struct efx_nic * efx,enum reset_type method,bool ok)2263 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2264 {
2265 int rc;
2266
2267 EFX_ASSERT_RESET_SERIALISED(efx);
2268
2269 rc = efx->type->init(efx);
2270 if (rc) {
2271 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2272 goto fail;
2273 }
2274
2275 if (!ok)
2276 goto fail;
2277
2278 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2279 rc = efx->phy_op->init(efx);
2280 if (rc)
2281 goto fail;
2282 if (efx->phy_op->reconfigure(efx))
2283 netif_err(efx, drv, efx->net_dev,
2284 "could not restore PHY settings\n");
2285 }
2286
2287 efx->type->reconfigure_mac(efx);
2288
2289 efx_start_interrupts(efx, false);
2290 efx_restore_filters(efx);
2291 efx_sriov_reset(efx);
2292
2293 mutex_unlock(&efx->mac_lock);
2294
2295 efx_start_all(efx);
2296
2297 return 0;
2298
2299 fail:
2300 efx->port_initialized = false;
2301
2302 mutex_unlock(&efx->mac_lock);
2303
2304 return rc;
2305 }
2306
2307 /* Reset the NIC using the specified method. Note that the reset may
2308 * fail, in which case the card will be left in an unusable state.
2309 *
2310 * Caller must hold the rtnl_lock.
2311 */
efx_reset(struct efx_nic * efx,enum reset_type method)2312 int efx_reset(struct efx_nic *efx, enum reset_type method)
2313 {
2314 int rc, rc2;
2315 bool disabled;
2316
2317 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2318 RESET_TYPE(method));
2319
2320 efx_device_detach_sync(efx);
2321 efx_reset_down(efx, method);
2322
2323 rc = efx->type->reset(efx, method);
2324 if (rc) {
2325 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2326 goto out;
2327 }
2328
2329 /* Clear flags for the scopes we covered. We assume the NIC and
2330 * driver are now quiescent so that there is no race here.
2331 */
2332 efx->reset_pending &= -(1 << (method + 1));
2333
2334 /* Reinitialise bus-mastering, which may have been turned off before
2335 * the reset was scheduled. This is still appropriate, even in the
2336 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2337 * can respond to requests. */
2338 pci_set_master(efx->pci_dev);
2339
2340 out:
2341 /* Leave device stopped if necessary */
2342 disabled = rc ||
2343 method == RESET_TYPE_DISABLE ||
2344 method == RESET_TYPE_RECOVER_OR_DISABLE;
2345 rc2 = efx_reset_up(efx, method, !disabled);
2346 if (rc2) {
2347 disabled = true;
2348 if (!rc)
2349 rc = rc2;
2350 }
2351
2352 if (disabled) {
2353 dev_close(efx->net_dev);
2354 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2355 efx->state = STATE_DISABLED;
2356 } else {
2357 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2358 netif_device_attach(efx->net_dev);
2359 }
2360 return rc;
2361 }
2362
2363 /* Try recovery mechanisms.
2364 * For now only EEH is supported.
2365 * Returns 0 if the recovery mechanisms are unsuccessful.
2366 * Returns a non-zero value otherwise.
2367 */
efx_try_recovery(struct efx_nic * efx)2368 static int efx_try_recovery(struct efx_nic *efx)
2369 {
2370 #ifdef CONFIG_EEH
2371 /* A PCI error can occur and not be seen by EEH because nothing
2372 * happens on the PCI bus. In this case the driver may fail and
2373 * schedule a 'recover or reset', leading to this recovery handler.
2374 * Manually call the eeh failure check function.
2375 */
2376 struct eeh_dev *eehdev =
2377 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2378
2379 if (eeh_dev_check_failure(eehdev)) {
2380 /* The EEH mechanisms will handle the error and reset the
2381 * device if necessary.
2382 */
2383 return 1;
2384 }
2385 #endif
2386 return 0;
2387 }
2388
2389 /* The worker thread exists so that code that cannot sleep can
2390 * schedule a reset for later.
2391 */
efx_reset_work(struct work_struct * data)2392 static void efx_reset_work(struct work_struct *data)
2393 {
2394 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2395 unsigned long pending;
2396 enum reset_type method;
2397
2398 pending = ACCESS_ONCE(efx->reset_pending);
2399 method = fls(pending) - 1;
2400
2401 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2402 method == RESET_TYPE_RECOVER_OR_ALL) &&
2403 efx_try_recovery(efx))
2404 return;
2405
2406 if (!pending)
2407 return;
2408
2409 rtnl_lock();
2410
2411 /* We checked the state in efx_schedule_reset() but it may
2412 * have changed by now. Now that we have the RTNL lock,
2413 * it cannot change again.
2414 */
2415 if (efx->state == STATE_READY)
2416 (void)efx_reset(efx, method);
2417
2418 rtnl_unlock();
2419 }
2420
efx_schedule_reset(struct efx_nic * efx,enum reset_type type)2421 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2422 {
2423 enum reset_type method;
2424
2425 if (efx->state == STATE_RECOVERY) {
2426 netif_dbg(efx, drv, efx->net_dev,
2427 "recovering: skip scheduling %s reset\n",
2428 RESET_TYPE(type));
2429 return;
2430 }
2431
2432 switch (type) {
2433 case RESET_TYPE_INVISIBLE:
2434 case RESET_TYPE_ALL:
2435 case RESET_TYPE_RECOVER_OR_ALL:
2436 case RESET_TYPE_WORLD:
2437 case RESET_TYPE_DISABLE:
2438 case RESET_TYPE_RECOVER_OR_DISABLE:
2439 method = type;
2440 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2441 RESET_TYPE(method));
2442 break;
2443 default:
2444 method = efx->type->map_reset_reason(type);
2445 netif_dbg(efx, drv, efx->net_dev,
2446 "scheduling %s reset for %s\n",
2447 RESET_TYPE(method), RESET_TYPE(type));
2448 break;
2449 }
2450
2451 set_bit(method, &efx->reset_pending);
2452 smp_mb(); /* ensure we change reset_pending before checking state */
2453
2454 /* If we're not READY then just leave the flags set as the cue
2455 * to abort probing or reschedule the reset later.
2456 */
2457 if (ACCESS_ONCE(efx->state) != STATE_READY)
2458 return;
2459
2460 /* efx_process_channel() will no longer read events once a
2461 * reset is scheduled. So switch back to poll'd MCDI completions. */
2462 efx_mcdi_mode_poll(efx);
2463
2464 queue_work(reset_workqueue, &efx->reset_work);
2465 }
2466
2467 /**************************************************************************
2468 *
2469 * List of NICs we support
2470 *
2471 **************************************************************************/
2472
2473 /* PCI device ID table */
2474 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2475 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2476 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2477 .driver_data = (unsigned long) &falcon_a1_nic_type},
2478 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2479 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2480 .driver_data = (unsigned long) &falcon_b0_nic_type},
2481 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2482 .driver_data = (unsigned long) &siena_a0_nic_type},
2483 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2484 .driver_data = (unsigned long) &siena_a0_nic_type},
2485 {0} /* end of list */
2486 };
2487
2488 /**************************************************************************
2489 *
2490 * Dummy PHY/MAC operations
2491 *
2492 * Can be used for some unimplemented operations
2493 * Needed so all function pointers are valid and do not have to be tested
2494 * before use
2495 *
2496 **************************************************************************/
efx_port_dummy_op_int(struct efx_nic * efx)2497 int efx_port_dummy_op_int(struct efx_nic *efx)
2498 {
2499 return 0;
2500 }
efx_port_dummy_op_void(struct efx_nic * efx)2501 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2502
efx_port_dummy_op_poll(struct efx_nic * efx)2503 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2504 {
2505 return false;
2506 }
2507
2508 static const struct efx_phy_operations efx_dummy_phy_operations = {
2509 .init = efx_port_dummy_op_int,
2510 .reconfigure = efx_port_dummy_op_int,
2511 .poll = efx_port_dummy_op_poll,
2512 .fini = efx_port_dummy_op_void,
2513 };
2514
2515 /**************************************************************************
2516 *
2517 * Data housekeeping
2518 *
2519 **************************************************************************/
2520
2521 /* This zeroes out and then fills in the invariants in a struct
2522 * efx_nic (including all sub-structures).
2523 */
efx_init_struct(struct efx_nic * efx,struct pci_dev * pci_dev,struct net_device * net_dev)2524 static int efx_init_struct(struct efx_nic *efx,
2525 struct pci_dev *pci_dev, struct net_device *net_dev)
2526 {
2527 int i;
2528
2529 /* Initialise common structures */
2530 spin_lock_init(&efx->biu_lock);
2531 #ifdef CONFIG_SFC_MTD
2532 INIT_LIST_HEAD(&efx->mtd_list);
2533 #endif
2534 INIT_WORK(&efx->reset_work, efx_reset_work);
2535 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2536 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2537 efx->pci_dev = pci_dev;
2538 efx->msg_enable = debug;
2539 efx->state = STATE_UNINIT;
2540 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2541
2542 efx->net_dev = net_dev;
2543 spin_lock_init(&efx->stats_lock);
2544 mutex_init(&efx->mac_lock);
2545 efx->phy_op = &efx_dummy_phy_operations;
2546 efx->mdio.dev = net_dev;
2547 INIT_WORK(&efx->mac_work, efx_mac_work);
2548 init_waitqueue_head(&efx->flush_wq);
2549
2550 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2551 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2552 if (!efx->channel[i])
2553 goto fail;
2554 }
2555
2556 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2557
2558 /* Higher numbered interrupt modes are less capable! */
2559 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2560 interrupt_mode);
2561
2562 /* Would be good to use the net_dev name, but we're too early */
2563 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2564 pci_name(pci_dev));
2565 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2566 if (!efx->workqueue)
2567 goto fail;
2568
2569 return 0;
2570
2571 fail:
2572 efx_fini_struct(efx);
2573 return -ENOMEM;
2574 }
2575
efx_fini_struct(struct efx_nic * efx)2576 static void efx_fini_struct(struct efx_nic *efx)
2577 {
2578 int i;
2579
2580 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2581 kfree(efx->channel[i]);
2582
2583 if (efx->workqueue) {
2584 destroy_workqueue(efx->workqueue);
2585 efx->workqueue = NULL;
2586 }
2587 }
2588
2589 /**************************************************************************
2590 *
2591 * PCI interface
2592 *
2593 **************************************************************************/
2594
2595 /* Main body of final NIC shutdown code
2596 * This is called only at module unload (or hotplug removal).
2597 */
efx_pci_remove_main(struct efx_nic * efx)2598 static void efx_pci_remove_main(struct efx_nic *efx)
2599 {
2600 /* Flush reset_work. It can no longer be scheduled since we
2601 * are not READY.
2602 */
2603 BUG_ON(efx->state == STATE_READY);
2604 cancel_work_sync(&efx->reset_work);
2605
2606 #ifdef CONFIG_RFS_ACCEL
2607 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2608 efx->net_dev->rx_cpu_rmap = NULL;
2609 #endif
2610 efx_stop_interrupts(efx, false);
2611 efx_nic_fini_interrupt(efx);
2612 efx_fini_port(efx);
2613 efx->type->fini(efx);
2614 efx_fini_napi(efx);
2615 efx_remove_all(efx);
2616 }
2617
2618 /* Final NIC shutdown
2619 * This is called only at module unload (or hotplug removal).
2620 */
efx_pci_remove(struct pci_dev * pci_dev)2621 static void efx_pci_remove(struct pci_dev *pci_dev)
2622 {
2623 struct efx_nic *efx;
2624
2625 efx = pci_get_drvdata(pci_dev);
2626 if (!efx)
2627 return;
2628
2629 /* Mark the NIC as fini, then stop the interface */
2630 rtnl_lock();
2631 dev_close(efx->net_dev);
2632 efx_stop_interrupts(efx, false);
2633 rtnl_unlock();
2634
2635 efx_sriov_fini(efx);
2636 efx_unregister_netdev(efx);
2637
2638 efx_mtd_remove(efx);
2639
2640 efx_pci_remove_main(efx);
2641
2642 efx_fini_io(efx);
2643 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2644
2645 efx_fini_struct(efx);
2646 pci_set_drvdata(pci_dev, NULL);
2647 free_netdev(efx->net_dev);
2648
2649 pci_disable_pcie_error_reporting(pci_dev);
2650 };
2651
2652 /* NIC VPD information
2653 * Called during probe to display the part number of the
2654 * installed NIC. VPD is potentially very large but this should
2655 * always appear within the first 512 bytes.
2656 */
2657 #define SFC_VPD_LEN 512
efx_print_product_vpd(struct efx_nic * efx)2658 static void efx_print_product_vpd(struct efx_nic *efx)
2659 {
2660 struct pci_dev *dev = efx->pci_dev;
2661 char vpd_data[SFC_VPD_LEN];
2662 ssize_t vpd_size;
2663 int i, j;
2664
2665 /* Get the vpd data from the device */
2666 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2667 if (vpd_size <= 0) {
2668 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2669 return;
2670 }
2671
2672 /* Get the Read only section */
2673 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2674 if (i < 0) {
2675 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2676 return;
2677 }
2678
2679 j = pci_vpd_lrdt_size(&vpd_data[i]);
2680 i += PCI_VPD_LRDT_TAG_SIZE;
2681 if (i + j > vpd_size)
2682 j = vpd_size - i;
2683
2684 /* Get the Part number */
2685 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2686 if (i < 0) {
2687 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2688 return;
2689 }
2690
2691 j = pci_vpd_info_field_size(&vpd_data[i]);
2692 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2693 if (i + j > vpd_size) {
2694 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2695 return;
2696 }
2697
2698 netif_info(efx, drv, efx->net_dev,
2699 "Part Number : %.*s\n", j, &vpd_data[i]);
2700 }
2701
2702
2703 /* Main body of NIC initialisation
2704 * This is called at module load (or hotplug insertion, theoretically).
2705 */
efx_pci_probe_main(struct efx_nic * efx)2706 static int efx_pci_probe_main(struct efx_nic *efx)
2707 {
2708 int rc;
2709
2710 /* Do start-of-day initialisation */
2711 rc = efx_probe_all(efx);
2712 if (rc)
2713 goto fail1;
2714
2715 efx_init_napi(efx);
2716
2717 rc = efx->type->init(efx);
2718 if (rc) {
2719 netif_err(efx, probe, efx->net_dev,
2720 "failed to initialise NIC\n");
2721 goto fail3;
2722 }
2723
2724 rc = efx_init_port(efx);
2725 if (rc) {
2726 netif_err(efx, probe, efx->net_dev,
2727 "failed to initialise port\n");
2728 goto fail4;
2729 }
2730
2731 rc = efx_nic_init_interrupt(efx);
2732 if (rc)
2733 goto fail5;
2734 efx_start_interrupts(efx, false);
2735
2736 return 0;
2737
2738 fail5:
2739 efx_fini_port(efx);
2740 fail4:
2741 efx->type->fini(efx);
2742 fail3:
2743 efx_fini_napi(efx);
2744 efx_remove_all(efx);
2745 fail1:
2746 return rc;
2747 }
2748
2749 /* NIC initialisation
2750 *
2751 * This is called at module load (or hotplug insertion,
2752 * theoretically). It sets up PCI mappings, resets the NIC,
2753 * sets up and registers the network devices with the kernel and hooks
2754 * the interrupt service routine. It does not prepare the device for
2755 * transmission; this is left to the first time one of the network
2756 * interfaces is brought up (i.e. efx_net_open).
2757 */
efx_pci_probe(struct pci_dev * pci_dev,const struct pci_device_id * entry)2758 static int efx_pci_probe(struct pci_dev *pci_dev,
2759 const struct pci_device_id *entry)
2760 {
2761 struct net_device *net_dev;
2762 struct efx_nic *efx;
2763 int rc;
2764
2765 /* Allocate and initialise a struct net_device and struct efx_nic */
2766 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2767 EFX_MAX_RX_QUEUES);
2768 if (!net_dev)
2769 return -ENOMEM;
2770 efx = netdev_priv(net_dev);
2771 efx->type = (const struct efx_nic_type *) entry->driver_data;
2772 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2773 NETIF_F_HIGHDMA | NETIF_F_TSO |
2774 NETIF_F_RXCSUM);
2775 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2776 net_dev->features |= NETIF_F_TSO6;
2777 /* Mask for features that also apply to VLAN devices */
2778 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2779 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2780 NETIF_F_RXCSUM);
2781 /* All offloads can be toggled */
2782 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2783 pci_set_drvdata(pci_dev, efx);
2784 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2785 rc = efx_init_struct(efx, pci_dev, net_dev);
2786 if (rc)
2787 goto fail1;
2788
2789 netif_info(efx, probe, efx->net_dev,
2790 "Solarflare NIC detected\n");
2791
2792 efx_print_product_vpd(efx);
2793
2794 /* Set up basic I/O (BAR mappings etc) */
2795 rc = efx_init_io(efx);
2796 if (rc)
2797 goto fail2;
2798
2799 rc = efx_pci_probe_main(efx);
2800 if (rc)
2801 goto fail3;
2802
2803 rc = efx_register_netdev(efx);
2804 if (rc)
2805 goto fail4;
2806
2807 rc = efx_sriov_init(efx);
2808 if (rc)
2809 netif_err(efx, probe, efx->net_dev,
2810 "SR-IOV can't be enabled rc %d\n", rc);
2811
2812 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2813
2814 /* Try to create MTDs, but allow this to fail */
2815 rtnl_lock();
2816 rc = efx_mtd_probe(efx);
2817 rtnl_unlock();
2818 if (rc)
2819 netif_warn(efx, probe, efx->net_dev,
2820 "failed to create MTDs (%d)\n", rc);
2821
2822 rc = pci_enable_pcie_error_reporting(pci_dev);
2823 if (rc && rc != -EINVAL)
2824 netif_warn(efx, probe, efx->net_dev,
2825 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2826
2827 return 0;
2828
2829 fail4:
2830 efx_pci_remove_main(efx);
2831 fail3:
2832 efx_fini_io(efx);
2833 fail2:
2834 efx_fini_struct(efx);
2835 fail1:
2836 pci_set_drvdata(pci_dev, NULL);
2837 WARN_ON(rc > 0);
2838 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2839 free_netdev(net_dev);
2840 return rc;
2841 }
2842
efx_pm_freeze(struct device * dev)2843 static int efx_pm_freeze(struct device *dev)
2844 {
2845 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2846
2847 rtnl_lock();
2848
2849 if (efx->state != STATE_DISABLED) {
2850 efx->state = STATE_UNINIT;
2851
2852 efx_device_detach_sync(efx);
2853
2854 efx_stop_all(efx);
2855 efx_stop_interrupts(efx, false);
2856 }
2857
2858 rtnl_unlock();
2859
2860 return 0;
2861 }
2862
efx_pm_thaw(struct device * dev)2863 static int efx_pm_thaw(struct device *dev)
2864 {
2865 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2866
2867 rtnl_lock();
2868
2869 if (efx->state != STATE_DISABLED) {
2870 efx_start_interrupts(efx, false);
2871
2872 mutex_lock(&efx->mac_lock);
2873 efx->phy_op->reconfigure(efx);
2874 mutex_unlock(&efx->mac_lock);
2875
2876 efx_start_all(efx);
2877
2878 netif_device_attach(efx->net_dev);
2879
2880 efx->state = STATE_READY;
2881
2882 efx->type->resume_wol(efx);
2883 }
2884
2885 rtnl_unlock();
2886
2887 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2888 queue_work(reset_workqueue, &efx->reset_work);
2889
2890 return 0;
2891 }
2892
efx_pm_poweroff(struct device * dev)2893 static int efx_pm_poweroff(struct device *dev)
2894 {
2895 struct pci_dev *pci_dev = to_pci_dev(dev);
2896 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2897
2898 efx->type->fini(efx);
2899
2900 efx->reset_pending = 0;
2901
2902 pci_save_state(pci_dev);
2903 return pci_set_power_state(pci_dev, PCI_D3hot);
2904 }
2905
2906 /* Used for both resume and restore */
efx_pm_resume(struct device * dev)2907 static int efx_pm_resume(struct device *dev)
2908 {
2909 struct pci_dev *pci_dev = to_pci_dev(dev);
2910 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2911 int rc;
2912
2913 rc = pci_set_power_state(pci_dev, PCI_D0);
2914 if (rc)
2915 return rc;
2916 pci_restore_state(pci_dev);
2917 rc = pci_enable_device(pci_dev);
2918 if (rc)
2919 return rc;
2920 pci_set_master(efx->pci_dev);
2921 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2922 if (rc)
2923 return rc;
2924 rc = efx->type->init(efx);
2925 if (rc)
2926 return rc;
2927 efx_pm_thaw(dev);
2928 return 0;
2929 }
2930
efx_pm_suspend(struct device * dev)2931 static int efx_pm_suspend(struct device *dev)
2932 {
2933 int rc;
2934
2935 efx_pm_freeze(dev);
2936 rc = efx_pm_poweroff(dev);
2937 if (rc)
2938 efx_pm_resume(dev);
2939 return rc;
2940 }
2941
2942 static const struct dev_pm_ops efx_pm_ops = {
2943 .suspend = efx_pm_suspend,
2944 .resume = efx_pm_resume,
2945 .freeze = efx_pm_freeze,
2946 .thaw = efx_pm_thaw,
2947 .poweroff = efx_pm_poweroff,
2948 .restore = efx_pm_resume,
2949 };
2950
2951 /* A PCI error affecting this device was detected.
2952 * At this point MMIO and DMA may be disabled.
2953 * Stop the software path and request a slot reset.
2954 */
efx_io_error_detected(struct pci_dev * pdev,enum pci_channel_state state)2955 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2956 enum pci_channel_state state)
2957 {
2958 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2959 struct efx_nic *efx = pci_get_drvdata(pdev);
2960
2961 if (state == pci_channel_io_perm_failure)
2962 return PCI_ERS_RESULT_DISCONNECT;
2963
2964 rtnl_lock();
2965
2966 if (efx->state != STATE_DISABLED) {
2967 efx->state = STATE_RECOVERY;
2968 efx->reset_pending = 0;
2969
2970 efx_device_detach_sync(efx);
2971
2972 efx_stop_all(efx);
2973 efx_stop_interrupts(efx, false);
2974
2975 status = PCI_ERS_RESULT_NEED_RESET;
2976 } else {
2977 /* If the interface is disabled we don't want to do anything
2978 * with it.
2979 */
2980 status = PCI_ERS_RESULT_RECOVERED;
2981 }
2982
2983 rtnl_unlock();
2984
2985 pci_disable_device(pdev);
2986
2987 return status;
2988 }
2989
2990 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
efx_io_slot_reset(struct pci_dev * pdev)2991 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
2992 {
2993 struct efx_nic *efx = pci_get_drvdata(pdev);
2994 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2995 int rc;
2996
2997 if (pci_enable_device(pdev)) {
2998 netif_err(efx, hw, efx->net_dev,
2999 "Cannot re-enable PCI device after reset.\n");
3000 status = PCI_ERS_RESULT_DISCONNECT;
3001 }
3002
3003 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3004 if (rc) {
3005 netif_err(efx, hw, efx->net_dev,
3006 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3007 /* Non-fatal error. Continue. */
3008 }
3009
3010 return status;
3011 }
3012
3013 /* Perform the actual reset and resume I/O operations. */
efx_io_resume(struct pci_dev * pdev)3014 static void efx_io_resume(struct pci_dev *pdev)
3015 {
3016 struct efx_nic *efx = pci_get_drvdata(pdev);
3017 int rc;
3018
3019 rtnl_lock();
3020
3021 if (efx->state == STATE_DISABLED)
3022 goto out;
3023
3024 rc = efx_reset(efx, RESET_TYPE_ALL);
3025 if (rc) {
3026 netif_err(efx, hw, efx->net_dev,
3027 "efx_reset failed after PCI error (%d)\n", rc);
3028 } else {
3029 efx->state = STATE_READY;
3030 netif_dbg(efx, hw, efx->net_dev,
3031 "Done resetting and resuming IO after PCI error.\n");
3032 }
3033
3034 out:
3035 rtnl_unlock();
3036 }
3037
3038 /* For simplicity and reliability, we always require a slot reset and try to
3039 * reset the hardware when a pci error affecting the device is detected.
3040 * We leave both the link_reset and mmio_enabled callback unimplemented:
3041 * with our request for slot reset the mmio_enabled callback will never be
3042 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3043 */
3044 static struct pci_error_handlers efx_err_handlers = {
3045 .error_detected = efx_io_error_detected,
3046 .slot_reset = efx_io_slot_reset,
3047 .resume = efx_io_resume,
3048 };
3049
3050 static struct pci_driver efx_pci_driver = {
3051 .name = KBUILD_MODNAME,
3052 .id_table = efx_pci_table,
3053 .probe = efx_pci_probe,
3054 .remove = efx_pci_remove,
3055 .driver.pm = &efx_pm_ops,
3056 .err_handler = &efx_err_handlers,
3057 };
3058
3059 /**************************************************************************
3060 *
3061 * Kernel module interface
3062 *
3063 *************************************************************************/
3064
3065 module_param(interrupt_mode, uint, 0444);
3066 MODULE_PARM_DESC(interrupt_mode,
3067 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3068
efx_init_module(void)3069 static int __init efx_init_module(void)
3070 {
3071 int rc;
3072
3073 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3074
3075 rc = register_netdevice_notifier(&efx_netdev_notifier);
3076 if (rc)
3077 goto err_notifier;
3078
3079 rc = efx_init_sriov();
3080 if (rc)
3081 goto err_sriov;
3082
3083 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3084 if (!reset_workqueue) {
3085 rc = -ENOMEM;
3086 goto err_reset;
3087 }
3088
3089 rc = pci_register_driver(&efx_pci_driver);
3090 if (rc < 0)
3091 goto err_pci;
3092
3093 return 0;
3094
3095 err_pci:
3096 destroy_workqueue(reset_workqueue);
3097 err_reset:
3098 efx_fini_sriov();
3099 err_sriov:
3100 unregister_netdevice_notifier(&efx_netdev_notifier);
3101 err_notifier:
3102 return rc;
3103 }
3104
efx_exit_module(void)3105 static void __exit efx_exit_module(void)
3106 {
3107 printk(KERN_INFO "Solarflare NET driver unloading\n");
3108
3109 pci_unregister_driver(&efx_pci_driver);
3110 destroy_workqueue(reset_workqueue);
3111 efx_fini_sriov();
3112 unregister_netdevice_notifier(&efx_netdev_notifier);
3113
3114 }
3115
3116 module_init(efx_init_module);
3117 module_exit(efx_exit_module);
3118
3119 MODULE_AUTHOR("Solarflare Communications and "
3120 "Michael Brown <mbrown@fensystems.co.uk>");
3121 MODULE_DESCRIPTION("Solarflare Communications network driver");
3122 MODULE_LICENSE("GPL");
3123 MODULE_DEVICE_TABLE(pci, efx_pci_table);
3124