1 /*
2 * Copyright (C) 2010 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27 #define NV04_PFB_BOOT_0 0x00100000
28 # define NV04_PFB_BOOT_0_RAM_AMOUNT 0x00000003
29 # define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000
30 # define NV04_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001
31 # define NV04_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002
32 # define NV04_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003
33 # define NV04_PFB_BOOT_0_RAM_WIDTH_128 0x00000004
34 # define NV04_PFB_BOOT_0_RAM_TYPE 0x00000028
35 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT 0x00000000
36 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT 0x00000008
37 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT_4BANK 0x00000010
38 # define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_16MBIT 0x00000018
39 # define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBIT 0x00000020
40 # define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBITX16 0x00000028
41 # define NV04_PFB_BOOT_0_UMA_ENABLE 0x00000100
42 # define NV04_PFB_BOOT_0_UMA_SIZE 0x0000f000
43 #define NV04_PFB_DEBUG_0 0x00100080
44 # define NV04_PFB_DEBUG_0_PAGE_MODE 0x00000001
45 # define NV04_PFB_DEBUG_0_REFRESH_OFF 0x00000010
46 # define NV04_PFB_DEBUG_0_REFRESH_COUNTX64 0x00003f00
47 # define NV04_PFB_DEBUG_0_REFRESH_SLOW_CLK 0x00004000
48 # define NV04_PFB_DEBUG_0_SAFE_MODE 0x00008000
49 # define NV04_PFB_DEBUG_0_ALOM_ENABLE 0x00010000
50 # define NV04_PFB_DEBUG_0_CASOE 0x00100000
51 # define NV04_PFB_DEBUG_0_CKE_INVERT 0x10000000
52 # define NV04_PFB_DEBUG_0_REFINC 0x20000000
53 # define NV04_PFB_DEBUG_0_SAVE_POWER_OFF 0x40000000
54 #define NV04_PFB_CFG0 0x00100200
55 # define NV04_PFB_CFG0_SCRAMBLE 0x20000000
56 #define NV04_PFB_CFG1 0x00100204
57 #define NV04_PFB_SCRAMBLE(i) (0x00100400 + 4 * (i))
58
59 #define NV10_PFB_REFCTRL 0x00100210
60 # define NV10_PFB_REFCTRL_VALID_1 (1 << 31)
61
62 static inline struct io_mapping *
fbmem_init(struct pci_dev * pdev)63 fbmem_init(struct pci_dev *pdev)
64 {
65 return io_mapping_create_wc(pci_resource_start(pdev, 1),
66 pci_resource_len(pdev, 1));
67 }
68
69 static inline void
fbmem_fini(struct io_mapping * fb)70 fbmem_fini(struct io_mapping *fb)
71 {
72 io_mapping_free(fb);
73 }
74
75 static inline u32
fbmem_peek(struct io_mapping * fb,u32 off)76 fbmem_peek(struct io_mapping *fb, u32 off)
77 {
78 u8 __iomem *p = io_mapping_map_atomic_wc(fb, off & PAGE_MASK);
79 u32 val = ioread32(p + (off & ~PAGE_MASK));
80 io_mapping_unmap_atomic(p);
81 return val;
82 }
83
84 static inline void
fbmem_poke(struct io_mapping * fb,u32 off,u32 val)85 fbmem_poke(struct io_mapping *fb, u32 off, u32 val)
86 {
87 u8 __iomem *p = io_mapping_map_atomic_wc(fb, off & PAGE_MASK);
88 iowrite32(val, p + (off & ~PAGE_MASK));
89 wmb();
90 io_mapping_unmap_atomic(p);
91 }
92
93 static inline bool
fbmem_readback(struct io_mapping * fb,u32 off,u32 val)94 fbmem_readback(struct io_mapping *fb, u32 off, u32 val)
95 {
96 fbmem_poke(fb, off, val);
97 return val == fbmem_peek(fb, off);
98 }
99