1 /*
2 * Time of day based timer functions.
3 *
4 * S390 version
5 * Copyright IBM Corp. 1999, 2008
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9 *
10 * Derived from "arch/i386/kernel/time.c"
11 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
12 */
13
14 #define KMSG_COMPONENT "time"
15 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16
17 #include <linux/kernel_stat.h>
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/device.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/timekeeper_internal.h>
38 #include <linux/clockchips.h>
39 #include <linux/gfp.h>
40 #include <linux/kprobes.h>
41 #include <asm/uaccess.h>
42 #include <asm/delay.h>
43 #include <asm/div64.h>
44 #include <asm/vdso.h>
45 #include <asm/irq.h>
46 #include <asm/irq_regs.h>
47 #include <asm/vtimer.h>
48 #include <asm/etr.h>
49 #include <asm/cio.h>
50 #include "entry.h"
51
52 /* change this if you have some constant time drift */
53 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
54 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55
56 u64 sched_clock_base_cc = -1; /* Force to data section. */
57 EXPORT_SYMBOL_GPL(sched_clock_base_cc);
58
59 static DEFINE_PER_CPU(struct clock_event_device, comparators);
60
61 /*
62 * Scheduler clock - returns current time in nanosec units.
63 */
sched_clock(void)64 unsigned long long notrace __kprobes sched_clock(void)
65 {
66 return tod_to_ns(get_tod_clock_monotonic());
67 }
68
69 /*
70 * Monotonic_clock - returns # of nanoseconds passed since time_init()
71 */
monotonic_clock(void)72 unsigned long long monotonic_clock(void)
73 {
74 return sched_clock();
75 }
76 EXPORT_SYMBOL(monotonic_clock);
77
tod_to_timeval(__u64 todval,struct timespec * xt)78 void tod_to_timeval(__u64 todval, struct timespec *xt)
79 {
80 unsigned long long sec;
81
82 sec = todval >> 12;
83 do_div(sec, 1000000);
84 xt->tv_sec = sec;
85 todval -= (sec * 1000000) << 12;
86 xt->tv_nsec = ((todval * 1000) >> 12);
87 }
88 EXPORT_SYMBOL(tod_to_timeval);
89
clock_comparator_work(void)90 void clock_comparator_work(void)
91 {
92 struct clock_event_device *cd;
93
94 S390_lowcore.clock_comparator = -1ULL;
95 set_clock_comparator(S390_lowcore.clock_comparator);
96 cd = &__get_cpu_var(comparators);
97 cd->event_handler(cd);
98 }
99
100 /*
101 * Fixup the clock comparator.
102 */
fixup_clock_comparator(unsigned long long delta)103 static void fixup_clock_comparator(unsigned long long delta)
104 {
105 /* If nobody is waiting there's nothing to fix. */
106 if (S390_lowcore.clock_comparator == -1ULL)
107 return;
108 S390_lowcore.clock_comparator += delta;
109 set_clock_comparator(S390_lowcore.clock_comparator);
110 }
111
s390_next_ktime(ktime_t expires,struct clock_event_device * evt)112 static int s390_next_ktime(ktime_t expires,
113 struct clock_event_device *evt)
114 {
115 struct timespec ts;
116 u64 nsecs;
117
118 ts.tv_sec = ts.tv_nsec = 0;
119 monotonic_to_bootbased(&ts);
120 nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
121 do_div(nsecs, 125);
122 S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
123 /* Program the maximum value if we have an overflow (== year 2042) */
124 if (unlikely(S390_lowcore.clock_comparator < sched_clock_base_cc))
125 S390_lowcore.clock_comparator = -1ULL;
126 set_clock_comparator(S390_lowcore.clock_comparator);
127 return 0;
128 }
129
s390_set_mode(enum clock_event_mode mode,struct clock_event_device * evt)130 static void s390_set_mode(enum clock_event_mode mode,
131 struct clock_event_device *evt)
132 {
133 }
134
135 /*
136 * Set up lowcore and control register of the current cpu to
137 * enable TOD clock and clock comparator interrupts.
138 */
init_cpu_timer(void)139 void init_cpu_timer(void)
140 {
141 struct clock_event_device *cd;
142 int cpu;
143
144 S390_lowcore.clock_comparator = -1ULL;
145 set_clock_comparator(S390_lowcore.clock_comparator);
146
147 cpu = smp_processor_id();
148 cd = &per_cpu(comparators, cpu);
149 cd->name = "comparator";
150 cd->features = CLOCK_EVT_FEAT_ONESHOT |
151 CLOCK_EVT_FEAT_KTIME;
152 cd->mult = 16777;
153 cd->shift = 12;
154 cd->min_delta_ns = 1;
155 cd->max_delta_ns = LONG_MAX;
156 cd->rating = 400;
157 cd->cpumask = cpumask_of(cpu);
158 cd->set_next_ktime = s390_next_ktime;
159 cd->set_mode = s390_set_mode;
160
161 clockevents_register_device(cd);
162
163 /* Enable clock comparator timer interrupt. */
164 __ctl_set_bit(0,11);
165
166 /* Always allow the timing alert external interrupt. */
167 __ctl_set_bit(0, 4);
168 }
169
clock_comparator_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)170 static void clock_comparator_interrupt(struct ext_code ext_code,
171 unsigned int param32,
172 unsigned long param64)
173 {
174 inc_irq_stat(IRQEXT_CLK);
175 if (S390_lowcore.clock_comparator == -1ULL)
176 set_clock_comparator(S390_lowcore.clock_comparator);
177 }
178
179 static void etr_timing_alert(struct etr_irq_parm *);
180 static void stp_timing_alert(struct stp_irq_parm *);
181
timing_alert_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)182 static void timing_alert_interrupt(struct ext_code ext_code,
183 unsigned int param32, unsigned long param64)
184 {
185 inc_irq_stat(IRQEXT_TLA);
186 if (param32 & 0x00c40000)
187 etr_timing_alert((struct etr_irq_parm *) ¶m32);
188 if (param32 & 0x00038000)
189 stp_timing_alert((struct stp_irq_parm *) ¶m32);
190 }
191
192 static void etr_reset(void);
193 static void stp_reset(void);
194
read_persistent_clock(struct timespec * ts)195 void read_persistent_clock(struct timespec *ts)
196 {
197 tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);
198 }
199
read_boot_clock(struct timespec * ts)200 void read_boot_clock(struct timespec *ts)
201 {
202 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
203 }
204
read_tod_clock(struct clocksource * cs)205 static cycle_t read_tod_clock(struct clocksource *cs)
206 {
207 return get_tod_clock();
208 }
209
210 static struct clocksource clocksource_tod = {
211 .name = "tod",
212 .rating = 400,
213 .read = read_tod_clock,
214 .mask = -1ULL,
215 .mult = 1000,
216 .shift = 12,
217 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
218 };
219
clocksource_default_clock(void)220 struct clocksource * __init clocksource_default_clock(void)
221 {
222 return &clocksource_tod;
223 }
224
update_vsyscall_old(struct timespec * wall_time,struct timespec * wtm,struct clocksource * clock,u32 mult)225 void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
226 struct clocksource *clock, u32 mult)
227 {
228 if (clock != &clocksource_tod)
229 return;
230
231 /* Make userspace gettimeofday spin until we're done. */
232 ++vdso_data->tb_update_count;
233 smp_wmb();
234 vdso_data->xtime_tod_stamp = clock->cycle_last;
235 vdso_data->xtime_clock_sec = wall_time->tv_sec;
236 vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
237 vdso_data->wtom_clock_sec = wtm->tv_sec;
238 vdso_data->wtom_clock_nsec = wtm->tv_nsec;
239 vdso_data->ntp_mult = mult;
240 smp_wmb();
241 ++vdso_data->tb_update_count;
242 }
243
244 extern struct timezone sys_tz;
245
update_vsyscall_tz(void)246 void update_vsyscall_tz(void)
247 {
248 /* Make userspace gettimeofday spin until we're done. */
249 ++vdso_data->tb_update_count;
250 smp_wmb();
251 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
252 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
253 smp_wmb();
254 ++vdso_data->tb_update_count;
255 }
256
257 /*
258 * Initialize the TOD clock and the CPU timer of
259 * the boot cpu.
260 */
time_init(void)261 void __init time_init(void)
262 {
263 /* Reset time synchronization interfaces. */
264 etr_reset();
265 stp_reset();
266
267 /* request the clock comparator external interrupt */
268 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
269 panic("Couldn't request external interrupt 0x1004");
270
271 /* request the timing alert external interrupt */
272 if (register_external_interrupt(0x1406, timing_alert_interrupt))
273 panic("Couldn't request external interrupt 0x1406");
274
275 if (clocksource_register(&clocksource_tod) != 0)
276 panic("Could not register TOD clock source");
277
278 /* Enable TOD clock interrupts on the boot cpu. */
279 init_cpu_timer();
280
281 /* Enable cpu timer interrupts on the boot cpu. */
282 vtime_init();
283 }
284
285 /*
286 * The time is "clock". old is what we think the time is.
287 * Adjust the value by a multiple of jiffies and add the delta to ntp.
288 * "delay" is an approximation how long the synchronization took. If
289 * the time correction is positive, then "delay" is subtracted from
290 * the time difference and only the remaining part is passed to ntp.
291 */
adjust_time(unsigned long long old,unsigned long long clock,unsigned long long delay)292 static unsigned long long adjust_time(unsigned long long old,
293 unsigned long long clock,
294 unsigned long long delay)
295 {
296 unsigned long long delta, ticks;
297 struct timex adjust;
298
299 if (clock > old) {
300 /* It is later than we thought. */
301 delta = ticks = clock - old;
302 delta = ticks = (delta < delay) ? 0 : delta - delay;
303 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
304 adjust.offset = ticks * (1000000 / HZ);
305 } else {
306 /* It is earlier than we thought. */
307 delta = ticks = old - clock;
308 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
309 delta = -delta;
310 adjust.offset = -ticks * (1000000 / HZ);
311 }
312 sched_clock_base_cc += delta;
313 if (adjust.offset != 0) {
314 pr_notice("The ETR interface has adjusted the clock "
315 "by %li microseconds\n", adjust.offset);
316 adjust.modes = ADJ_OFFSET_SINGLESHOT;
317 do_adjtimex(&adjust);
318 }
319 return delta;
320 }
321
322 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
323 static DEFINE_MUTEX(clock_sync_mutex);
324 static unsigned long clock_sync_flags;
325
326 #define CLOCK_SYNC_HAS_ETR 0
327 #define CLOCK_SYNC_HAS_STP 1
328 #define CLOCK_SYNC_ETR 2
329 #define CLOCK_SYNC_STP 3
330
331 /*
332 * The synchronous get_clock function. It will write the current clock
333 * value to the clock pointer and return 0 if the clock is in sync with
334 * the external time source. If the clock mode is local it will return
335 * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
336 * reference.
337 */
get_sync_clock(unsigned long long * clock)338 int get_sync_clock(unsigned long long *clock)
339 {
340 atomic_t *sw_ptr;
341 unsigned int sw0, sw1;
342
343 sw_ptr = &get_cpu_var(clock_sync_word);
344 sw0 = atomic_read(sw_ptr);
345 *clock = get_tod_clock();
346 sw1 = atomic_read(sw_ptr);
347 put_cpu_var(clock_sync_word);
348 if (sw0 == sw1 && (sw0 & 0x80000000U))
349 /* Success: time is in sync. */
350 return 0;
351 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
352 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
353 return -EOPNOTSUPP;
354 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
355 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
356 return -EACCES;
357 return -EAGAIN;
358 }
359 EXPORT_SYMBOL(get_sync_clock);
360
361 /*
362 * Make get_sync_clock return -EAGAIN.
363 */
disable_sync_clock(void * dummy)364 static void disable_sync_clock(void *dummy)
365 {
366 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
367 /*
368 * Clear the in-sync bit 2^31. All get_sync_clock calls will
369 * fail until the sync bit is turned back on. In addition
370 * increase the "sequence" counter to avoid the race of an
371 * etr event and the complete recovery against get_sync_clock.
372 */
373 atomic_clear_mask(0x80000000, sw_ptr);
374 atomic_inc(sw_ptr);
375 }
376
377 /*
378 * Make get_sync_clock return 0 again.
379 * Needs to be called from a context disabled for preemption.
380 */
enable_sync_clock(void)381 static void enable_sync_clock(void)
382 {
383 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
384 atomic_set_mask(0x80000000, sw_ptr);
385 }
386
387 /*
388 * Function to check if the clock is in sync.
389 */
check_sync_clock(void)390 static inline int check_sync_clock(void)
391 {
392 atomic_t *sw_ptr;
393 int rc;
394
395 sw_ptr = &get_cpu_var(clock_sync_word);
396 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
397 put_cpu_var(clock_sync_word);
398 return rc;
399 }
400
401 /* Single threaded workqueue used for etr and stp sync events */
402 static struct workqueue_struct *time_sync_wq;
403
time_init_wq(void)404 static void __init time_init_wq(void)
405 {
406 if (time_sync_wq)
407 return;
408 time_sync_wq = create_singlethread_workqueue("timesync");
409 }
410
411 /*
412 * External Time Reference (ETR) code.
413 */
414 static int etr_port0_online;
415 static int etr_port1_online;
416 static int etr_steai_available;
417
early_parse_etr(char * p)418 static int __init early_parse_etr(char *p)
419 {
420 if (strncmp(p, "off", 3) == 0)
421 etr_port0_online = etr_port1_online = 0;
422 else if (strncmp(p, "port0", 5) == 0)
423 etr_port0_online = 1;
424 else if (strncmp(p, "port1", 5) == 0)
425 etr_port1_online = 1;
426 else if (strncmp(p, "on", 2) == 0)
427 etr_port0_online = etr_port1_online = 1;
428 return 0;
429 }
430 early_param("etr", early_parse_etr);
431
432 enum etr_event {
433 ETR_EVENT_PORT0_CHANGE,
434 ETR_EVENT_PORT1_CHANGE,
435 ETR_EVENT_PORT_ALERT,
436 ETR_EVENT_SYNC_CHECK,
437 ETR_EVENT_SWITCH_LOCAL,
438 ETR_EVENT_UPDATE,
439 };
440
441 /*
442 * Valid bit combinations of the eacr register are (x = don't care):
443 * e0 e1 dp p0 p1 ea es sl
444 * 0 0 x 0 0 0 0 0 initial, disabled state
445 * 0 0 x 0 1 1 0 0 port 1 online
446 * 0 0 x 1 0 1 0 0 port 0 online
447 * 0 0 x 1 1 1 0 0 both ports online
448 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
449 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
450 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
451 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
452 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
453 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
454 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
455 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
456 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
457 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
458 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
459 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
460 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
461 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
462 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
463 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
464 */
465 static struct etr_eacr etr_eacr;
466 static u64 etr_tolec; /* time of last eacr update */
467 static struct etr_aib etr_port0;
468 static int etr_port0_uptodate;
469 static struct etr_aib etr_port1;
470 static int etr_port1_uptodate;
471 static unsigned long etr_events;
472 static struct timer_list etr_timer;
473
474 static void etr_timeout(unsigned long dummy);
475 static void etr_work_fn(struct work_struct *work);
476 static DEFINE_MUTEX(etr_work_mutex);
477 static DECLARE_WORK(etr_work, etr_work_fn);
478
479 /*
480 * Reset ETR attachment.
481 */
etr_reset(void)482 static void etr_reset(void)
483 {
484 etr_eacr = (struct etr_eacr) {
485 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
486 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
487 .es = 0, .sl = 0 };
488 if (etr_setr(&etr_eacr) == 0) {
489 etr_tolec = get_tod_clock();
490 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
491 if (etr_port0_online && etr_port1_online)
492 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
493 } else if (etr_port0_online || etr_port1_online) {
494 pr_warning("The real or virtual hardware system does "
495 "not provide an ETR interface\n");
496 etr_port0_online = etr_port1_online = 0;
497 }
498 }
499
etr_init(void)500 static int __init etr_init(void)
501 {
502 struct etr_aib aib;
503
504 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
505 return 0;
506 time_init_wq();
507 /* Check if this machine has the steai instruction. */
508 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
509 etr_steai_available = 1;
510 setup_timer(&etr_timer, etr_timeout, 0UL);
511 if (etr_port0_online) {
512 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
513 queue_work(time_sync_wq, &etr_work);
514 }
515 if (etr_port1_online) {
516 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
517 queue_work(time_sync_wq, &etr_work);
518 }
519 return 0;
520 }
521
522 arch_initcall(etr_init);
523
524 /*
525 * Two sorts of ETR machine checks. The architecture reads:
526 * "When a machine-check niterruption occurs and if a switch-to-local or
527 * ETR-sync-check interrupt request is pending but disabled, this pending
528 * disabled interruption request is indicated and is cleared".
529 * Which means that we can get etr_switch_to_local events from the machine
530 * check handler although the interruption condition is disabled. Lovely..
531 */
532
533 /*
534 * Switch to local machine check. This is called when the last usable
535 * ETR port goes inactive. After switch to local the clock is not in sync.
536 */
etr_switch_to_local(void)537 void etr_switch_to_local(void)
538 {
539 if (!etr_eacr.sl)
540 return;
541 disable_sync_clock(NULL);
542 if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
543 etr_eacr.es = etr_eacr.sl = 0;
544 etr_setr(&etr_eacr);
545 queue_work(time_sync_wq, &etr_work);
546 }
547 }
548
549 /*
550 * ETR sync check machine check. This is called when the ETR OTE and the
551 * local clock OTE are farther apart than the ETR sync check tolerance.
552 * After a ETR sync check the clock is not in sync. The machine check
553 * is broadcasted to all cpus at the same time.
554 */
etr_sync_check(void)555 void etr_sync_check(void)
556 {
557 if (!etr_eacr.es)
558 return;
559 disable_sync_clock(NULL);
560 if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
561 etr_eacr.es = 0;
562 etr_setr(&etr_eacr);
563 queue_work(time_sync_wq, &etr_work);
564 }
565 }
566
567 /*
568 * ETR timing alert. There are two causes:
569 * 1) port state change, check the usability of the port
570 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
571 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
572 * or ETR-data word 4 (edf4) has changed.
573 */
etr_timing_alert(struct etr_irq_parm * intparm)574 static void etr_timing_alert(struct etr_irq_parm *intparm)
575 {
576 if (intparm->pc0)
577 /* ETR port 0 state change. */
578 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
579 if (intparm->pc1)
580 /* ETR port 1 state change. */
581 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
582 if (intparm->eai)
583 /*
584 * ETR port alert on either port 0, 1 or both.
585 * Both ports are not up-to-date now.
586 */
587 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
588 queue_work(time_sync_wq, &etr_work);
589 }
590
etr_timeout(unsigned long dummy)591 static void etr_timeout(unsigned long dummy)
592 {
593 set_bit(ETR_EVENT_UPDATE, &etr_events);
594 queue_work(time_sync_wq, &etr_work);
595 }
596
597 /*
598 * Check if the etr mode is pss.
599 */
etr_mode_is_pps(struct etr_eacr eacr)600 static inline int etr_mode_is_pps(struct etr_eacr eacr)
601 {
602 return eacr.es && !eacr.sl;
603 }
604
605 /*
606 * Check if the etr mode is etr.
607 */
etr_mode_is_etr(struct etr_eacr eacr)608 static inline int etr_mode_is_etr(struct etr_eacr eacr)
609 {
610 return eacr.es && eacr.sl;
611 }
612
613 /*
614 * Check if the port can be used for TOD synchronization.
615 * For PPS mode the port has to receive OTEs. For ETR mode
616 * the port has to receive OTEs, the ETR stepping bit has to
617 * be zero and the validity bits for data frame 1, 2, and 3
618 * have to be 1.
619 */
etr_port_valid(struct etr_aib * aib,int port)620 static int etr_port_valid(struct etr_aib *aib, int port)
621 {
622 unsigned int psc;
623
624 /* Check that this port is receiving OTEs. */
625 if (aib->tsp == 0)
626 return 0;
627
628 psc = port ? aib->esw.psc1 : aib->esw.psc0;
629 if (psc == etr_lpsc_pps_mode)
630 return 1;
631 if (psc == etr_lpsc_operational_step)
632 return !aib->esw.y && aib->slsw.v1 &&
633 aib->slsw.v2 && aib->slsw.v3;
634 return 0;
635 }
636
637 /*
638 * Check if two ports are on the same network.
639 */
etr_compare_network(struct etr_aib * aib1,struct etr_aib * aib2)640 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
641 {
642 // FIXME: any other fields we have to compare?
643 return aib1->edf1.net_id == aib2->edf1.net_id;
644 }
645
646 /*
647 * Wrapper for etr_stei that converts physical port states
648 * to logical port states to be consistent with the output
649 * of stetr (see etr_psc vs. etr_lpsc).
650 */
etr_steai_cv(struct etr_aib * aib,unsigned int func)651 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
652 {
653 BUG_ON(etr_steai(aib, func) != 0);
654 /* Convert port state to logical port state. */
655 if (aib->esw.psc0 == 1)
656 aib->esw.psc0 = 2;
657 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
658 aib->esw.psc0 = 1;
659 if (aib->esw.psc1 == 1)
660 aib->esw.psc1 = 2;
661 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
662 aib->esw.psc1 = 1;
663 }
664
665 /*
666 * Check if the aib a2 is still connected to the same attachment as
667 * aib a1, the etv values differ by one and a2 is valid.
668 */
etr_aib_follows(struct etr_aib * a1,struct etr_aib * a2,int p)669 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
670 {
671 int state_a1, state_a2;
672
673 /* Paranoia check: e0/e1 should better be the same. */
674 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
675 a1->esw.eacr.e1 != a2->esw.eacr.e1)
676 return 0;
677
678 /* Still connected to the same etr ? */
679 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
680 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
681 if (state_a1 == etr_lpsc_operational_step) {
682 if (state_a2 != etr_lpsc_operational_step ||
683 a1->edf1.net_id != a2->edf1.net_id ||
684 a1->edf1.etr_id != a2->edf1.etr_id ||
685 a1->edf1.etr_pn != a2->edf1.etr_pn)
686 return 0;
687 } else if (state_a2 != etr_lpsc_pps_mode)
688 return 0;
689
690 /* The ETV value of a2 needs to be ETV of a1 + 1. */
691 if (a1->edf2.etv + 1 != a2->edf2.etv)
692 return 0;
693
694 if (!etr_port_valid(a2, p))
695 return 0;
696
697 return 1;
698 }
699
700 struct clock_sync_data {
701 atomic_t cpus;
702 int in_sync;
703 unsigned long long fixup_cc;
704 int etr_port;
705 struct etr_aib *etr_aib;
706 };
707
clock_sync_cpu(struct clock_sync_data * sync)708 static void clock_sync_cpu(struct clock_sync_data *sync)
709 {
710 atomic_dec(&sync->cpus);
711 enable_sync_clock();
712 /*
713 * This looks like a busy wait loop but it isn't. etr_sync_cpus
714 * is called on all other cpus while the TOD clocks is stopped.
715 * __udelay will stop the cpu on an enabled wait psw until the
716 * TOD is running again.
717 */
718 while (sync->in_sync == 0) {
719 __udelay(1);
720 /*
721 * A different cpu changes *in_sync. Therefore use
722 * barrier() to force memory access.
723 */
724 barrier();
725 }
726 if (sync->in_sync != 1)
727 /* Didn't work. Clear per-cpu in sync bit again. */
728 disable_sync_clock(NULL);
729 /*
730 * This round of TOD syncing is done. Set the clock comparator
731 * to the next tick and let the processor continue.
732 */
733 fixup_clock_comparator(sync->fixup_cc);
734 }
735
736 /*
737 * Sync the TOD clock using the port referred to by aibp. This port
738 * has to be enabled and the other port has to be disabled. The
739 * last eacr update has to be more than 1.6 seconds in the past.
740 */
etr_sync_clock(void * data)741 static int etr_sync_clock(void *data)
742 {
743 static int first;
744 unsigned long long clock, old_clock, delay, delta;
745 struct clock_sync_data *etr_sync;
746 struct etr_aib *sync_port, *aib;
747 int port;
748 int rc;
749
750 etr_sync = data;
751
752 if (xchg(&first, 1) == 1) {
753 /* Slave */
754 clock_sync_cpu(etr_sync);
755 return 0;
756 }
757
758 /* Wait until all other cpus entered the sync function. */
759 while (atomic_read(&etr_sync->cpus) != 0)
760 cpu_relax();
761
762 port = etr_sync->etr_port;
763 aib = etr_sync->etr_aib;
764 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
765 enable_sync_clock();
766
767 /* Set clock to next OTE. */
768 __ctl_set_bit(14, 21);
769 __ctl_set_bit(0, 29);
770 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
771 old_clock = get_tod_clock();
772 if (set_tod_clock(clock) == 0) {
773 __udelay(1); /* Wait for the clock to start. */
774 __ctl_clear_bit(0, 29);
775 __ctl_clear_bit(14, 21);
776 etr_stetr(aib);
777 /* Adjust Linux timing variables. */
778 delay = (unsigned long long)
779 (aib->edf2.etv - sync_port->edf2.etv) << 32;
780 delta = adjust_time(old_clock, clock, delay);
781 etr_sync->fixup_cc = delta;
782 fixup_clock_comparator(delta);
783 /* Verify that the clock is properly set. */
784 if (!etr_aib_follows(sync_port, aib, port)) {
785 /* Didn't work. */
786 disable_sync_clock(NULL);
787 etr_sync->in_sync = -EAGAIN;
788 rc = -EAGAIN;
789 } else {
790 etr_sync->in_sync = 1;
791 rc = 0;
792 }
793 } else {
794 /* Could not set the clock ?!? */
795 __ctl_clear_bit(0, 29);
796 __ctl_clear_bit(14, 21);
797 disable_sync_clock(NULL);
798 etr_sync->in_sync = -EAGAIN;
799 rc = -EAGAIN;
800 }
801 xchg(&first, 0);
802 return rc;
803 }
804
etr_sync_clock_stop(struct etr_aib * aib,int port)805 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
806 {
807 struct clock_sync_data etr_sync;
808 struct etr_aib *sync_port;
809 int follows;
810 int rc;
811
812 /* Check if the current aib is adjacent to the sync port aib. */
813 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
814 follows = etr_aib_follows(sync_port, aib, port);
815 memcpy(sync_port, aib, sizeof(*aib));
816 if (!follows)
817 return -EAGAIN;
818 memset(&etr_sync, 0, sizeof(etr_sync));
819 etr_sync.etr_aib = aib;
820 etr_sync.etr_port = port;
821 get_online_cpus();
822 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
823 rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
824 put_online_cpus();
825 return rc;
826 }
827
828 /*
829 * Handle the immediate effects of the different events.
830 * The port change event is used for online/offline changes.
831 */
etr_handle_events(struct etr_eacr eacr)832 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
833 {
834 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
835 eacr.es = 0;
836 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
837 eacr.es = eacr.sl = 0;
838 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
839 etr_port0_uptodate = etr_port1_uptodate = 0;
840
841 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
842 if (eacr.e0)
843 /*
844 * Port change of an enabled port. We have to
845 * assume that this can have caused an stepping
846 * port switch.
847 */
848 etr_tolec = get_tod_clock();
849 eacr.p0 = etr_port0_online;
850 if (!eacr.p0)
851 eacr.e0 = 0;
852 etr_port0_uptodate = 0;
853 }
854 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
855 if (eacr.e1)
856 /*
857 * Port change of an enabled port. We have to
858 * assume that this can have caused an stepping
859 * port switch.
860 */
861 etr_tolec = get_tod_clock();
862 eacr.p1 = etr_port1_online;
863 if (!eacr.p1)
864 eacr.e1 = 0;
865 etr_port1_uptodate = 0;
866 }
867 clear_bit(ETR_EVENT_UPDATE, &etr_events);
868 return eacr;
869 }
870
871 /*
872 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
873 * one of the ports needs an update.
874 */
etr_set_tolec_timeout(unsigned long long now)875 static void etr_set_tolec_timeout(unsigned long long now)
876 {
877 unsigned long micros;
878
879 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
880 (!etr_eacr.p1 || etr_port1_uptodate))
881 return;
882 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
883 micros = (micros > 1600000) ? 0 : 1600000 - micros;
884 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
885 }
886
887 /*
888 * Set up a time that expires after 1/2 second.
889 */
etr_set_sync_timeout(void)890 static void etr_set_sync_timeout(void)
891 {
892 mod_timer(&etr_timer, jiffies + HZ/2);
893 }
894
895 /*
896 * Update the aib information for one or both ports.
897 */
etr_handle_update(struct etr_aib * aib,struct etr_eacr eacr)898 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
899 struct etr_eacr eacr)
900 {
901 /* With both ports disabled the aib information is useless. */
902 if (!eacr.e0 && !eacr.e1)
903 return eacr;
904
905 /* Update port0 or port1 with aib stored in etr_work_fn. */
906 if (aib->esw.q == 0) {
907 /* Information for port 0 stored. */
908 if (eacr.p0 && !etr_port0_uptodate) {
909 etr_port0 = *aib;
910 if (etr_port0_online)
911 etr_port0_uptodate = 1;
912 }
913 } else {
914 /* Information for port 1 stored. */
915 if (eacr.p1 && !etr_port1_uptodate) {
916 etr_port1 = *aib;
917 if (etr_port0_online)
918 etr_port1_uptodate = 1;
919 }
920 }
921
922 /*
923 * Do not try to get the alternate port aib if the clock
924 * is not in sync yet.
925 */
926 if (!eacr.es || !check_sync_clock())
927 return eacr;
928
929 /*
930 * If steai is available we can get the information about
931 * the other port immediately. If only stetr is available the
932 * data-port bit toggle has to be used.
933 */
934 if (etr_steai_available) {
935 if (eacr.p0 && !etr_port0_uptodate) {
936 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
937 etr_port0_uptodate = 1;
938 }
939 if (eacr.p1 && !etr_port1_uptodate) {
940 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
941 etr_port1_uptodate = 1;
942 }
943 } else {
944 /*
945 * One port was updated above, if the other
946 * port is not uptodate toggle dp bit.
947 */
948 if ((eacr.p0 && !etr_port0_uptodate) ||
949 (eacr.p1 && !etr_port1_uptodate))
950 eacr.dp ^= 1;
951 else
952 eacr.dp = 0;
953 }
954 return eacr;
955 }
956
957 /*
958 * Write new etr control register if it differs from the current one.
959 * Return 1 if etr_tolec has been updated as well.
960 */
etr_update_eacr(struct etr_eacr eacr)961 static void etr_update_eacr(struct etr_eacr eacr)
962 {
963 int dp_changed;
964
965 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
966 /* No change, return. */
967 return;
968 /*
969 * The disable of an active port of the change of the data port
970 * bit can/will cause a change in the data port.
971 */
972 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
973 (etr_eacr.dp ^ eacr.dp) != 0;
974 etr_eacr = eacr;
975 etr_setr(&etr_eacr);
976 if (dp_changed)
977 etr_tolec = get_tod_clock();
978 }
979
980 /*
981 * ETR work. In this function you'll find the main logic. In
982 * particular this is the only function that calls etr_update_eacr(),
983 * it "controls" the etr control register.
984 */
etr_work_fn(struct work_struct * work)985 static void etr_work_fn(struct work_struct *work)
986 {
987 unsigned long long now;
988 struct etr_eacr eacr;
989 struct etr_aib aib;
990 int sync_port;
991
992 /* prevent multiple execution. */
993 mutex_lock(&etr_work_mutex);
994
995 /* Create working copy of etr_eacr. */
996 eacr = etr_eacr;
997
998 /* Check for the different events and their immediate effects. */
999 eacr = etr_handle_events(eacr);
1000
1001 /* Check if ETR is supposed to be active. */
1002 eacr.ea = eacr.p0 || eacr.p1;
1003 if (!eacr.ea) {
1004 /* Both ports offline. Reset everything. */
1005 eacr.dp = eacr.es = eacr.sl = 0;
1006 on_each_cpu(disable_sync_clock, NULL, 1);
1007 del_timer_sync(&etr_timer);
1008 etr_update_eacr(eacr);
1009 goto out_unlock;
1010 }
1011
1012 /* Store aib to get the current ETR status word. */
1013 BUG_ON(etr_stetr(&aib) != 0);
1014 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1015 now = get_tod_clock();
1016
1017 /*
1018 * Update the port information if the last stepping port change
1019 * or data port change is older than 1.6 seconds.
1020 */
1021 if (now >= etr_tolec + (1600000 << 12))
1022 eacr = etr_handle_update(&aib, eacr);
1023
1024 /*
1025 * Select ports to enable. The preferred synchronization mode is PPS.
1026 * If a port can be enabled depends on a number of things:
1027 * 1) The port needs to be online and uptodate. A port is not
1028 * disabled just because it is not uptodate, but it is only
1029 * enabled if it is uptodate.
1030 * 2) The port needs to have the same mode (pps / etr).
1031 * 3) The port needs to be usable -> etr_port_valid() == 1
1032 * 4) To enable the second port the clock needs to be in sync.
1033 * 5) If both ports are useable and are ETR ports, the network id
1034 * has to be the same.
1035 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1036 */
1037 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1038 eacr.sl = 0;
1039 eacr.e0 = 1;
1040 if (!etr_mode_is_pps(etr_eacr))
1041 eacr.es = 0;
1042 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1043 eacr.e1 = 0;
1044 // FIXME: uptodate checks ?
1045 else if (etr_port0_uptodate && etr_port1_uptodate)
1046 eacr.e1 = 1;
1047 sync_port = (etr_port0_uptodate &&
1048 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1049 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1050 eacr.sl = 0;
1051 eacr.e0 = 0;
1052 eacr.e1 = 1;
1053 if (!etr_mode_is_pps(etr_eacr))
1054 eacr.es = 0;
1055 sync_port = (etr_port1_uptodate &&
1056 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1057 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1058 eacr.sl = 1;
1059 eacr.e0 = 1;
1060 if (!etr_mode_is_etr(etr_eacr))
1061 eacr.es = 0;
1062 if (!eacr.es || !eacr.p1 ||
1063 aib.esw.psc1 != etr_lpsc_operational_alt)
1064 eacr.e1 = 0;
1065 else if (etr_port0_uptodate && etr_port1_uptodate &&
1066 etr_compare_network(&etr_port0, &etr_port1))
1067 eacr.e1 = 1;
1068 sync_port = (etr_port0_uptodate &&
1069 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1070 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1071 eacr.sl = 1;
1072 eacr.e0 = 0;
1073 eacr.e1 = 1;
1074 if (!etr_mode_is_etr(etr_eacr))
1075 eacr.es = 0;
1076 sync_port = (etr_port1_uptodate &&
1077 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1078 } else {
1079 /* Both ports not usable. */
1080 eacr.es = eacr.sl = 0;
1081 sync_port = -1;
1082 }
1083
1084 /*
1085 * If the clock is in sync just update the eacr and return.
1086 * If there is no valid sync port wait for a port update.
1087 */
1088 if ((eacr.es && check_sync_clock()) || sync_port < 0) {
1089 etr_update_eacr(eacr);
1090 etr_set_tolec_timeout(now);
1091 goto out_unlock;
1092 }
1093
1094 /*
1095 * Prepare control register for clock syncing
1096 * (reset data port bit, set sync check control.
1097 */
1098 eacr.dp = 0;
1099 eacr.es = 1;
1100
1101 /*
1102 * Update eacr and try to synchronize the clock. If the update
1103 * of eacr caused a stepping port switch (or if we have to
1104 * assume that a stepping port switch has occurred) or the
1105 * clock syncing failed, reset the sync check control bit
1106 * and set up a timer to try again after 0.5 seconds
1107 */
1108 etr_update_eacr(eacr);
1109 if (now < etr_tolec + (1600000 << 12) ||
1110 etr_sync_clock_stop(&aib, sync_port) != 0) {
1111 /* Sync failed. Try again in 1/2 second. */
1112 eacr.es = 0;
1113 etr_update_eacr(eacr);
1114 etr_set_sync_timeout();
1115 } else
1116 etr_set_tolec_timeout(now);
1117 out_unlock:
1118 mutex_unlock(&etr_work_mutex);
1119 }
1120
1121 /*
1122 * Sysfs interface functions
1123 */
1124 static struct bus_type etr_subsys = {
1125 .name = "etr",
1126 .dev_name = "etr",
1127 };
1128
1129 static struct device etr_port0_dev = {
1130 .id = 0,
1131 .bus = &etr_subsys,
1132 };
1133
1134 static struct device etr_port1_dev = {
1135 .id = 1,
1136 .bus = &etr_subsys,
1137 };
1138
1139 /*
1140 * ETR subsys attributes
1141 */
etr_stepping_port_show(struct device * dev,struct device_attribute * attr,char * buf)1142 static ssize_t etr_stepping_port_show(struct device *dev,
1143 struct device_attribute *attr,
1144 char *buf)
1145 {
1146 return sprintf(buf, "%i\n", etr_port0.esw.p);
1147 }
1148
1149 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1150
etr_stepping_mode_show(struct device * dev,struct device_attribute * attr,char * buf)1151 static ssize_t etr_stepping_mode_show(struct device *dev,
1152 struct device_attribute *attr,
1153 char *buf)
1154 {
1155 char *mode_str;
1156
1157 if (etr_mode_is_pps(etr_eacr))
1158 mode_str = "pps";
1159 else if (etr_mode_is_etr(etr_eacr))
1160 mode_str = "etr";
1161 else
1162 mode_str = "local";
1163 return sprintf(buf, "%s\n", mode_str);
1164 }
1165
1166 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1167
1168 /*
1169 * ETR port attributes
1170 */
etr_aib_from_dev(struct device * dev)1171 static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
1172 {
1173 if (dev == &etr_port0_dev)
1174 return etr_port0_online ? &etr_port0 : NULL;
1175 else
1176 return etr_port1_online ? &etr_port1 : NULL;
1177 }
1178
etr_online_show(struct device * dev,struct device_attribute * attr,char * buf)1179 static ssize_t etr_online_show(struct device *dev,
1180 struct device_attribute *attr,
1181 char *buf)
1182 {
1183 unsigned int online;
1184
1185 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1186 return sprintf(buf, "%i\n", online);
1187 }
1188
etr_online_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1189 static ssize_t etr_online_store(struct device *dev,
1190 struct device_attribute *attr,
1191 const char *buf, size_t count)
1192 {
1193 unsigned int value;
1194
1195 value = simple_strtoul(buf, NULL, 0);
1196 if (value != 0 && value != 1)
1197 return -EINVAL;
1198 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1199 return -EOPNOTSUPP;
1200 mutex_lock(&clock_sync_mutex);
1201 if (dev == &etr_port0_dev) {
1202 if (etr_port0_online == value)
1203 goto out; /* Nothing to do. */
1204 etr_port0_online = value;
1205 if (etr_port0_online && etr_port1_online)
1206 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1207 else
1208 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1209 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1210 queue_work(time_sync_wq, &etr_work);
1211 } else {
1212 if (etr_port1_online == value)
1213 goto out; /* Nothing to do. */
1214 etr_port1_online = value;
1215 if (etr_port0_online && etr_port1_online)
1216 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1217 else
1218 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1219 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1220 queue_work(time_sync_wq, &etr_work);
1221 }
1222 out:
1223 mutex_unlock(&clock_sync_mutex);
1224 return count;
1225 }
1226
1227 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
1228
etr_stepping_control_show(struct device * dev,struct device_attribute * attr,char * buf)1229 static ssize_t etr_stepping_control_show(struct device *dev,
1230 struct device_attribute *attr,
1231 char *buf)
1232 {
1233 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1234 etr_eacr.e0 : etr_eacr.e1);
1235 }
1236
1237 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1238
etr_mode_code_show(struct device * dev,struct device_attribute * attr,char * buf)1239 static ssize_t etr_mode_code_show(struct device *dev,
1240 struct device_attribute *attr, char *buf)
1241 {
1242 if (!etr_port0_online && !etr_port1_online)
1243 /* Status word is not uptodate if both ports are offline. */
1244 return -ENODATA;
1245 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1246 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1247 }
1248
1249 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1250
etr_untuned_show(struct device * dev,struct device_attribute * attr,char * buf)1251 static ssize_t etr_untuned_show(struct device *dev,
1252 struct device_attribute *attr, char *buf)
1253 {
1254 struct etr_aib *aib = etr_aib_from_dev(dev);
1255
1256 if (!aib || !aib->slsw.v1)
1257 return -ENODATA;
1258 return sprintf(buf, "%i\n", aib->edf1.u);
1259 }
1260
1261 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
1262
etr_network_id_show(struct device * dev,struct device_attribute * attr,char * buf)1263 static ssize_t etr_network_id_show(struct device *dev,
1264 struct device_attribute *attr, char *buf)
1265 {
1266 struct etr_aib *aib = etr_aib_from_dev(dev);
1267
1268 if (!aib || !aib->slsw.v1)
1269 return -ENODATA;
1270 return sprintf(buf, "%i\n", aib->edf1.net_id);
1271 }
1272
1273 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
1274
etr_id_show(struct device * dev,struct device_attribute * attr,char * buf)1275 static ssize_t etr_id_show(struct device *dev,
1276 struct device_attribute *attr, char *buf)
1277 {
1278 struct etr_aib *aib = etr_aib_from_dev(dev);
1279
1280 if (!aib || !aib->slsw.v1)
1281 return -ENODATA;
1282 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1283 }
1284
1285 static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
1286
etr_port_number_show(struct device * dev,struct device_attribute * attr,char * buf)1287 static ssize_t etr_port_number_show(struct device *dev,
1288 struct device_attribute *attr, char *buf)
1289 {
1290 struct etr_aib *aib = etr_aib_from_dev(dev);
1291
1292 if (!aib || !aib->slsw.v1)
1293 return -ENODATA;
1294 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1295 }
1296
1297 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
1298
etr_coupled_show(struct device * dev,struct device_attribute * attr,char * buf)1299 static ssize_t etr_coupled_show(struct device *dev,
1300 struct device_attribute *attr, char *buf)
1301 {
1302 struct etr_aib *aib = etr_aib_from_dev(dev);
1303
1304 if (!aib || !aib->slsw.v3)
1305 return -ENODATA;
1306 return sprintf(buf, "%i\n", aib->edf3.c);
1307 }
1308
1309 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
1310
etr_local_time_show(struct device * dev,struct device_attribute * attr,char * buf)1311 static ssize_t etr_local_time_show(struct device *dev,
1312 struct device_attribute *attr, char *buf)
1313 {
1314 struct etr_aib *aib = etr_aib_from_dev(dev);
1315
1316 if (!aib || !aib->slsw.v3)
1317 return -ENODATA;
1318 return sprintf(buf, "%i\n", aib->edf3.blto);
1319 }
1320
1321 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
1322
etr_utc_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1323 static ssize_t etr_utc_offset_show(struct device *dev,
1324 struct device_attribute *attr, char *buf)
1325 {
1326 struct etr_aib *aib = etr_aib_from_dev(dev);
1327
1328 if (!aib || !aib->slsw.v3)
1329 return -ENODATA;
1330 return sprintf(buf, "%i\n", aib->edf3.buo);
1331 }
1332
1333 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1334
1335 static struct device_attribute *etr_port_attributes[] = {
1336 &dev_attr_online,
1337 &dev_attr_stepping_control,
1338 &dev_attr_state_code,
1339 &dev_attr_untuned,
1340 &dev_attr_network,
1341 &dev_attr_id,
1342 &dev_attr_port,
1343 &dev_attr_coupled,
1344 &dev_attr_local_time,
1345 &dev_attr_utc_offset,
1346 NULL
1347 };
1348
etr_register_port(struct device * dev)1349 static int __init etr_register_port(struct device *dev)
1350 {
1351 struct device_attribute **attr;
1352 int rc;
1353
1354 rc = device_register(dev);
1355 if (rc)
1356 goto out;
1357 for (attr = etr_port_attributes; *attr; attr++) {
1358 rc = device_create_file(dev, *attr);
1359 if (rc)
1360 goto out_unreg;
1361 }
1362 return 0;
1363 out_unreg:
1364 for (; attr >= etr_port_attributes; attr--)
1365 device_remove_file(dev, *attr);
1366 device_unregister(dev);
1367 out:
1368 return rc;
1369 }
1370
etr_unregister_port(struct device * dev)1371 static void __init etr_unregister_port(struct device *dev)
1372 {
1373 struct device_attribute **attr;
1374
1375 for (attr = etr_port_attributes; *attr; attr++)
1376 device_remove_file(dev, *attr);
1377 device_unregister(dev);
1378 }
1379
etr_init_sysfs(void)1380 static int __init etr_init_sysfs(void)
1381 {
1382 int rc;
1383
1384 rc = subsys_system_register(&etr_subsys, NULL);
1385 if (rc)
1386 goto out;
1387 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1388 if (rc)
1389 goto out_unreg_subsys;
1390 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1391 if (rc)
1392 goto out_remove_stepping_port;
1393 rc = etr_register_port(&etr_port0_dev);
1394 if (rc)
1395 goto out_remove_stepping_mode;
1396 rc = etr_register_port(&etr_port1_dev);
1397 if (rc)
1398 goto out_remove_port0;
1399 return 0;
1400
1401 out_remove_port0:
1402 etr_unregister_port(&etr_port0_dev);
1403 out_remove_stepping_mode:
1404 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1405 out_remove_stepping_port:
1406 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1407 out_unreg_subsys:
1408 bus_unregister(&etr_subsys);
1409 out:
1410 return rc;
1411 }
1412
1413 device_initcall(etr_init_sysfs);
1414
1415 /*
1416 * Server Time Protocol (STP) code.
1417 */
1418 static int stp_online;
1419 static struct stp_sstpi stp_info;
1420 static void *stp_page;
1421
1422 static void stp_work_fn(struct work_struct *work);
1423 static DEFINE_MUTEX(stp_work_mutex);
1424 static DECLARE_WORK(stp_work, stp_work_fn);
1425 static struct timer_list stp_timer;
1426
early_parse_stp(char * p)1427 static int __init early_parse_stp(char *p)
1428 {
1429 if (strncmp(p, "off", 3) == 0)
1430 stp_online = 0;
1431 else if (strncmp(p, "on", 2) == 0)
1432 stp_online = 1;
1433 return 0;
1434 }
1435 early_param("stp", early_parse_stp);
1436
1437 /*
1438 * Reset STP attachment.
1439 */
stp_reset(void)1440 static void __init stp_reset(void)
1441 {
1442 int rc;
1443
1444 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1445 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1446 if (rc == 0)
1447 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1448 else if (stp_online) {
1449 pr_warning("The real or virtual hardware system does "
1450 "not provide an STP interface\n");
1451 free_page((unsigned long) stp_page);
1452 stp_page = NULL;
1453 stp_online = 0;
1454 }
1455 }
1456
stp_timeout(unsigned long dummy)1457 static void stp_timeout(unsigned long dummy)
1458 {
1459 queue_work(time_sync_wq, &stp_work);
1460 }
1461
stp_init(void)1462 static int __init stp_init(void)
1463 {
1464 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1465 return 0;
1466 setup_timer(&stp_timer, stp_timeout, 0UL);
1467 time_init_wq();
1468 if (!stp_online)
1469 return 0;
1470 queue_work(time_sync_wq, &stp_work);
1471 return 0;
1472 }
1473
1474 arch_initcall(stp_init);
1475
1476 /*
1477 * STP timing alert. There are three causes:
1478 * 1) timing status change
1479 * 2) link availability change
1480 * 3) time control parameter change
1481 * In all three cases we are only interested in the clock source state.
1482 * If a STP clock source is now available use it.
1483 */
stp_timing_alert(struct stp_irq_parm * intparm)1484 static void stp_timing_alert(struct stp_irq_parm *intparm)
1485 {
1486 if (intparm->tsc || intparm->lac || intparm->tcpc)
1487 queue_work(time_sync_wq, &stp_work);
1488 }
1489
1490 /*
1491 * STP sync check machine check. This is called when the timing state
1492 * changes from the synchronized state to the unsynchronized state.
1493 * After a STP sync check the clock is not in sync. The machine check
1494 * is broadcasted to all cpus at the same time.
1495 */
stp_sync_check(void)1496 void stp_sync_check(void)
1497 {
1498 disable_sync_clock(NULL);
1499 queue_work(time_sync_wq, &stp_work);
1500 }
1501
1502 /*
1503 * STP island condition machine check. This is called when an attached
1504 * server attempts to communicate over an STP link and the servers
1505 * have matching CTN ids and have a valid stratum-1 configuration
1506 * but the configurations do not match.
1507 */
stp_island_check(void)1508 void stp_island_check(void)
1509 {
1510 disable_sync_clock(NULL);
1511 queue_work(time_sync_wq, &stp_work);
1512 }
1513
1514
stp_sync_clock(void * data)1515 static int stp_sync_clock(void *data)
1516 {
1517 static int first;
1518 unsigned long long old_clock, delta;
1519 struct clock_sync_data *stp_sync;
1520 int rc;
1521
1522 stp_sync = data;
1523
1524 if (xchg(&first, 1) == 1) {
1525 /* Slave */
1526 clock_sync_cpu(stp_sync);
1527 return 0;
1528 }
1529
1530 /* Wait until all other cpus entered the sync function. */
1531 while (atomic_read(&stp_sync->cpus) != 0)
1532 cpu_relax();
1533
1534 enable_sync_clock();
1535
1536 rc = 0;
1537 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1538 stp_info.todoff[2] || stp_info.todoff[3] ||
1539 stp_info.tmd != 2) {
1540 old_clock = get_tod_clock();
1541 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1542 if (rc == 0) {
1543 delta = adjust_time(old_clock, get_tod_clock(), 0);
1544 fixup_clock_comparator(delta);
1545 rc = chsc_sstpi(stp_page, &stp_info,
1546 sizeof(struct stp_sstpi));
1547 if (rc == 0 && stp_info.tmd != 2)
1548 rc = -EAGAIN;
1549 }
1550 }
1551 if (rc) {
1552 disable_sync_clock(NULL);
1553 stp_sync->in_sync = -EAGAIN;
1554 } else
1555 stp_sync->in_sync = 1;
1556 xchg(&first, 0);
1557 return 0;
1558 }
1559
1560 /*
1561 * STP work. Check for the STP state and take over the clock
1562 * synchronization if the STP clock source is usable.
1563 */
stp_work_fn(struct work_struct * work)1564 static void stp_work_fn(struct work_struct *work)
1565 {
1566 struct clock_sync_data stp_sync;
1567 int rc;
1568
1569 /* prevent multiple execution. */
1570 mutex_lock(&stp_work_mutex);
1571
1572 if (!stp_online) {
1573 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1574 del_timer_sync(&stp_timer);
1575 goto out_unlock;
1576 }
1577
1578 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1579 if (rc)
1580 goto out_unlock;
1581
1582 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1583 if (rc || stp_info.c == 0)
1584 goto out_unlock;
1585
1586 /* Skip synchronization if the clock is already in sync. */
1587 if (check_sync_clock())
1588 goto out_unlock;
1589
1590 memset(&stp_sync, 0, sizeof(stp_sync));
1591 get_online_cpus();
1592 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1593 stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
1594 put_online_cpus();
1595
1596 if (!check_sync_clock())
1597 /*
1598 * There is a usable clock but the synchonization failed.
1599 * Retry after a second.
1600 */
1601 mod_timer(&stp_timer, jiffies + HZ);
1602
1603 out_unlock:
1604 mutex_unlock(&stp_work_mutex);
1605 }
1606
1607 /*
1608 * STP subsys sysfs interface functions
1609 */
1610 static struct bus_type stp_subsys = {
1611 .name = "stp",
1612 .dev_name = "stp",
1613 };
1614
stp_ctn_id_show(struct device * dev,struct device_attribute * attr,char * buf)1615 static ssize_t stp_ctn_id_show(struct device *dev,
1616 struct device_attribute *attr,
1617 char *buf)
1618 {
1619 if (!stp_online)
1620 return -ENODATA;
1621 return sprintf(buf, "%016llx\n",
1622 *(unsigned long long *) stp_info.ctnid);
1623 }
1624
1625 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1626
stp_ctn_type_show(struct device * dev,struct device_attribute * attr,char * buf)1627 static ssize_t stp_ctn_type_show(struct device *dev,
1628 struct device_attribute *attr,
1629 char *buf)
1630 {
1631 if (!stp_online)
1632 return -ENODATA;
1633 return sprintf(buf, "%i\n", stp_info.ctn);
1634 }
1635
1636 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1637
stp_dst_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1638 static ssize_t stp_dst_offset_show(struct device *dev,
1639 struct device_attribute *attr,
1640 char *buf)
1641 {
1642 if (!stp_online || !(stp_info.vbits & 0x2000))
1643 return -ENODATA;
1644 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1645 }
1646
1647 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1648
stp_leap_seconds_show(struct device * dev,struct device_attribute * attr,char * buf)1649 static ssize_t stp_leap_seconds_show(struct device *dev,
1650 struct device_attribute *attr,
1651 char *buf)
1652 {
1653 if (!stp_online || !(stp_info.vbits & 0x8000))
1654 return -ENODATA;
1655 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1656 }
1657
1658 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1659
stp_stratum_show(struct device * dev,struct device_attribute * attr,char * buf)1660 static ssize_t stp_stratum_show(struct device *dev,
1661 struct device_attribute *attr,
1662 char *buf)
1663 {
1664 if (!stp_online)
1665 return -ENODATA;
1666 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1667 }
1668
1669 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
1670
stp_time_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1671 static ssize_t stp_time_offset_show(struct device *dev,
1672 struct device_attribute *attr,
1673 char *buf)
1674 {
1675 if (!stp_online || !(stp_info.vbits & 0x0800))
1676 return -ENODATA;
1677 return sprintf(buf, "%i\n", (int) stp_info.tto);
1678 }
1679
1680 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1681
stp_time_zone_offset_show(struct device * dev,struct device_attribute * attr,char * buf)1682 static ssize_t stp_time_zone_offset_show(struct device *dev,
1683 struct device_attribute *attr,
1684 char *buf)
1685 {
1686 if (!stp_online || !(stp_info.vbits & 0x4000))
1687 return -ENODATA;
1688 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1689 }
1690
1691 static DEVICE_ATTR(time_zone_offset, 0400,
1692 stp_time_zone_offset_show, NULL);
1693
stp_timing_mode_show(struct device * dev,struct device_attribute * attr,char * buf)1694 static ssize_t stp_timing_mode_show(struct device *dev,
1695 struct device_attribute *attr,
1696 char *buf)
1697 {
1698 if (!stp_online)
1699 return -ENODATA;
1700 return sprintf(buf, "%i\n", stp_info.tmd);
1701 }
1702
1703 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1704
stp_timing_state_show(struct device * dev,struct device_attribute * attr,char * buf)1705 static ssize_t stp_timing_state_show(struct device *dev,
1706 struct device_attribute *attr,
1707 char *buf)
1708 {
1709 if (!stp_online)
1710 return -ENODATA;
1711 return sprintf(buf, "%i\n", stp_info.tst);
1712 }
1713
1714 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1715
stp_online_show(struct device * dev,struct device_attribute * attr,char * buf)1716 static ssize_t stp_online_show(struct device *dev,
1717 struct device_attribute *attr,
1718 char *buf)
1719 {
1720 return sprintf(buf, "%i\n", stp_online);
1721 }
1722
stp_online_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1723 static ssize_t stp_online_store(struct device *dev,
1724 struct device_attribute *attr,
1725 const char *buf, size_t count)
1726 {
1727 unsigned int value;
1728
1729 value = simple_strtoul(buf, NULL, 0);
1730 if (value != 0 && value != 1)
1731 return -EINVAL;
1732 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1733 return -EOPNOTSUPP;
1734 mutex_lock(&clock_sync_mutex);
1735 stp_online = value;
1736 if (stp_online)
1737 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1738 else
1739 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1740 queue_work(time_sync_wq, &stp_work);
1741 mutex_unlock(&clock_sync_mutex);
1742 return count;
1743 }
1744
1745 /*
1746 * Can't use DEVICE_ATTR because the attribute should be named
1747 * stp/online but dev_attr_online already exists in this file ..
1748 */
1749 static struct device_attribute dev_attr_stp_online = {
1750 .attr = { .name = "online", .mode = 0600 },
1751 .show = stp_online_show,
1752 .store = stp_online_store,
1753 };
1754
1755 static struct device_attribute *stp_attributes[] = {
1756 &dev_attr_ctn_id,
1757 &dev_attr_ctn_type,
1758 &dev_attr_dst_offset,
1759 &dev_attr_leap_seconds,
1760 &dev_attr_stp_online,
1761 &dev_attr_stratum,
1762 &dev_attr_time_offset,
1763 &dev_attr_time_zone_offset,
1764 &dev_attr_timing_mode,
1765 &dev_attr_timing_state,
1766 NULL
1767 };
1768
stp_init_sysfs(void)1769 static int __init stp_init_sysfs(void)
1770 {
1771 struct device_attribute **attr;
1772 int rc;
1773
1774 rc = subsys_system_register(&stp_subsys, NULL);
1775 if (rc)
1776 goto out;
1777 for (attr = stp_attributes; *attr; attr++) {
1778 rc = device_create_file(stp_subsys.dev_root, *attr);
1779 if (rc)
1780 goto out_unreg;
1781 }
1782 return 0;
1783 out_unreg:
1784 for (; attr >= stp_attributes; attr--)
1785 device_remove_file(stp_subsys.dev_root, *attr);
1786 bus_unregister(&stp_subsys);
1787 out:
1788 return rc;
1789 }
1790
1791 device_initcall(stp_init_sysfs);
1792