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1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This header defines architecture specific interfaces, x86 version
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2.  See
7  * the COPYING file in the top-level directory.
8  *
9  */
10 
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13 
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 #include <linux/pvclock_gtod.h>
26 #include <linux/clocksource.h>
27 
28 #include <asm/pvclock-abi.h>
29 #include <asm/desc.h>
30 #include <asm/mtrr.h>
31 #include <asm/msr-index.h>
32 #include <asm/asm.h>
33 
34 #define KVM_MAX_VCPUS 255
35 #define KVM_SOFT_MAX_VCPUS 160
36 #define KVM_USER_MEM_SLOTS 125
37 /* memory slots that are not exposed to userspace */
38 #define KVM_PRIVATE_MEM_SLOTS 3
39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
40 
41 #define KVM_MMIO_SIZE 16
42 
43 #define KVM_PIO_PAGE_OFFSET 1
44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
45 
46 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
47 
48 #define CR0_RESERVED_BITS                                               \
49 	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
50 			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
51 			  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
52 
53 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
54 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
55 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL
56 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS |	\
57 				  0xFFFFFF0000000000ULL)
58 #define CR4_RESERVED_BITS                                               \
59 	(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
60 			  | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
61 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
62 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
63 			  | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
64 
65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
66 
67 
68 
69 #define INVALID_PAGE (~(hpa_t)0)
70 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
71 
72 #define UNMAPPED_GVA (~(gpa_t)0)
73 
74 /* KVM Hugepage definitions for x86 */
75 #define KVM_NR_PAGE_SIZES	3
76 #define KVM_HPAGE_GFN_SHIFT(x)	(((x) - 1) * 9)
77 #define KVM_HPAGE_SHIFT(x)	(PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
78 #define KVM_HPAGE_SIZE(x)	(1UL << KVM_HPAGE_SHIFT(x))
79 #define KVM_HPAGE_MASK(x)	(~(KVM_HPAGE_SIZE(x) - 1))
80 #define KVM_PAGES_PER_HPAGE(x)	(KVM_HPAGE_SIZE(x) / PAGE_SIZE)
81 
82 #define SELECTOR_TI_MASK (1 << 2)
83 #define SELECTOR_RPL_MASK 0x03
84 
85 #define IOPL_SHIFT 12
86 
87 #define KVM_PERMILLE_MMU_PAGES 20
88 #define KVM_MIN_ALLOC_MMU_PAGES 64
89 #define KVM_MMU_HASH_SHIFT 10
90 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
91 #define KVM_MIN_FREE_MMU_PAGES 5
92 #define KVM_REFILL_PAGES 25
93 #define KVM_MAX_CPUID_ENTRIES 80
94 #define KVM_NR_FIXED_MTRR_REGION 88
95 #define KVM_NR_VAR_MTRR 8
96 
97 #define ASYNC_PF_PER_VCPU 64
98 
99 struct kvm_vcpu;
100 struct kvm;
101 struct kvm_async_pf;
102 
103 enum kvm_reg {
104 	VCPU_REGS_RAX = 0,
105 	VCPU_REGS_RCX = 1,
106 	VCPU_REGS_RDX = 2,
107 	VCPU_REGS_RBX = 3,
108 	VCPU_REGS_RSP = 4,
109 	VCPU_REGS_RBP = 5,
110 	VCPU_REGS_RSI = 6,
111 	VCPU_REGS_RDI = 7,
112 #ifdef CONFIG_X86_64
113 	VCPU_REGS_R8 = 8,
114 	VCPU_REGS_R9 = 9,
115 	VCPU_REGS_R10 = 10,
116 	VCPU_REGS_R11 = 11,
117 	VCPU_REGS_R12 = 12,
118 	VCPU_REGS_R13 = 13,
119 	VCPU_REGS_R14 = 14,
120 	VCPU_REGS_R15 = 15,
121 #endif
122 	VCPU_REGS_RIP,
123 	NR_VCPU_REGS
124 };
125 
126 enum kvm_reg_ex {
127 	VCPU_EXREG_PDPTR = NR_VCPU_REGS,
128 	VCPU_EXREG_CR3,
129 	VCPU_EXREG_RFLAGS,
130 	VCPU_EXREG_CPL,
131 	VCPU_EXREG_SEGMENTS,
132 };
133 
134 enum {
135 	VCPU_SREG_ES,
136 	VCPU_SREG_CS,
137 	VCPU_SREG_SS,
138 	VCPU_SREG_DS,
139 	VCPU_SREG_FS,
140 	VCPU_SREG_GS,
141 	VCPU_SREG_TR,
142 	VCPU_SREG_LDTR,
143 };
144 
145 #include <asm/kvm_emulate.h>
146 
147 #define KVM_NR_MEM_OBJS 40
148 
149 #define KVM_NR_DB_REGS	4
150 
151 #define DR6_BD		(1 << 13)
152 #define DR6_BS		(1 << 14)
153 #define DR6_FIXED_1	0xffff0ff0
154 #define DR6_VOLATILE	0x0000e00f
155 
156 #define DR7_BP_EN_MASK	0x000000ff
157 #define DR7_GE		(1 << 9)
158 #define DR7_GD		(1 << 13)
159 #define DR7_FIXED_1	0x00000400
160 #define DR7_VOLATILE	0xffff23ff
161 
162 /* apic attention bits */
163 #define KVM_APIC_CHECK_VAPIC	0
164 /*
165  * The following bit is set with PV-EOI, unset on EOI.
166  * We detect PV-EOI changes by guest by comparing
167  * this bit with PV-EOI in guest memory.
168  * See the implementation in apic_update_pv_eoi.
169  */
170 #define KVM_APIC_PV_EOI_PENDING	1
171 
172 /*
173  * We don't want allocation failures within the mmu code, so we preallocate
174  * enough memory for a single page fault in a cache.
175  */
176 struct kvm_mmu_memory_cache {
177 	int nobjs;
178 	void *objects[KVM_NR_MEM_OBJS];
179 };
180 
181 /*
182  * kvm_mmu_page_role, below, is defined as:
183  *
184  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
185  *   bits 4:7 - page table level for this shadow (1-4)
186  *   bits 8:9 - page table quadrant for 2-level guests
187  *   bit   16 - direct mapping of virtual to physical mapping at gfn
188  *              used for real mode and two-dimensional paging
189  *   bits 17:19 - common access permissions for all ptes in this shadow page
190  */
191 union kvm_mmu_page_role {
192 	unsigned word;
193 	struct {
194 		unsigned level:4;
195 		unsigned cr4_pae:1;
196 		unsigned quadrant:2;
197 		unsigned pad_for_nice_hex_output:6;
198 		unsigned direct:1;
199 		unsigned access:3;
200 		unsigned invalid:1;
201 		unsigned nxe:1;
202 		unsigned cr0_wp:1;
203 		unsigned smep_andnot_wp:1;
204 	};
205 };
206 
207 struct kvm_mmu_page {
208 	struct list_head link;
209 	struct hlist_node hash_link;
210 
211 	/*
212 	 * The following two entries are used to key the shadow page in the
213 	 * hash table.
214 	 */
215 	gfn_t gfn;
216 	union kvm_mmu_page_role role;
217 
218 	u64 *spt;
219 	/* hold the gfn of each spte inside spt */
220 	gfn_t *gfns;
221 	bool unsync;
222 	int root_count;          /* Currently serving as active root */
223 	unsigned int unsync_children;
224 	unsigned long parent_ptes;	/* Reverse mapping for parent_pte */
225 	DECLARE_BITMAP(unsync_child_bitmap, 512);
226 
227 #ifdef CONFIG_X86_32
228 	int clear_spte_count;
229 #endif
230 
231 	int write_flooding_count;
232 	bool mmio_cached;
233 };
234 
235 struct kvm_pio_request {
236 	unsigned long count;
237 	int in;
238 	int port;
239 	int size;
240 };
241 
242 /*
243  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
244  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
245  * mode.
246  */
247 struct kvm_mmu {
248 	void (*new_cr3)(struct kvm_vcpu *vcpu);
249 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
250 	unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
251 	u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
252 	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
253 			  bool prefault);
254 	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
255 				  struct x86_exception *fault);
256 	void (*free)(struct kvm_vcpu *vcpu);
257 	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
258 			    struct x86_exception *exception);
259 	gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
260 	int (*sync_page)(struct kvm_vcpu *vcpu,
261 			 struct kvm_mmu_page *sp);
262 	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
263 	void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
264 			   u64 *spte, const void *pte);
265 	hpa_t root_hpa;
266 	int root_level;
267 	int shadow_root_level;
268 	union kvm_mmu_page_role base_role;
269 	bool direct_map;
270 
271 	/*
272 	 * Bitmap; bit set = permission fault
273 	 * Byte index: page fault error code [4:1]
274 	 * Bit index: pte permissions in ACC_* format
275 	 */
276 	u8 permissions[16];
277 
278 	u64 *pae_root;
279 	u64 *lm_root;
280 	u64 rsvd_bits_mask[2][4];
281 
282 	/*
283 	 * Bitmap: bit set = last pte in walk
284 	 * index[0:1]: level (zero-based)
285 	 * index[2]: pte.ps
286 	 */
287 	u8 last_pte_bitmap;
288 
289 	bool nx;
290 
291 	u64 pdptrs[4]; /* pae */
292 };
293 
294 enum pmc_type {
295 	KVM_PMC_GP = 0,
296 	KVM_PMC_FIXED,
297 };
298 
299 struct kvm_pmc {
300 	enum pmc_type type;
301 	u8 idx;
302 	u64 counter;
303 	u64 eventsel;
304 	struct perf_event *perf_event;
305 	struct kvm_vcpu *vcpu;
306 };
307 
308 struct kvm_pmu {
309 	unsigned nr_arch_gp_counters;
310 	unsigned nr_arch_fixed_counters;
311 	unsigned available_event_types;
312 	u64 fixed_ctr_ctrl;
313 	u64 global_ctrl;
314 	u64 global_status;
315 	u64 global_ovf_ctrl;
316 	u64 counter_bitmask[2];
317 	u64 global_ctrl_mask;
318 	u8 version;
319 	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
320 	struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
321 	struct irq_work irq_work;
322 	u64 reprogram_pmi;
323 };
324 
325 struct kvm_vcpu_arch {
326 	/*
327 	 * rip and regs accesses must go through
328 	 * kvm_{register,rip}_{read,write} functions.
329 	 */
330 	unsigned long regs[NR_VCPU_REGS];
331 	u32 regs_avail;
332 	u32 regs_dirty;
333 
334 	unsigned long cr0;
335 	unsigned long cr0_guest_owned_bits;
336 	unsigned long cr2;
337 	unsigned long cr3;
338 	unsigned long cr4;
339 	unsigned long cr4_guest_owned_bits;
340 	unsigned long cr8;
341 	u32 hflags;
342 	u64 efer;
343 	u64 apic_base;
344 	struct kvm_lapic *apic;    /* kernel irqchip context */
345 	unsigned long apic_attention;
346 	int32_t apic_arb_prio;
347 	int mp_state;
348 	u64 ia32_misc_enable_msr;
349 	bool tpr_access_reporting;
350 
351 	/*
352 	 * Paging state of the vcpu
353 	 *
354 	 * If the vcpu runs in guest mode with two level paging this still saves
355 	 * the paging mode of the l1 guest. This context is always used to
356 	 * handle faults.
357 	 */
358 	struct kvm_mmu mmu;
359 
360 	/*
361 	 * Paging state of an L2 guest (used for nested npt)
362 	 *
363 	 * This context will save all necessary information to walk page tables
364 	 * of the an L2 guest. This context is only initialized for page table
365 	 * walking and not for faulting since we never handle l2 page faults on
366 	 * the host.
367 	 */
368 	struct kvm_mmu nested_mmu;
369 
370 	/*
371 	 * Pointer to the mmu context currently used for
372 	 * gva_to_gpa translations.
373 	 */
374 	struct kvm_mmu *walk_mmu;
375 
376 	struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
377 	struct kvm_mmu_memory_cache mmu_page_cache;
378 	struct kvm_mmu_memory_cache mmu_page_header_cache;
379 
380 	struct fpu guest_fpu;
381 	u64 xcr0;
382 
383 	struct kvm_pio_request pio;
384 	void *pio_data;
385 
386 	u8 event_exit_inst_len;
387 
388 	struct kvm_queued_exception {
389 		bool pending;
390 		bool has_error_code;
391 		bool reinject;
392 		u8 nr;
393 		u32 error_code;
394 	} exception;
395 
396 	struct kvm_queued_interrupt {
397 		bool pending;
398 		bool soft;
399 		u8 nr;
400 	} interrupt;
401 
402 	int halt_request; /* real mode on Intel only */
403 
404 	int cpuid_nent;
405 	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
406 	/* emulate context */
407 
408 	struct x86_emulate_ctxt emulate_ctxt;
409 	bool emulate_regs_need_sync_to_vcpu;
410 	bool emulate_regs_need_sync_from_vcpu;
411 	int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
412 
413 	gpa_t time;
414 	struct pvclock_vcpu_time_info hv_clock;
415 	unsigned int hw_tsc_khz;
416 	struct gfn_to_hva_cache pv_time;
417 	bool pv_time_enabled;
418 	/* set guest stopped flag in pvclock flags field */
419 	bool pvclock_set_guest_stopped_request;
420 
421 	struct {
422 		u64 msr_val;
423 		u64 last_steal;
424 		u64 accum_steal;
425 		struct gfn_to_hva_cache stime;
426 		struct kvm_steal_time steal;
427 	} st;
428 
429 	u64 last_guest_tsc;
430 	u64 last_kernel_ns;
431 	u64 last_host_tsc;
432 	u64 tsc_offset_adjustment;
433 	u64 this_tsc_nsec;
434 	u64 this_tsc_write;
435 	u8  this_tsc_generation;
436 	bool tsc_catchup;
437 	bool tsc_always_catchup;
438 	s8 virtual_tsc_shift;
439 	u32 virtual_tsc_mult;
440 	u32 virtual_tsc_khz;
441 	s64 ia32_tsc_adjust_msr;
442 
443 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
444 	unsigned nmi_pending; /* NMI queued after currently running handler */
445 	bool nmi_injected;    /* Trying to inject an NMI this entry */
446 
447 	struct mtrr_state_type mtrr_state;
448 	u32 pat;
449 
450 	int switch_db_regs;
451 	unsigned long db[KVM_NR_DB_REGS];
452 	unsigned long dr6;
453 	unsigned long dr7;
454 	unsigned long eff_db[KVM_NR_DB_REGS];
455 	unsigned long guest_debug_dr7;
456 
457 	u64 mcg_cap;
458 	u64 mcg_status;
459 	u64 mcg_ctl;
460 	u64 *mce_banks;
461 
462 	/* Cache MMIO info */
463 	u64 mmio_gva;
464 	unsigned access;
465 	gfn_t mmio_gfn;
466 
467 	struct kvm_pmu pmu;
468 
469 	/* used for guest single stepping over the given code position */
470 	unsigned long singlestep_rip;
471 
472 	/* fields used by HYPER-V emulation */
473 	u64 hv_vapic;
474 
475 	cpumask_var_t wbinvd_dirty_mask;
476 
477 	unsigned long last_retry_eip;
478 	unsigned long last_retry_addr;
479 
480 	struct {
481 		bool halted;
482 		gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
483 		struct gfn_to_hva_cache data;
484 		u64 msr_val;
485 		u32 id;
486 		bool send_user_only;
487 	} apf;
488 
489 	/* OSVW MSRs (AMD only) */
490 	struct {
491 		u64 length;
492 		u64 status;
493 	} osvw;
494 
495 	struct {
496 		u64 msr_val;
497 		struct gfn_to_hva_cache data;
498 	} pv_eoi;
499 
500 	/*
501 	 * Indicate whether the access faults on its page table in guest
502 	 * which is set when fix page fault and used to detect unhandeable
503 	 * instruction.
504 	 */
505 	bool write_fault_to_shadow_pgtable;
506 };
507 
508 struct kvm_lpage_info {
509 	int write_count;
510 };
511 
512 struct kvm_arch_memory_slot {
513 	unsigned long *rmap[KVM_NR_PAGE_SIZES];
514 	struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
515 };
516 
517 struct kvm_apic_map {
518 	struct rcu_head rcu;
519 	u8 ldr_bits;
520 	/* fields bellow are used to decode ldr values in different modes */
521 	u32 cid_shift, cid_mask, lid_mask;
522 	struct kvm_lapic *phys_map[256];
523 	/* first index is cluster id second is cpu id in a cluster */
524 	struct kvm_lapic *logical_map[16][16];
525 };
526 
527 struct kvm_arch {
528 	unsigned int n_used_mmu_pages;
529 	unsigned int n_requested_mmu_pages;
530 	unsigned int n_max_mmu_pages;
531 	unsigned int indirect_shadow_pages;
532 	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
533 	/*
534 	 * Hash table of struct kvm_mmu_page.
535 	 */
536 	struct list_head active_mmu_pages;
537 	struct list_head assigned_dev_head;
538 	struct iommu_domain *iommu_domain;
539 	int iommu_flags;
540 	struct kvm_pic *vpic;
541 	struct kvm_ioapic *vioapic;
542 	struct kvm_pit *vpit;
543 	int vapics_in_nmi_mode;
544 	struct mutex apic_map_lock;
545 	struct kvm_apic_map *apic_map;
546 
547 	unsigned int tss_addr;
548 	struct page *apic_access_page;
549 
550 	gpa_t wall_clock;
551 
552 	struct page *ept_identity_pagetable;
553 	bool ept_identity_pagetable_done;
554 	gpa_t ept_identity_map_addr;
555 
556 	unsigned long irq_sources_bitmap;
557 	s64 kvmclock_offset;
558 	raw_spinlock_t tsc_write_lock;
559 	u64 last_tsc_nsec;
560 	u64 last_tsc_write;
561 	u32 last_tsc_khz;
562 	u64 cur_tsc_nsec;
563 	u64 cur_tsc_write;
564 	u64 cur_tsc_offset;
565 	u8  cur_tsc_generation;
566 	int nr_vcpus_matched_tsc;
567 
568 	spinlock_t pvclock_gtod_sync_lock;
569 	bool use_master_clock;
570 	u64 master_kernel_ns;
571 	cycle_t master_cycle_now;
572 
573 	struct kvm_xen_hvm_config xen_hvm_config;
574 
575 	/* fields used by HYPER-V emulation */
576 	u64 hv_guest_os_id;
577 	u64 hv_hypercall;
578 
579 	#ifdef CONFIG_KVM_MMU_AUDIT
580 	int audit_point;
581 	#endif
582 };
583 
584 struct kvm_vm_stat {
585 	u32 mmu_shadow_zapped;
586 	u32 mmu_pte_write;
587 	u32 mmu_pte_updated;
588 	u32 mmu_pde_zapped;
589 	u32 mmu_flooded;
590 	u32 mmu_recycled;
591 	u32 mmu_cache_miss;
592 	u32 mmu_unsync;
593 	u32 remote_tlb_flush;
594 	u32 lpages;
595 };
596 
597 struct kvm_vcpu_stat {
598 	u32 pf_fixed;
599 	u32 pf_guest;
600 	u32 tlb_flush;
601 	u32 invlpg;
602 
603 	u32 exits;
604 	u32 io_exits;
605 	u32 mmio_exits;
606 	u32 signal_exits;
607 	u32 irq_window_exits;
608 	u32 nmi_window_exits;
609 	u32 halt_exits;
610 	u32 halt_wakeup;
611 	u32 request_irq_exits;
612 	u32 irq_exits;
613 	u32 host_state_reload;
614 	u32 efer_reload;
615 	u32 fpu_reload;
616 	u32 insn_emulation;
617 	u32 insn_emulation_fail;
618 	u32 hypercalls;
619 	u32 irq_injections;
620 	u32 nmi_injections;
621 };
622 
623 struct x86_instruction_info;
624 
625 struct msr_data {
626 	bool host_initiated;
627 	u32 index;
628 	u64 data;
629 };
630 
631 struct kvm_x86_ops {
632 	int (*cpu_has_kvm_support)(void);          /* __init */
633 	int (*disabled_by_bios)(void);             /* __init */
634 	int (*hardware_enable)(void *dummy);
635 	void (*hardware_disable)(void *dummy);
636 	void (*check_processor_compatibility)(void *rtn);
637 	int (*hardware_setup)(void);               /* __init */
638 	void (*hardware_unsetup)(void);            /* __exit */
639 	bool (*cpu_has_accelerated_tpr)(void);
640 	void (*cpuid_update)(struct kvm_vcpu *vcpu);
641 
642 	/* Create, but do not attach this VCPU */
643 	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
644 	void (*vcpu_free)(struct kvm_vcpu *vcpu);
645 	void (*vcpu_reset)(struct kvm_vcpu *vcpu);
646 
647 	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
648 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
649 	void (*vcpu_put)(struct kvm_vcpu *vcpu);
650 
651 	void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
652 	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
653 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
654 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
655 	void (*get_segment)(struct kvm_vcpu *vcpu,
656 			    struct kvm_segment *var, int seg);
657 	int (*get_cpl)(struct kvm_vcpu *vcpu);
658 	void (*set_segment)(struct kvm_vcpu *vcpu,
659 			    struct kvm_segment *var, int seg);
660 	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
661 	void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
662 	void (*decache_cr3)(struct kvm_vcpu *vcpu);
663 	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
664 	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
665 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
666 	int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
667 	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
668 	void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
669 	void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
670 	void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
671 	void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
672 	void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
673 	void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
674 	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
675 	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
676 	void (*fpu_activate)(struct kvm_vcpu *vcpu);
677 	void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
678 
679 	void (*tlb_flush)(struct kvm_vcpu *vcpu);
680 
681 	void (*run)(struct kvm_vcpu *vcpu);
682 	int (*handle_exit)(struct kvm_vcpu *vcpu);
683 	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
684 	void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
685 	u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
686 	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
687 				unsigned char *hypercall_addr);
688 	void (*set_irq)(struct kvm_vcpu *vcpu);
689 	void (*set_nmi)(struct kvm_vcpu *vcpu);
690 	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
691 				bool has_error_code, u32 error_code,
692 				bool reinject);
693 	void (*cancel_injection)(struct kvm_vcpu *vcpu);
694 	int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
695 	int (*nmi_allowed)(struct kvm_vcpu *vcpu);
696 	bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
697 	void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
698 	int (*enable_nmi_window)(struct kvm_vcpu *vcpu);
699 	int (*enable_irq_window)(struct kvm_vcpu *vcpu);
700 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
701 	int (*vm_has_apicv)(struct kvm *kvm);
702 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
703 	void (*hwapic_isr_update)(struct kvm *kvm, int isr);
704 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
705 	void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
706 	void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
707 	void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
708 	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
709 	int (*get_tdp_level)(void);
710 	u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
711 	int (*get_lpage_level)(void);
712 	bool (*rdtscp_supported)(void);
713 	bool (*invpcid_supported)(void);
714 	void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
715 
716 	void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
717 
718 	void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
719 
720 	bool (*has_wbinvd_exit)(void);
721 
722 	void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
723 	u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
724 	void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
725 
726 	u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
727 	u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
728 
729 	void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
730 
731 	int (*check_intercept)(struct kvm_vcpu *vcpu,
732 			       struct x86_instruction_info *info,
733 			       enum x86_intercept_stage stage);
734 	void (*handle_external_intr)(struct kvm_vcpu *vcpu);
735 };
736 
737 struct kvm_arch_async_pf {
738 	u32 token;
739 	gfn_t gfn;
740 	unsigned long cr3;
741 	bool direct_map;
742 };
743 
744 extern struct kvm_x86_ops *kvm_x86_ops;
745 
adjust_tsc_offset_guest(struct kvm_vcpu * vcpu,s64 adjustment)746 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
747 					   s64 adjustment)
748 {
749 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
750 }
751 
adjust_tsc_offset_host(struct kvm_vcpu * vcpu,s64 adjustment)752 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
753 {
754 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
755 }
756 
757 int kvm_mmu_module_init(void);
758 void kvm_mmu_module_exit(void);
759 
760 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
761 int kvm_mmu_create(struct kvm_vcpu *vcpu);
762 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
763 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
764 		u64 dirty_mask, u64 nx_mask, u64 x_mask);
765 
766 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
767 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
768 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
769 				     struct kvm_memory_slot *slot,
770 				     gfn_t gfn_offset, unsigned long mask);
771 void kvm_mmu_zap_all(struct kvm *kvm);
772 void kvm_mmu_zap_mmio_sptes(struct kvm *kvm);
773 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
774 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
775 
776 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
777 
778 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
779 			  const void *val, int bytes);
780 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
781 
782 extern bool tdp_enabled;
783 
784 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
785 
786 /* control of guest tsc rate supported? */
787 extern bool kvm_has_tsc_control;
788 /* minimum supported tsc_khz for guests */
789 extern u32  kvm_min_guest_tsc_khz;
790 /* maximum supported tsc_khz for guests */
791 extern u32  kvm_max_guest_tsc_khz;
792 
793 enum emulation_result {
794 	EMULATE_DONE,       /* no further processing */
795 	EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
796 	EMULATE_FAIL,         /* can't emulate this instruction */
797 };
798 
799 #define EMULTYPE_NO_DECODE	    (1 << 0)
800 #define EMULTYPE_TRAP_UD	    (1 << 1)
801 #define EMULTYPE_SKIP		    (1 << 2)
802 #define EMULTYPE_RETRY		    (1 << 3)
803 #define EMULTYPE_NO_REEXECUTE	    (1 << 4)
804 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
805 			    int emulation_type, void *insn, int insn_len);
806 
emulate_instruction(struct kvm_vcpu * vcpu,int emulation_type)807 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
808 			int emulation_type)
809 {
810 	return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
811 }
812 
813 void kvm_enable_efer_bits(u64);
814 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
815 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
816 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
817 
818 struct x86_emulate_ctxt;
819 
820 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
821 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
822 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
823 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
824 
825 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
826 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
827 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector);
828 
829 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
830 		    int reason, bool has_error_code, u32 error_code);
831 
832 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
833 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
834 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
835 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
836 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
837 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
838 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
839 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
840 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
841 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
842 
843 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
844 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
845 
846 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
847 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
848 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
849 
850 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
851 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
852 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
853 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
854 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
855 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
856 			    gfn_t gfn, void *data, int offset, int len,
857 			    u32 access);
858 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
859 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
860 
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)861 static inline int __kvm_irq_line_state(unsigned long *irq_state,
862 				       int irq_source_id, int level)
863 {
864 	/* Logical OR for level trig interrupt */
865 	if (level)
866 		__set_bit(irq_source_id, irq_state);
867 	else
868 		__clear_bit(irq_source_id, irq_state);
869 
870 	return !!(*irq_state);
871 }
872 
873 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
874 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
875 
876 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
877 
878 int fx_init(struct kvm_vcpu *vcpu);
879 
880 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
881 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
882 		       const u8 *new, int bytes);
883 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
884 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
885 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
886 int kvm_mmu_load(struct kvm_vcpu *vcpu);
887 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
888 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
889 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
890 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
891 			      struct x86_exception *exception);
892 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
893 			       struct x86_exception *exception);
894 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
895 			       struct x86_exception *exception);
896 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
897 				struct x86_exception *exception);
898 
899 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
900 
901 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
902 		       void *insn, int insn_len);
903 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
904 
905 void kvm_enable_tdp(void);
906 void kvm_disable_tdp(void);
907 
908 int complete_pio(struct kvm_vcpu *vcpu);
909 bool kvm_check_iopl(struct kvm_vcpu *vcpu);
910 
translate_gpa(struct kvm_vcpu * vcpu,gpa_t gpa,u32 access)911 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
912 {
913 	return gpa;
914 }
915 
page_header(hpa_t shadow_page)916 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
917 {
918 	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
919 
920 	return (struct kvm_mmu_page *)page_private(page);
921 }
922 
kvm_read_ldt(void)923 static inline u16 kvm_read_ldt(void)
924 {
925 	u16 ldt;
926 	asm("sldt %0" : "=g"(ldt));
927 	return ldt;
928 }
929 
kvm_load_ldt(u16 sel)930 static inline void kvm_load_ldt(u16 sel)
931 {
932 	asm("lldt %0" : : "rm"(sel));
933 }
934 
935 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)936 static inline unsigned long read_msr(unsigned long msr)
937 {
938 	u64 value;
939 
940 	rdmsrl(msr, value);
941 	return value;
942 }
943 #endif
944 
get_rdx_init_val(void)945 static inline u32 get_rdx_init_val(void)
946 {
947 	return 0x600; /* P6 family */
948 }
949 
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)950 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
951 {
952 	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
953 }
954 
955 #define TSS_IOPB_BASE_OFFSET 0x66
956 #define TSS_BASE_SIZE 0x68
957 #define TSS_IOPB_SIZE (65536 / 8)
958 #define TSS_REDIRECTION_SIZE (256 / 8)
959 #define RMODE_TSS_SIZE							\
960 	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
961 
962 enum {
963 	TASK_SWITCH_CALL = 0,
964 	TASK_SWITCH_IRET = 1,
965 	TASK_SWITCH_JMP = 2,
966 	TASK_SWITCH_GATE = 3,
967 };
968 
969 #define HF_GIF_MASK		(1 << 0)
970 #define HF_HIF_MASK		(1 << 1)
971 #define HF_VINTR_MASK		(1 << 2)
972 #define HF_NMI_MASK		(1 << 3)
973 #define HF_IRET_MASK		(1 << 4)
974 #define HF_GUEST_MASK		(1 << 5) /* VCPU is in guest-mode */
975 
976 /*
977  * Hardware virtualization extension instructions may fault if a
978  * reboot turns off virtualization while processes are running.
979  * Trap the fault and ignore the instruction if that happens.
980  */
981 asmlinkage void kvm_spurious_fault(void);
982 
983 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)	\
984 	"666: " insn "\n\t" \
985 	"668: \n\t"                           \
986 	".pushsection .fixup, \"ax\" \n" \
987 	"667: \n\t" \
988 	cleanup_insn "\n\t"		      \
989 	"cmpb $0, kvm_rebooting \n\t"	      \
990 	"jne 668b \n\t"      		      \
991 	__ASM_SIZE(push) " $666b \n\t"	      \
992 	"call kvm_spurious_fault \n\t"	      \
993 	".popsection \n\t" \
994 	_ASM_EXTABLE(666b, 667b)
995 
996 #define __kvm_handle_fault_on_reboot(insn)		\
997 	____kvm_handle_fault_on_reboot(insn, "")
998 
999 #define KVM_ARCH_WANT_MMU_NOTIFIER
1000 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1001 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1002 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
1003 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1004 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1005 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
1006 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1007 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1008 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1009 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1010 void kvm_vcpu_reset(struct kvm_vcpu *vcpu);
1011 
1012 void kvm_define_shared_msr(unsigned index, u32 msr);
1013 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1014 
1015 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1016 
1017 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1018 				     struct kvm_async_pf *work);
1019 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1020 				 struct kvm_async_pf *work);
1021 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1022 			       struct kvm_async_pf *work);
1023 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1024 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1025 
1026 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1027 
1028 int kvm_is_in_guest(void);
1029 
1030 void kvm_pmu_init(struct kvm_vcpu *vcpu);
1031 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1032 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1033 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1034 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1035 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1036 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
1037 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1038 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1039 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1040 
1041 #endif /* _ASM_X86_KVM_HOST_H */
1042