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1 /*
2  * Copyright (C) 2001, 2002, MontaVista Software Inc.
3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4  * Copyright (c) 2003  Maciej W. Rozycki
5  *
6  * include/asm-mips/time.h
7  *     header file for the new style time.c file and time services.
8  *
9  * This program is free software; you can redistribute	it and/or modify it
10  * under  the terms of	the GNU General	 Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14 #ifndef _ASM_TIME_H
15 #define _ASM_TIME_H
16 
17 #include <linux/rtc.h>
18 #include <linux/spinlock.h>
19 #include <linux/clockchips.h>
20 #include <linux/clocksource.h>
21 #include <asm/gic.h>
22 
23 extern spinlock_t rtc_lock;
24 
25 /*
26  * RTC ops.  By default, they point to weak no-op RTC functions.
27  *	rtc_mips_set_time - reverse the above translation and set time to RTC.
28  *	rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
29  *			to be set.  Used by RTC sync-up.
30  */
31 extern int rtc_mips_set_time(unsigned long);
32 extern int rtc_mips_set_mmss(unsigned long);
33 
34 /*
35  * board specific routines required by time_init().
36  */
37 extern void plat_time_init(void);
38 
39 /*
40  * mips_hpt_frequency - must be set if you intend to use an R4k-compatible
41  * counter as a timer interrupt source.
42  */
43 extern unsigned int mips_hpt_frequency;
44 
45 /*
46  * The performance counter IRQ on MIPS is a close relative to the timer IRQ
47  * so it lives here.
48  */
49 extern int (*perf_irq)(void);
50 
51 /*
52  * Initialize the calling CPU's compare interrupt as clockevent device
53  */
54 extern unsigned int __weak get_c0_compare_int(void);
55 extern int r4k_clockevent_init(void);
56 extern int smtc_clockevent_init(void);
57 
mips_clockevent_init(void)58 static inline int mips_clockevent_init(void)
59 {
60 #ifdef CONFIG_MIPS_MT_SMTC
61 	return smtc_clockevent_init();
62 #elif defined(CONFIG_CEVT_GIC)
63 	extern int gic_clockevent_init(void);
64 
65 	gic_clockevent_init();
66 	return r4k_clockevent_init();
67 #elif defined(CONFIG_CEVT_R4K)
68 	return r4k_clockevent_init();
69 #else
70 	return -ENXIO;
71 #endif
72 }
73 
74 /*
75  * Initialize the count register as a clocksource
76  */
77 extern int init_r4k_clocksource(void);
78 
init_mips_clocksource(void)79 static inline int init_mips_clocksource(void)
80 {
81 #ifdef CONFIG_CSRC_R4K
82 	return init_r4k_clocksource();
83 #else
84 	return 0;
85 #endif
86 }
87 
clockevent_set_clock(struct clock_event_device * cd,unsigned int clock)88 static inline void clockevent_set_clock(struct clock_event_device *cd,
89 					unsigned int clock)
90 {
91 	clockevents_calc_mult_shift(cd, clock, 4);
92 }
93 
94 #endif /* _ASM_TIME_H */
95