1 /*
2 * Copyright (C) 2010 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27 #include <subdev/fb.h>
28
29 struct nv41_fb_priv {
30 struct nouveau_fb base;
31 };
32
33 int
nv41_fb_vram_init(struct nouveau_fb * pfb)34 nv41_fb_vram_init(struct nouveau_fb *pfb)
35 {
36 u32 pfb474 = nv_rd32(pfb, 0x100474);
37 if (pfb474 & 0x00000004)
38 pfb->ram.type = NV_MEM_TYPE_GDDR3;
39 if (pfb474 & 0x00000002)
40 pfb->ram.type = NV_MEM_TYPE_DDR2;
41 if (pfb474 & 0x00000001)
42 pfb->ram.type = NV_MEM_TYPE_DDR1;
43
44 pfb->ram.size = nv_rd32(pfb, 0x10020c) & 0xff000000;
45 pfb->ram.parts = (nv_rd32(pfb, 0x100200) & 0x00000003) + 1;
46 return nv_rd32(pfb, 0x100320);
47 }
48
49 void
nv41_fb_tile_prog(struct nouveau_fb * pfb,int i,struct nouveau_fb_tile * tile)50 nv41_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
51 {
52 nv_wr32(pfb, 0x100604 + (i * 0x10), tile->limit);
53 nv_wr32(pfb, 0x100608 + (i * 0x10), tile->pitch);
54 nv_wr32(pfb, 0x100600 + (i * 0x10), tile->addr);
55 nv_rd32(pfb, 0x100600 + (i * 0x10));
56 nv_wr32(pfb, 0x100700 + (i * 0x04), tile->zcomp);
57 }
58
59 int
nv41_fb_init(struct nouveau_object * object)60 nv41_fb_init(struct nouveau_object *object)
61 {
62 struct nv41_fb_priv *priv = (void *)object;
63 int ret;
64
65 ret = nouveau_fb_init(&priv->base);
66 if (ret)
67 return ret;
68
69 nv_wr32(priv, 0x100800, 0x00000001);
70 return 0;
71 }
72
73 static int
nv41_fb_ctor(struct nouveau_object * parent,struct nouveau_object * engine,struct nouveau_oclass * oclass,void * data,u32 size,struct nouveau_object ** pobject)74 nv41_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
75 struct nouveau_oclass *oclass, void *data, u32 size,
76 struct nouveau_object **pobject)
77 {
78 struct nv41_fb_priv *priv;
79 int ret;
80
81 ret = nouveau_fb_create(parent, engine, oclass, &priv);
82 *pobject = nv_object(priv);
83 if (ret)
84 return ret;
85
86 priv->base.memtype_valid = nv04_fb_memtype_valid;
87 priv->base.ram.init = nv41_fb_vram_init;
88 priv->base.tile.regions = 12;
89 priv->base.tile.init = nv30_fb_tile_init;
90 priv->base.tile.comp = nv40_fb_tile_comp;
91 priv->base.tile.fini = nv20_fb_tile_fini;
92 priv->base.tile.prog = nv41_fb_tile_prog;
93 return nouveau_fb_preinit(&priv->base);
94 }
95
96
97 struct nouveau_oclass
98 nv41_fb_oclass = {
99 .handle = NV_SUBDEV(FB, 0x41),
100 .ofuncs = &(struct nouveau_ofuncs) {
101 .ctor = nv41_fb_ctor,
102 .dtor = _nouveau_fb_dtor,
103 .init = nv41_fb_init,
104 .fini = _nouveau_fb_fini,
105 },
106 };
107