1 /* 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 3 * All rights reserved 4 * www.brocade.com 5 * 6 * Linux driver for Brocade Fibre Channel Host Bus Adapter. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License (GPL) Version 2 as 10 * published by the Free Software Foundation 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 */ 17 18 #ifndef __BFI_H__ 19 #define __BFI_H__ 20 21 #include "bfa_defs.h" 22 #include "bfa_defs_svc.h" 23 24 #pragma pack(1) 25 26 /* Per dma segment max size */ 27 #define BFI_MEM_DMA_SEG_SZ (131072) 28 29 /* Get number of dma segments required */ 30 #define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \ 31 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \ 32 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ)) 33 34 /* Get num dma reqs - that fit in a segment */ 35 #define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz)) 36 37 /* Get segment num from tag */ 38 #define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz)) 39 40 /* Get dma req offset in a segment */ 41 #define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \ 42 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz))) 43 44 /* 45 * BFI FW image type 46 */ 47 #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */ 48 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) 49 50 /* 51 * Msg header common to all msgs 52 */ 53 struct bfi_mhdr_s { 54 u8 msg_class; /* @ref bfi_mclass_t */ 55 u8 msg_id; /* msg opcode with in the class */ 56 union { 57 struct { 58 u8 qid; 59 u8 fn_lpu; /* msg destination */ 60 } h2i; 61 u16 i2htok; /* token in msgs to host */ 62 } mtag; 63 }; 64 65 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu)) 66 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1) 67 68 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \ 69 (_mh).msg_class = (_mc); \ 70 (_mh).msg_id = (_op); \ 71 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \ 72 } while (0) 73 74 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \ 75 (_mh).msg_class = (_mc); \ 76 (_mh).msg_id = (_op); \ 77 (_mh).mtag.i2htok = (_i2htok); \ 78 } while (0) 79 80 /* 81 * Message opcodes: 0-127 to firmware, 128-255 to host 82 */ 83 #define BFI_I2H_OPCODE_BASE 128 84 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE) 85 86 /* 87 **************************************************************************** 88 * 89 * Scatter Gather Element and Page definition 90 * 91 **************************************************************************** 92 */ 93 94 #define BFI_SGE_INLINE 1 95 #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1) 96 97 /* 98 * SG Flags 99 */ 100 enum { 101 BFI_SGE_DATA = 0, /* data address, not last */ 102 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */ 103 BFI_SGE_DATA_LAST = 3, /* data address, last */ 104 BFI_SGE_LINK = 2, /* link address */ 105 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */ 106 }; 107 108 /* 109 * DMA addresses 110 */ 111 union bfi_addr_u { 112 struct { 113 __be32 addr_lo; 114 __be32 addr_hi; 115 } a32; 116 }; 117 118 /* 119 * Scatter Gather Element used for fast-path IO requests 120 */ 121 struct bfi_sge_s { 122 #ifdef __BIG_ENDIAN 123 u32 flags:2, 124 rsvd:2, 125 sg_len:28; 126 #else 127 u32 sg_len:28, 128 rsvd:2, 129 flags:2; 130 #endif 131 union bfi_addr_u sga; 132 }; 133 134 /** 135 * Generic DMA addr-len pair. 136 */ 137 struct bfi_alen_s { 138 union bfi_addr_u al_addr; /* DMA addr of buffer */ 139 u32 al_len; /* length of buffer */ 140 }; 141 142 /* 143 * Scatter Gather Page 144 */ 145 #define BFI_SGPG_DATA_SGES 7 146 #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1) 147 #define BFI_SGPG_RSVD_WD_LEN 8 148 struct bfi_sgpg_s { 149 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX]; 150 u32 rsvd[BFI_SGPG_RSVD_WD_LEN]; 151 }; 152 153 /* FCP module definitions */ 154 #define BFI_IO_MAX (2000) 155 #define BFI_IOIM_SNSLEN (256) 156 #define BFI_IOIM_SNSBUF_SEGS \ 157 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN) 158 159 /* 160 * Large Message structure - 128 Bytes size Msgs 161 */ 162 #define BFI_LMSG_SZ 128 163 #define BFI_LMSG_PL_WSZ \ 164 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4) 165 166 struct bfi_msg_s { 167 struct bfi_mhdr_s mhdr; 168 u32 pl[BFI_LMSG_PL_WSZ]; 169 }; 170 171 /* 172 * Mailbox message structure 173 */ 174 #define BFI_MBMSG_SZ 7 175 struct bfi_mbmsg_s { 176 struct bfi_mhdr_s mh; 177 u32 pl[BFI_MBMSG_SZ]; 178 }; 179 180 /* 181 * Supported PCI function class codes (personality) 182 */ 183 enum bfi_pcifn_class { 184 BFI_PCIFN_CLASS_FC = 0x0c04, 185 BFI_PCIFN_CLASS_ETH = 0x0200, 186 }; 187 188 /* 189 * Message Classes 190 */ 191 enum bfi_mclass { 192 BFI_MC_IOC = 1, /* IO Controller (IOC) */ 193 BFI_MC_DIAG = 2, /* Diagnostic Msgs */ 194 BFI_MC_FLASH = 3, /* Flash message class */ 195 BFI_MC_CEE = 4, /* CEE */ 196 BFI_MC_FCPORT = 5, /* FC port */ 197 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */ 198 BFI_MC_ABLK = 7, /* ASIC block configuration */ 199 BFI_MC_UF = 8, /* Unsolicited frame receive */ 200 BFI_MC_FCXP = 9, /* FC Transport */ 201 BFI_MC_LPS = 10, /* lport fc login services */ 202 BFI_MC_RPORT = 11, /* Remote port */ 203 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */ 204 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */ 205 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */ 206 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */ 207 BFI_MC_IOIM = 16, /* IO (Initiator mode) */ 208 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */ 209 BFI_MC_TSKIM = 18, /* Initiator Task management */ 210 BFI_MC_PORT = 21, /* Physical port */ 211 BFI_MC_SFP = 22, /* SFP module */ 212 BFI_MC_PHY = 25, /* External PHY message class */ 213 BFI_MC_FRU = 34, 214 BFI_MC_MAX = 35 215 }; 216 217 #define BFI_IOC_MAX_CQS 4 218 #define BFI_IOC_MAX_CQS_ASIC 8 219 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */ 220 221 /* 222 *---------------------------------------------------------------------- 223 * IOC 224 *---------------------------------------------------------------------- 225 */ 226 227 /* 228 * Different asic generations 229 */ 230 enum bfi_asic_gen { 231 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */ 232 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */ 233 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */ 234 }; 235 236 enum bfi_asic_mode { 237 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */ 238 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */ 239 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */ 240 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */ 241 }; 242 243 enum bfi_ioc_h2i_msgs { 244 BFI_IOC_H2I_ENABLE_REQ = 1, 245 BFI_IOC_H2I_DISABLE_REQ = 2, 246 BFI_IOC_H2I_GETATTR_REQ = 3, 247 BFI_IOC_H2I_DBG_SYNC = 4, 248 BFI_IOC_H2I_DBG_DUMP = 5, 249 }; 250 251 enum bfi_ioc_i2h_msgs { 252 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1), 253 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2), 254 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3), 255 BFI_IOC_I2H_HBEAT = BFA_I2HM(4), 256 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5), 257 }; 258 259 /* 260 * BFI_IOC_H2I_GETATTR_REQ message 261 */ 262 struct bfi_ioc_getattr_req_s { 263 struct bfi_mhdr_s mh; 264 union bfi_addr_u attr_addr; 265 }; 266 267 struct bfi_ioc_attr_s { 268 wwn_t mfg_pwwn; /* Mfg port wwn */ 269 wwn_t mfg_nwwn; /* Mfg node wwn */ 270 mac_t mfg_mac; /* Mfg mac */ 271 u8 port_mode; /* bfi_port_mode */ 272 u8 rsvd_a; 273 wwn_t pwwn; 274 wwn_t nwwn; 275 mac_t mac; /* PBC or Mfg mac */ 276 u16 rsvd_b; 277 mac_t fcoe_mac; 278 u16 rsvd_c; 279 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 280 u8 pcie_gen; 281 u8 pcie_lanes_orig; 282 u8 pcie_lanes; 283 u8 rx_bbcredit; /* receive buffer credits */ 284 u32 adapter_prop; /* adapter properties */ 285 u16 maxfrsize; /* max receive frame size */ 286 char asic_rev; 287 u8 rsvd_d; 288 char fw_version[BFA_VERSION_LEN]; 289 char optrom_version[BFA_VERSION_LEN]; 290 struct bfa_mfg_vpd_s vpd; 291 u32 card_type; /* card type */ 292 u8 mfg_day; /* manufacturing day */ 293 u8 mfg_month; /* manufacturing month */ 294 u16 mfg_year; /* manufacturing year */ 295 }; 296 297 /* 298 * BFI_IOC_I2H_GETATTR_REPLY message 299 */ 300 struct bfi_ioc_getattr_reply_s { 301 struct bfi_mhdr_s mh; /* Common msg header */ 302 u8 status; /* cfg reply status */ 303 u8 rsvd[3]; 304 }; 305 306 /* 307 * Firmware memory page offsets 308 */ 309 #define BFI_IOC_SMEM_PG0_CB (0x40) 310 #define BFI_IOC_SMEM_PG0_CT (0x180) 311 312 /* 313 * Firmware statistic offset 314 */ 315 #define BFI_IOC_FWSTATS_OFF (0x6B40) 316 #define BFI_IOC_FWSTATS_SZ (4096) 317 318 /* 319 * Firmware trace offset 320 */ 321 #define BFI_IOC_TRC_OFF (0x4b00) 322 #define BFI_IOC_TRC_ENTS 256 323 324 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) 325 #define BFI_IOC_MD5SUM_SZ 4 326 struct bfi_ioc_image_hdr_s { 327 u32 signature; /* constant signature */ 328 u8 asic_gen; /* asic generation */ 329 u8 asic_mode; 330 u8 port0_mode; /* device mode for port 0 */ 331 u8 port1_mode; /* device mode for port 1 */ 332 u32 exec; /* exec vector */ 333 u32 bootenv; /* fimware boot env */ 334 u32 rsvd_b[4]; 335 u32 md5sum[BFI_IOC_MD5SUM_SZ]; 336 }; 337 338 #define BFI_FWBOOT_DEVMODE_OFF 4 339 #define BFI_FWBOOT_TYPE_OFF 8 340 #define BFI_FWBOOT_ENV_OFF 12 341 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \ 342 (((u32)(__asic_gen)) << 24 | \ 343 ((u32)(__asic_mode)) << 16 | \ 344 ((u32)(__p0_mode)) << 8 | \ 345 ((u32)(__p1_mode))) 346 347 #define BFI_FWBOOT_TYPE_NORMAL 0 348 #define BFI_FWBOOT_TYPE_MEMTEST 2 349 #define BFI_FWBOOT_ENV_OS 0 350 351 enum bfi_port_mode { 352 BFI_PORT_MODE_FC = 1, 353 BFI_PORT_MODE_ETH = 2, 354 }; 355 356 struct bfi_ioc_hbeat_s { 357 struct bfi_mhdr_s mh; /* common msg header */ 358 u32 hb_count; /* current heart beat count */ 359 }; 360 361 /* 362 * IOC hardware/firmware state 363 */ 364 enum bfi_ioc_state { 365 BFI_IOC_UNINIT = 0, /* not initialized */ 366 BFI_IOC_INITING = 1, /* h/w is being initialized */ 367 BFI_IOC_HWINIT = 2, /* h/w is initialized */ 368 BFI_IOC_CFG = 3, /* IOC configuration in progress */ 369 BFI_IOC_OP = 4, /* IOC is operational */ 370 BFI_IOC_DISABLING = 5, /* IOC is being disabled */ 371 BFI_IOC_DISABLED = 6, /* IOC is disabled */ 372 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */ 373 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */ 374 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */ 375 }; 376 377 #define BFI_IOC_ENDIAN_SIG 0x12345678 378 379 enum { 380 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */ 381 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */ 382 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */ 383 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */ 384 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */ 385 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */ 386 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */ 387 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */ 388 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */ 389 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */ 390 }; 391 392 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \ 393 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \ 394 BFI_ADAPTER_ ## __prop ## _SH) 395 #define BFI_ADAPTER_SETP(__prop, __val) \ 396 ((__val) << BFI_ADAPTER_ ## __prop ## _SH) 397 #define BFI_ADAPTER_IS_PROTO(__adap_type) \ 398 ((__adap_type) & BFI_ADAPTER_PROTO) 399 #define BFI_ADAPTER_IS_TTV(__adap_type) \ 400 ((__adap_type) & BFI_ADAPTER_TTV) 401 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \ 402 ((__adap_type) & BFI_ADAPTER_UNSUPP) 403 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \ 404 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \ 405 BFI_ADAPTER_UNSUPP)) 406 407 /* 408 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages 409 */ 410 struct bfi_ioc_ctrl_req_s { 411 struct bfi_mhdr_s mh; 412 u16 clscode; 413 u16 rsvd; 414 u32 tv_sec; 415 }; 416 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s; 417 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s; 418 419 /* 420 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages 421 */ 422 struct bfi_ioc_ctrl_reply_s { 423 struct bfi_mhdr_s mh; /* Common msg header */ 424 u8 status; /* enable/disable status */ 425 u8 port_mode; /* bfa_mode_s */ 426 u8 cap_bm; /* capability bit mask */ 427 u8 rsvd; 428 }; 429 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s; 430 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s; 431 432 #define BFI_IOC_MSGSZ 8 433 /* 434 * H2I Messages 435 */ 436 union bfi_ioc_h2i_msg_u { 437 struct bfi_mhdr_s mh; 438 struct bfi_ioc_ctrl_req_s enable_req; 439 struct bfi_ioc_ctrl_req_s disable_req; 440 struct bfi_ioc_getattr_req_s getattr_req; 441 u32 mboxmsg[BFI_IOC_MSGSZ]; 442 }; 443 444 /* 445 * I2H Messages 446 */ 447 union bfi_ioc_i2h_msg_u { 448 struct bfi_mhdr_s mh; 449 struct bfi_ioc_ctrl_reply_s fw_event; 450 u32 mboxmsg[BFI_IOC_MSGSZ]; 451 }; 452 453 454 /* 455 *---------------------------------------------------------------------- 456 * PBC 457 *---------------------------------------------------------------------- 458 */ 459 460 #define BFI_PBC_MAX_BLUNS 8 461 #define BFI_PBC_MAX_VPORTS 16 462 #define BFI_PBC_PORT_DISABLED 2 463 464 /* 465 * PBC boot lun configuration 466 */ 467 struct bfi_pbc_blun_s { 468 wwn_t tgt_pwwn; 469 struct scsi_lun tgt_lun; 470 }; 471 472 /* 473 * PBC virtual port configuration 474 */ 475 struct bfi_pbc_vport_s { 476 wwn_t vp_pwwn; 477 wwn_t vp_nwwn; 478 }; 479 480 /* 481 * BFI pre-boot configuration information 482 */ 483 struct bfi_pbc_s { 484 u8 port_enabled; 485 u8 boot_enabled; 486 u8 nbluns; 487 u8 nvports; 488 u8 port_speed; 489 u8 rsvd_a; 490 u16 hss; 491 wwn_t pbc_pwwn; 492 wwn_t pbc_nwwn; 493 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS]; 494 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS]; 495 }; 496 497 /* 498 *---------------------------------------------------------------------- 499 * MSGQ 500 *---------------------------------------------------------------------- 501 */ 502 #define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci) 503 #define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci) 504 #define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth) 505 #define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth) 506 507 /* q_depth must be power of 2 */ 508 #define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1)) 509 510 enum bfi_msgq_h2i_msgs_e { 511 BFI_MSGQ_H2I_INIT_REQ = 1, 512 BFI_MSGQ_H2I_DOORBELL = 2, 513 BFI_MSGQ_H2I_SHUTDOWN = 3, 514 }; 515 516 enum bfi_msgq_i2h_msgs_e { 517 BFI_MSGQ_I2H_INIT_RSP = 1, 518 BFI_MSGQ_I2H_DOORBELL = 2, 519 }; 520 521 522 /* Messages(commands/responsed/AENS will have the following header */ 523 struct bfi_msgq_mhdr_s { 524 u8 msg_class; 525 u8 msg_id; 526 u16 msg_token; 527 u16 num_entries; 528 u8 enet_id; 529 u8 rsvd[1]; 530 }; 531 532 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \ 533 (_mh).msg_class = (_mc); \ 534 (_mh).msg_id = (_mid); \ 535 (_mh).msg_token = (_tok); \ 536 (_mh).enet_id = (_enet_id); \ 537 } while (0) 538 539 /* 540 * Mailbox for messaging interface 541 * 542 */ 543 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */ 544 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */ 545 #define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */ 546 547 struct bfi_msgq_s { 548 union bfi_addr_u addr; 549 u16 q_depth; /* Total num of entries in the queue */ 550 u8 rsvd[2]; 551 }; 552 553 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */ 554 struct bfi_msgq_cfg_req_s { 555 struct bfi_mhdr_s mh; 556 struct bfi_msgq_s cmdq; 557 struct bfi_msgq_s rspq; 558 }; 559 560 /* BFI_ENET_MSGQ_CFG_RSP */ 561 struct bfi_msgq_cfg_rsp_s { 562 struct bfi_mhdr_s mh; 563 u8 cmd_status; 564 u8 rsvd[3]; 565 }; 566 567 568 /* BFI_MSGQ_H2I_DOORBELL */ 569 struct bfi_msgq_h2i_db_s { 570 struct bfi_mhdr_s mh; 571 u16 cmdq_pi; 572 u16 rspq_ci; 573 }; 574 575 /* BFI_MSGQ_I2H_DOORBELL */ 576 struct bfi_msgq_i2h_db_s { 577 struct bfi_mhdr_s mh; 578 u16 rspq_pi; 579 u16 cmdq_ci; 580 }; 581 582 #pragma pack() 583 584 /* BFI port specific */ 585 #pragma pack(1) 586 587 enum bfi_port_h2i { 588 BFI_PORT_H2I_ENABLE_REQ = (1), 589 BFI_PORT_H2I_DISABLE_REQ = (2), 590 BFI_PORT_H2I_GET_STATS_REQ = (3), 591 BFI_PORT_H2I_CLEAR_STATS_REQ = (4), 592 }; 593 594 enum bfi_port_i2h { 595 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1), 596 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2), 597 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3), 598 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4), 599 }; 600 601 /* 602 * Generic REQ type 603 */ 604 struct bfi_port_generic_req_s { 605 struct bfi_mhdr_s mh; /* msg header */ 606 u32 msgtag; /* msgtag for reply */ 607 u32 rsvd; 608 }; 609 610 /* 611 * Generic RSP type 612 */ 613 struct bfi_port_generic_rsp_s { 614 struct bfi_mhdr_s mh; /* common msg header */ 615 u8 status; /* port enable status */ 616 u8 rsvd[3]; 617 u32 msgtag; /* msgtag for reply */ 618 }; 619 620 /* 621 * BFI_PORT_H2I_GET_STATS_REQ 622 */ 623 struct bfi_port_get_stats_req_s { 624 struct bfi_mhdr_s mh; /* common msg header */ 625 union bfi_addr_u dma_addr; 626 }; 627 628 union bfi_port_h2i_msg_u { 629 struct bfi_mhdr_s mh; 630 struct bfi_port_generic_req_s enable_req; 631 struct bfi_port_generic_req_s disable_req; 632 struct bfi_port_get_stats_req_s getstats_req; 633 struct bfi_port_generic_req_s clearstats_req; 634 }; 635 636 union bfi_port_i2h_msg_u { 637 struct bfi_mhdr_s mh; 638 struct bfi_port_generic_rsp_s enable_rsp; 639 struct bfi_port_generic_rsp_s disable_rsp; 640 struct bfi_port_generic_rsp_s getstats_rsp; 641 struct bfi_port_generic_rsp_s clearstats_rsp; 642 }; 643 644 /* 645 *---------------------------------------------------------------------- 646 * ABLK 647 *---------------------------------------------------------------------- 648 */ 649 enum bfi_ablk_h2i_msgs_e { 650 BFI_ABLK_H2I_QUERY = 1, 651 BFI_ABLK_H2I_ADPT_CONFIG = 2, 652 BFI_ABLK_H2I_PORT_CONFIG = 3, 653 BFI_ABLK_H2I_PF_CREATE = 4, 654 BFI_ABLK_H2I_PF_DELETE = 5, 655 BFI_ABLK_H2I_PF_UPDATE = 6, 656 BFI_ABLK_H2I_OPTROM_ENABLE = 7, 657 BFI_ABLK_H2I_OPTROM_DISABLE = 8, 658 }; 659 660 enum bfi_ablk_i2h_msgs_e { 661 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY), 662 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG), 663 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG), 664 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE), 665 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE), 666 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE), 667 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE), 668 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE), 669 }; 670 671 /* BFI_ABLK_H2I_QUERY */ 672 struct bfi_ablk_h2i_query_s { 673 struct bfi_mhdr_s mh; 674 union bfi_addr_u addr; 675 }; 676 677 /* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */ 678 struct bfi_ablk_h2i_cfg_req_s { 679 struct bfi_mhdr_s mh; 680 u8 mode; 681 u8 port; 682 u8 max_pf; 683 u8 max_vf; 684 }; 685 686 /* 687 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE, 688 */ 689 struct bfi_ablk_h2i_pf_req_s { 690 struct bfi_mhdr_s mh; 691 u8 pcifn; 692 u8 port; 693 u16 pers; 694 u16 bw_min; /* percent BW @ max speed */ 695 u16 bw_max; /* percent BW @ max speed */ 696 }; 697 698 /* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */ 699 struct bfi_ablk_h2i_optrom_s { 700 struct bfi_mhdr_s mh; 701 }; 702 703 /* 704 * BFI_ABLK_I2H_QUERY 705 * BFI_ABLK_I2H_PORT_CONFIG 706 * BFI_ABLK_I2H_PF_CREATE 707 * BFI_ABLK_I2H_PF_DELETE 708 * BFI_ABLK_I2H_PF_UPDATE 709 * BFI_ABLK_I2H_OPTROM_ENABLE 710 * BFI_ABLK_I2H_OPTROM_DISABLE 711 */ 712 struct bfi_ablk_i2h_rsp_s { 713 struct bfi_mhdr_s mh; 714 u8 status; 715 u8 pcifn; 716 u8 port_mode; 717 }; 718 719 720 /* 721 * CEE module specific messages 722 */ 723 724 /* Mailbox commands from host to firmware */ 725 enum bfi_cee_h2i_msgs_e { 726 BFI_CEE_H2I_GET_CFG_REQ = 1, 727 BFI_CEE_H2I_RESET_STATS = 2, 728 BFI_CEE_H2I_GET_STATS_REQ = 3, 729 }; 730 731 enum bfi_cee_i2h_msgs_e { 732 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1), 733 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2), 734 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3), 735 }; 736 737 /* 738 * H2I command structure for resetting the stats 739 */ 740 struct bfi_cee_reset_stats_s { 741 struct bfi_mhdr_s mh; 742 }; 743 744 /* 745 * Get configuration command from host 746 */ 747 struct bfi_cee_get_req_s { 748 struct bfi_mhdr_s mh; 749 union bfi_addr_u dma_addr; 750 }; 751 752 /* 753 * Reply message from firmware 754 */ 755 struct bfi_cee_get_rsp_s { 756 struct bfi_mhdr_s mh; 757 u8 cmd_status; 758 u8 rsvd[3]; 759 }; 760 761 /* 762 * Reply message from firmware 763 */ 764 struct bfi_cee_stats_rsp_s { 765 struct bfi_mhdr_s mh; 766 u8 cmd_status; 767 u8 rsvd[3]; 768 }; 769 770 /* Mailbox message structures from firmware to host */ 771 union bfi_cee_i2h_msg_u { 772 struct bfi_mhdr_s mh; 773 struct bfi_cee_get_rsp_s get_rsp; 774 struct bfi_cee_stats_rsp_s stats_rsp; 775 }; 776 777 /* 778 * SFP related 779 */ 780 781 enum bfi_sfp_h2i_e { 782 BFI_SFP_H2I_SHOW = 1, 783 BFI_SFP_H2I_SCN = 2, 784 }; 785 786 enum bfi_sfp_i2h_e { 787 BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW), 788 BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN), 789 }; 790 791 /* 792 * SFP state change notification 793 */ 794 struct bfi_sfp_scn_s { 795 struct bfi_mhdr_s mhr; /* host msg header */ 796 u8 event; 797 u8 sfpid; 798 u8 pomlvl; /* pom level: normal/warning/alarm */ 799 u8 is_elb; /* e-loopback */ 800 }; 801 802 /* 803 * SFP state 804 */ 805 enum bfa_sfp_stat_e { 806 BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */ 807 BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */ 808 BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */ 809 BFA_SFP_STATE_VALID = 3, /* SFP is valid */ 810 BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */ 811 BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */ 812 }; 813 814 /* 815 * SFP memory access type 816 */ 817 enum bfi_sfp_mem_e { 818 BFI_SFP_MEM_ALL = 0x1, /* access all data field */ 819 BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */ 820 }; 821 822 struct bfi_sfp_req_s { 823 struct bfi_mhdr_s mh; 824 u8 memtype; 825 u8 rsvd[3]; 826 struct bfi_alen_s alen; 827 }; 828 829 struct bfi_sfp_rsp_s { 830 struct bfi_mhdr_s mh; 831 u8 status; 832 u8 state; 833 u8 rsvd[2]; 834 }; 835 836 /* 837 * FLASH module specific 838 */ 839 enum bfi_flash_h2i_msgs { 840 BFI_FLASH_H2I_QUERY_REQ = 1, 841 BFI_FLASH_H2I_ERASE_REQ = 2, 842 BFI_FLASH_H2I_WRITE_REQ = 3, 843 BFI_FLASH_H2I_READ_REQ = 4, 844 BFI_FLASH_H2I_BOOT_VER_REQ = 5, 845 }; 846 847 enum bfi_flash_i2h_msgs { 848 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1), 849 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2), 850 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3), 851 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4), 852 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5), 853 BFI_FLASH_I2H_EVENT = BFA_I2HM(127), 854 }; 855 856 /* 857 * Flash query request 858 */ 859 struct bfi_flash_query_req_s { 860 struct bfi_mhdr_s mh; /* Common msg header */ 861 struct bfi_alen_s alen; 862 }; 863 864 /* 865 * Flash erase request 866 */ 867 struct bfi_flash_erase_req_s { 868 struct bfi_mhdr_s mh; /* Common msg header */ 869 u32 type; /* partition type */ 870 u8 instance; /* partition instance */ 871 u8 rsv[3]; 872 }; 873 874 /* 875 * Flash write request 876 */ 877 struct bfi_flash_write_req_s { 878 struct bfi_mhdr_s mh; /* Common msg header */ 879 struct bfi_alen_s alen; 880 u32 type; /* partition type */ 881 u8 instance; /* partition instance */ 882 u8 last; 883 u8 rsv[2]; 884 u32 offset; 885 u32 length; 886 }; 887 888 /* 889 * Flash read request 890 */ 891 struct bfi_flash_read_req_s { 892 struct bfi_mhdr_s mh; /* Common msg header */ 893 u32 type; /* partition type */ 894 u8 instance; /* partition instance */ 895 u8 rsv[3]; 896 u32 offset; 897 u32 length; 898 struct bfi_alen_s alen; 899 }; 900 901 /* 902 * Flash query response 903 */ 904 struct bfi_flash_query_rsp_s { 905 struct bfi_mhdr_s mh; /* Common msg header */ 906 u32 status; 907 }; 908 909 /* 910 * Flash read response 911 */ 912 struct bfi_flash_read_rsp_s { 913 struct bfi_mhdr_s mh; /* Common msg header */ 914 u32 type; /* partition type */ 915 u8 instance; /* partition instance */ 916 u8 rsv[3]; 917 u32 status; 918 u32 length; 919 }; 920 921 /* 922 * Flash write response 923 */ 924 struct bfi_flash_write_rsp_s { 925 struct bfi_mhdr_s mh; /* Common msg header */ 926 u32 type; /* partition type */ 927 u8 instance; /* partition instance */ 928 u8 rsv[3]; 929 u32 status; 930 u32 length; 931 }; 932 933 /* 934 * Flash erase response 935 */ 936 struct bfi_flash_erase_rsp_s { 937 struct bfi_mhdr_s mh; /* Common msg header */ 938 u32 type; /* partition type */ 939 u8 instance; /* partition instance */ 940 u8 rsv[3]; 941 u32 status; 942 }; 943 944 /* 945 * Flash event notification 946 */ 947 struct bfi_flash_event_s { 948 struct bfi_mhdr_s mh; /* Common msg header */ 949 bfa_status_t status; 950 u32 param; 951 }; 952 953 /* 954 *---------------------------------------------------------------------- 955 * DIAG 956 *---------------------------------------------------------------------- 957 */ 958 enum bfi_diag_h2i { 959 BFI_DIAG_H2I_PORTBEACON = 1, 960 BFI_DIAG_H2I_LOOPBACK = 2, 961 BFI_DIAG_H2I_FWPING = 3, 962 BFI_DIAG_H2I_TEMPSENSOR = 4, 963 BFI_DIAG_H2I_LEDTEST = 5, 964 BFI_DIAG_H2I_QTEST = 6, 965 BFI_DIAG_H2I_DPORT = 7, 966 }; 967 968 enum bfi_diag_i2h { 969 BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON), 970 BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK), 971 BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING), 972 BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR), 973 BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST), 974 BFI_DIAG_I2H_QTEST = BFA_I2HM(BFI_DIAG_H2I_QTEST), 975 BFI_DIAG_I2H_DPORT = BFA_I2HM(BFI_DIAG_H2I_DPORT), 976 }; 977 978 #define BFI_DIAG_MAX_SGES 2 979 #define BFI_DIAG_DMA_BUF_SZ (2 * 1024) 980 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900 981 #define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3 982 983 struct bfi_diag_lb_req_s { 984 struct bfi_mhdr_s mh; 985 u32 loopcnt; 986 u32 pattern; 987 u8 lb_mode; /*!< bfa_port_opmode_t */ 988 u8 speed; /*!< bfa_port_speed_t */ 989 u8 rsvd[2]; 990 }; 991 992 struct bfi_diag_lb_rsp_s { 993 struct bfi_mhdr_s mh; /* 4 bytes */ 994 struct bfa_diag_loopback_result_s res; /* 16 bytes */ 995 }; 996 997 struct bfi_diag_fwping_req_s { 998 struct bfi_mhdr_s mh; /* 4 bytes */ 999 struct bfi_alen_s alen; /* 12 bytes */ 1000 u32 data; /* user input data pattern */ 1001 u32 count; /* user input dma count */ 1002 u8 qtag; /* track CPE vc */ 1003 u8 rsv[3]; 1004 }; 1005 1006 struct bfi_diag_fwping_rsp_s { 1007 struct bfi_mhdr_s mh; /* 4 bytes */ 1008 u32 data; /* user input data pattern */ 1009 u8 qtag; /* track CPE vc */ 1010 u8 dma_status; /* dma status */ 1011 u8 rsv[2]; 1012 }; 1013 1014 /* 1015 * Temperature Sensor 1016 */ 1017 struct bfi_diag_ts_req_s { 1018 struct bfi_mhdr_s mh; /* 4 bytes */ 1019 u16 temp; /* 10-bit A/D value */ 1020 u16 brd_temp; /* 9-bit board temp */ 1021 u8 status; 1022 u8 ts_junc; /* show junction tempsensor */ 1023 u8 ts_brd; /* show board tempsensor */ 1024 u8 rsv; 1025 }; 1026 #define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s 1027 1028 struct bfi_diag_ledtest_req_s { 1029 struct bfi_mhdr_s mh; /* 4 bytes */ 1030 u8 cmd; 1031 u8 color; 1032 u8 portid; 1033 u8 led; /* bitmap of LEDs to be tested */ 1034 u16 freq; /* no. of blinks every 10 secs */ 1035 u8 rsv[2]; 1036 }; 1037 1038 /* notify host led operation is done */ 1039 struct bfi_diag_ledtest_rsp_s { 1040 struct bfi_mhdr_s mh; /* 4 bytes */ 1041 }; 1042 1043 struct bfi_diag_portbeacon_req_s { 1044 struct bfi_mhdr_s mh; /* 4 bytes */ 1045 u32 period; /* beaconing period */ 1046 u8 beacon; /* 1: beacon on */ 1047 u8 rsvd[3]; 1048 }; 1049 1050 /* notify host the beacon is off */ 1051 struct bfi_diag_portbeacon_rsp_s { 1052 struct bfi_mhdr_s mh; /* 4 bytes */ 1053 }; 1054 1055 struct bfi_diag_qtest_req_s { 1056 struct bfi_mhdr_s mh; /* 4 bytes */ 1057 u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */ 1058 }; 1059 #define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s 1060 1061 /* 1062 * D-port test 1063 */ 1064 enum bfi_dport_req { 1065 BFI_DPORT_DISABLE = 0, /* disable dport request */ 1066 BFI_DPORT_ENABLE = 1, /* enable dport request */ 1067 }; 1068 1069 struct bfi_diag_dport_req_s { 1070 struct bfi_mhdr_s mh; /* 4 bytes */ 1071 u8 req; /* request 1: enable 0: disable */ 1072 u8 status; /* reply status */ 1073 u8 rsvd[2]; 1074 u32 msgtag; /* msgtag for reply */ 1075 }; 1076 #define bfi_diag_dport_rsp_t struct bfi_diag_dport_req_s 1077 1078 /* 1079 * PHY module specific 1080 */ 1081 enum bfi_phy_h2i_msgs_e { 1082 BFI_PHY_H2I_QUERY_REQ = 1, 1083 BFI_PHY_H2I_STATS_REQ = 2, 1084 BFI_PHY_H2I_WRITE_REQ = 3, 1085 BFI_PHY_H2I_READ_REQ = 4, 1086 }; 1087 1088 enum bfi_phy_i2h_msgs_e { 1089 BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1), 1090 BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2), 1091 BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3), 1092 BFI_PHY_I2H_READ_RSP = BFA_I2HM(4), 1093 }; 1094 1095 /* 1096 * External PHY query request 1097 */ 1098 struct bfi_phy_query_req_s { 1099 struct bfi_mhdr_s mh; /* Common msg header */ 1100 u8 instance; 1101 u8 rsv[3]; 1102 struct bfi_alen_s alen; 1103 }; 1104 1105 /* 1106 * External PHY stats request 1107 */ 1108 struct bfi_phy_stats_req_s { 1109 struct bfi_mhdr_s mh; /* Common msg header */ 1110 u8 instance; 1111 u8 rsv[3]; 1112 struct bfi_alen_s alen; 1113 }; 1114 1115 /* 1116 * External PHY write request 1117 */ 1118 struct bfi_phy_write_req_s { 1119 struct bfi_mhdr_s mh; /* Common msg header */ 1120 u8 instance; 1121 u8 last; 1122 u8 rsv[2]; 1123 u32 offset; 1124 u32 length; 1125 struct bfi_alen_s alen; 1126 }; 1127 1128 /* 1129 * External PHY read request 1130 */ 1131 struct bfi_phy_read_req_s { 1132 struct bfi_mhdr_s mh; /* Common msg header */ 1133 u8 instance; 1134 u8 rsv[3]; 1135 u32 offset; 1136 u32 length; 1137 struct bfi_alen_s alen; 1138 }; 1139 1140 /* 1141 * External PHY query response 1142 */ 1143 struct bfi_phy_query_rsp_s { 1144 struct bfi_mhdr_s mh; /* Common msg header */ 1145 u32 status; 1146 }; 1147 1148 /* 1149 * External PHY stats response 1150 */ 1151 struct bfi_phy_stats_rsp_s { 1152 struct bfi_mhdr_s mh; /* Common msg header */ 1153 u32 status; 1154 }; 1155 1156 /* 1157 * External PHY read response 1158 */ 1159 struct bfi_phy_read_rsp_s { 1160 struct bfi_mhdr_s mh; /* Common msg header */ 1161 u32 status; 1162 u32 length; 1163 }; 1164 1165 /* 1166 * External PHY write response 1167 */ 1168 struct bfi_phy_write_rsp_s { 1169 struct bfi_mhdr_s mh; /* Common msg header */ 1170 u32 status; 1171 u32 length; 1172 }; 1173 1174 enum bfi_fru_h2i_msgs { 1175 BFI_FRUVPD_H2I_WRITE_REQ = 1, 1176 BFI_FRUVPD_H2I_READ_REQ = 2, 1177 BFI_TFRU_H2I_WRITE_REQ = 3, 1178 BFI_TFRU_H2I_READ_REQ = 4, 1179 }; 1180 1181 enum bfi_fru_i2h_msgs { 1182 BFI_FRUVPD_I2H_WRITE_RSP = BFA_I2HM(1), 1183 BFI_FRUVPD_I2H_READ_RSP = BFA_I2HM(2), 1184 BFI_TFRU_I2H_WRITE_RSP = BFA_I2HM(3), 1185 BFI_TFRU_I2H_READ_RSP = BFA_I2HM(4), 1186 }; 1187 1188 /* 1189 * FRU write request 1190 */ 1191 struct bfi_fru_write_req_s { 1192 struct bfi_mhdr_s mh; /* Common msg header */ 1193 u8 last; 1194 u8 rsv[3]; 1195 u32 offset; 1196 u32 length; 1197 struct bfi_alen_s alen; 1198 }; 1199 1200 /* 1201 * FRU read request 1202 */ 1203 struct bfi_fru_read_req_s { 1204 struct bfi_mhdr_s mh; /* Common msg header */ 1205 u32 offset; 1206 u32 length; 1207 struct bfi_alen_s alen; 1208 }; 1209 1210 /* 1211 * FRU response 1212 */ 1213 struct bfi_fru_rsp_s { 1214 struct bfi_mhdr_s mh; /* Common msg header */ 1215 u32 status; 1216 u32 length; 1217 }; 1218 #pragma pack() 1219 1220 #endif /* __BFI_H__ */ 1221