Searched defs:pll1 (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | hw.c | 134 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1, in nouveau_hw_decode_pll()
172 uint32_t reg1, pll1, pll2 = 0; in nouveau_hw_get_pllvals() local
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| /drivers/gpu/drm/nouveau/core/subdev/clock/ |
| D | nv04.c | 127 uint32_t pll1 = (oldpll1 & 0xfff80000) | pv->log2P << 16 | pv->NM1; in setPLL_double_highregs() local
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| /drivers/clk/mxs/ |
| D | clk-imx28.c | 138 ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, enumerator
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| /drivers/gpu/host1x/drm/ |
| D | hdmi.c | 149 u32 pll1; member
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| /drivers/clk/ |
| D | clk-prima2.c | 1030 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
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