1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/module.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/delay.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "psb_intel_drv.h"
36 #include <drm/gma_drm.h>
37 #include "psb_drv.h"
38 #include "psb_intel_sdvo_regs.h"
39 #include "psb_intel_reg.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct psb_intel_sdvo {
68 struct psb_intel_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 int sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
85 struct psb_intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /**
97 * This is used to select the color range of RBG outputs in HDMI mode.
98 * It is only valid when using TMDS encoding and 8 bit per color mode.
99 */
100 uint32_t color_range;
101
102 /**
103 * This is set if we're going to treat the device as TV-out.
104 *
105 * While we have these nice friendly flags for output types that ought
106 * to decide this for us, the S-Video output on our HDMI+S-Video card
107 * shows up as RGB1 (VGA).
108 */
109 bool is_tv;
110
111 /* This is for current tv format name */
112 int tv_format_index;
113
114 /**
115 * This is set if we treat the device as HDMI, instead of DVI.
116 */
117 bool is_hdmi;
118 bool has_hdmi_monitor;
119 bool has_hdmi_audio;
120
121 /**
122 * This is set if we detect output of sdvo device as LVDS and
123 * have a valid fixed mode to use with the panel.
124 */
125 bool is_lvds;
126
127 /**
128 * This is sdvo fixed pannel mode pointer
129 */
130 struct drm_display_mode *sdvo_lvds_fixed_mode;
131
132 /* DDC bus used by this SDVO encoder */
133 uint8_t ddc_bus;
134
135 /* Input timings for adjusted_mode */
136 struct psb_intel_sdvo_dtd input_dtd;
137
138 /* Saved SDVO output states */
139 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
140 };
141
142 struct psb_intel_sdvo_connector {
143 struct psb_intel_connector base;
144
145 /* Mark the type of connector */
146 uint16_t output_flag;
147
148 int force_audio;
149
150 /* This contains all current supported TV format */
151 u8 tv_format_supported[TV_FORMAT_NUM];
152 int format_supported_num;
153 struct drm_property *tv_format;
154
155 /* add the property for the SDVO-TV */
156 struct drm_property *left;
157 struct drm_property *right;
158 struct drm_property *top;
159 struct drm_property *bottom;
160 struct drm_property *hpos;
161 struct drm_property *vpos;
162 struct drm_property *contrast;
163 struct drm_property *saturation;
164 struct drm_property *hue;
165 struct drm_property *sharpness;
166 struct drm_property *flicker_filter;
167 struct drm_property *flicker_filter_adaptive;
168 struct drm_property *flicker_filter_2d;
169 struct drm_property *tv_chroma_filter;
170 struct drm_property *tv_luma_filter;
171 struct drm_property *dot_crawl;
172
173 /* add the property for the SDVO-TV/LVDS */
174 struct drm_property *brightness;
175
176 /* Add variable to record current setting for the above property */
177 u32 left_margin, right_margin, top_margin, bottom_margin;
178
179 /* this is to get the range of margin.*/
180 u32 max_hscan, max_vscan;
181 u32 max_hpos, cur_hpos;
182 u32 max_vpos, cur_vpos;
183 u32 cur_brightness, max_brightness;
184 u32 cur_contrast, max_contrast;
185 u32 cur_saturation, max_saturation;
186 u32 cur_hue, max_hue;
187 u32 cur_sharpness, max_sharpness;
188 u32 cur_flicker_filter, max_flicker_filter;
189 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
190 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
191 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
192 u32 cur_tv_luma_filter, max_tv_luma_filter;
193 u32 cur_dot_crawl, max_dot_crawl;
194 };
195
to_psb_intel_sdvo(struct drm_encoder * encoder)196 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
197 {
198 return container_of(encoder, struct psb_intel_sdvo, base.base);
199 }
200
intel_attached_sdvo(struct drm_connector * connector)201 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
202 {
203 return container_of(psb_intel_attached_encoder(connector),
204 struct psb_intel_sdvo, base);
205 }
206
to_psb_intel_sdvo_connector(struct drm_connector * connector)207 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
208 {
209 return container_of(to_psb_intel_connector(connector), struct psb_intel_sdvo_connector, base);
210 }
211
212 static bool
213 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
214 static bool
215 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
216 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
217 int type);
218 static bool
219 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
220 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
221
222 /**
223 * Writes the SDVOB or SDVOC with the given value, but always writes both
224 * SDVOB and SDVOC to work around apparent hardware issues (according to
225 * comments in the BIOS).
226 */
psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo * psb_intel_sdvo,u32 val)227 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
228 {
229 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
230 u32 bval = val, cval = val;
231 int i;
232
233 if (psb_intel_sdvo->sdvo_reg == SDVOB) {
234 cval = REG_READ(SDVOC);
235 } else {
236 bval = REG_READ(SDVOB);
237 }
238 /*
239 * Write the registers twice for luck. Sometimes,
240 * writing them only once doesn't appear to 'stick'.
241 * The BIOS does this too. Yay, magic
242 */
243 for (i = 0; i < 2; i++)
244 {
245 REG_WRITE(SDVOB, bval);
246 REG_READ(SDVOB);
247 REG_WRITE(SDVOC, cval);
248 REG_READ(SDVOC);
249 }
250 }
251
psb_intel_sdvo_read_byte(struct psb_intel_sdvo * psb_intel_sdvo,u8 addr,u8 * ch)252 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
253 {
254 struct i2c_msg msgs[] = {
255 {
256 .addr = psb_intel_sdvo->slave_addr,
257 .flags = 0,
258 .len = 1,
259 .buf = &addr,
260 },
261 {
262 .addr = psb_intel_sdvo->slave_addr,
263 .flags = I2C_M_RD,
264 .len = 1,
265 .buf = ch,
266 }
267 };
268 int ret;
269
270 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
271 return true;
272
273 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
274 return false;
275 }
276
277 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
278 /** Mapping of command numbers to names, for debug output */
279 static const struct _sdvo_cmd_name {
280 u8 cmd;
281 const char *name;
282 } sdvo_cmd_names[] = {
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
326
327 /* Add the op code for SDVO enhancements */
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
372
373 /* HDMI op code */
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
394 };
395
396 #define IS_SDVOB(reg) (reg == SDVOB)
397 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
398
psb_intel_sdvo_debug_write(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,const void * args,int args_len)399 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
400 const void *args, int args_len)
401 {
402 int i;
403
404 DRM_DEBUG_KMS("%s: W: %02X ",
405 SDVO_NAME(psb_intel_sdvo), cmd);
406 for (i = 0; i < args_len; i++)
407 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
408 for (; i < 8; i++)
409 DRM_LOG_KMS(" ");
410 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
411 if (cmd == sdvo_cmd_names[i].cmd) {
412 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
413 break;
414 }
415 }
416 if (i == ARRAY_SIZE(sdvo_cmd_names))
417 DRM_LOG_KMS("(%02X)", cmd);
418 DRM_LOG_KMS("\n");
419 }
420
421 static const char *cmd_status_names[] = {
422 "Power on",
423 "Success",
424 "Not supported",
425 "Invalid arg",
426 "Pending",
427 "Target not specified",
428 "Scaling not supported"
429 };
430
psb_intel_sdvo_write_cmd(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,const void * args,int args_len)431 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
432 const void *args, int args_len)
433 {
434 u8 buf[args_len*2 + 2], status;
435 struct i2c_msg msgs[args_len + 3];
436 int i, ret;
437
438 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
439
440 for (i = 0; i < args_len; i++) {
441 msgs[i].addr = psb_intel_sdvo->slave_addr;
442 msgs[i].flags = 0;
443 msgs[i].len = 2;
444 msgs[i].buf = buf + 2 *i;
445 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
446 buf[2*i + 1] = ((u8*)args)[i];
447 }
448 msgs[i].addr = psb_intel_sdvo->slave_addr;
449 msgs[i].flags = 0;
450 msgs[i].len = 2;
451 msgs[i].buf = buf + 2*i;
452 buf[2*i + 0] = SDVO_I2C_OPCODE;
453 buf[2*i + 1] = cmd;
454
455 /* the following two are to read the response */
456 status = SDVO_I2C_CMD_STATUS;
457 msgs[i+1].addr = psb_intel_sdvo->slave_addr;
458 msgs[i+1].flags = 0;
459 msgs[i+1].len = 1;
460 msgs[i+1].buf = &status;
461
462 msgs[i+2].addr = psb_intel_sdvo->slave_addr;
463 msgs[i+2].flags = I2C_M_RD;
464 msgs[i+2].len = 1;
465 msgs[i+2].buf = &status;
466
467 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
468 if (ret < 0) {
469 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
470 return false;
471 }
472 if (ret != i+3) {
473 /* failure in I2C transfer */
474 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
475 return false;
476 }
477
478 return true;
479 }
480
psb_intel_sdvo_read_response(struct psb_intel_sdvo * psb_intel_sdvo,void * response,int response_len)481 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
482 void *response, int response_len)
483 {
484 u8 retry = 5;
485 u8 status;
486 int i;
487
488 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo));
489
490 /*
491 * The documentation states that all commands will be
492 * processed within 15µs, and that we need only poll
493 * the status byte a maximum of 3 times in order for the
494 * command to be complete.
495 *
496 * Check 5 times in case the hardware failed to read the docs.
497 */
498 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
499 SDVO_I2C_CMD_STATUS,
500 &status))
501 goto log_fail;
502
503 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
504 udelay(15);
505 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
506 SDVO_I2C_CMD_STATUS,
507 &status))
508 goto log_fail;
509 }
510
511 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
512 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
513 else
514 DRM_LOG_KMS("(??? %d)", status);
515
516 if (status != SDVO_CMD_STATUS_SUCCESS)
517 goto log_fail;
518
519 /* Read the command response */
520 for (i = 0; i < response_len; i++) {
521 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
522 SDVO_I2C_RETURN_0 + i,
523 &((u8 *)response)[i]))
524 goto log_fail;
525 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
526 }
527 DRM_LOG_KMS("\n");
528 return true;
529
530 log_fail:
531 DRM_LOG_KMS("... failed\n");
532 return false;
533 }
534
psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode * mode)535 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
536 {
537 if (mode->clock >= 100000)
538 return 1;
539 else if (mode->clock >= 50000)
540 return 2;
541 else
542 return 4;
543 }
544
psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo * psb_intel_sdvo,u8 ddc_bus)545 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
546 u8 ddc_bus)
547 {
548 /* This must be the immediately preceding write before the i2c xfer */
549 return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
550 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
551 &ddc_bus, 1);
552 }
553
psb_intel_sdvo_set_value(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,const void * data,int len)554 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
555 {
556 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
557 return false;
558
559 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
560 }
561
562 static bool
psb_intel_sdvo_get_value(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,void * value,int len)563 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
564 {
565 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
566 return false;
567
568 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
569 }
570
psb_intel_sdvo_set_target_input(struct psb_intel_sdvo * psb_intel_sdvo)571 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
572 {
573 struct psb_intel_sdvo_set_target_input_args targets = {0};
574 return psb_intel_sdvo_set_value(psb_intel_sdvo,
575 SDVO_CMD_SET_TARGET_INPUT,
576 &targets, sizeof(targets));
577 }
578
579 /**
580 * Return whether each input is trained.
581 *
582 * This function is making an assumption about the layout of the response,
583 * which should be checked against the docs.
584 */
psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo * psb_intel_sdvo,bool * input_1,bool * input_2)585 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
586 {
587 struct psb_intel_sdvo_get_trained_inputs_response response;
588
589 BUILD_BUG_ON(sizeof(response) != 1);
590 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
591 &response, sizeof(response)))
592 return false;
593
594 *input_1 = response.input0_trained;
595 *input_2 = response.input1_trained;
596 return true;
597 }
598
psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo * psb_intel_sdvo,u16 outputs)599 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
600 u16 outputs)
601 {
602 return psb_intel_sdvo_set_value(psb_intel_sdvo,
603 SDVO_CMD_SET_ACTIVE_OUTPUTS,
604 &outputs, sizeof(outputs));
605 }
606
psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo * psb_intel_sdvo,int mode)607 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
608 int mode)
609 {
610 u8 state = SDVO_ENCODER_STATE_ON;
611
612 switch (mode) {
613 case DRM_MODE_DPMS_ON:
614 state = SDVO_ENCODER_STATE_ON;
615 break;
616 case DRM_MODE_DPMS_STANDBY:
617 state = SDVO_ENCODER_STATE_STANDBY;
618 break;
619 case DRM_MODE_DPMS_SUSPEND:
620 state = SDVO_ENCODER_STATE_SUSPEND;
621 break;
622 case DRM_MODE_DPMS_OFF:
623 state = SDVO_ENCODER_STATE_OFF;
624 break;
625 }
626
627 return psb_intel_sdvo_set_value(psb_intel_sdvo,
628 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
629 }
630
psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo * psb_intel_sdvo,int * clock_min,int * clock_max)631 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
632 int *clock_min,
633 int *clock_max)
634 {
635 struct psb_intel_sdvo_pixel_clock_range clocks;
636
637 BUILD_BUG_ON(sizeof(clocks) != 4);
638 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
639 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
640 &clocks, sizeof(clocks)))
641 return false;
642
643 /* Convert the values from units of 10 kHz to kHz. */
644 *clock_min = clocks.min * 10;
645 *clock_max = clocks.max * 10;
646 return true;
647 }
648
psb_intel_sdvo_set_target_output(struct psb_intel_sdvo * psb_intel_sdvo,u16 outputs)649 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
650 u16 outputs)
651 {
652 return psb_intel_sdvo_set_value(psb_intel_sdvo,
653 SDVO_CMD_SET_TARGET_OUTPUT,
654 &outputs, sizeof(outputs));
655 }
656
psb_intel_sdvo_set_timing(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,struct psb_intel_sdvo_dtd * dtd)657 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
658 struct psb_intel_sdvo_dtd *dtd)
659 {
660 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
661 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
662 }
663
psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_dtd * dtd)664 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
665 struct psb_intel_sdvo_dtd *dtd)
666 {
667 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
668 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
669 }
670
psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_dtd * dtd)671 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
672 struct psb_intel_sdvo_dtd *dtd)
673 {
674 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
675 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
676 }
677
678 static bool
psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo * psb_intel_sdvo,uint16_t clock,uint16_t width,uint16_t height)679 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
680 uint16_t clock,
681 uint16_t width,
682 uint16_t height)
683 {
684 struct psb_intel_sdvo_preferred_input_timing_args args;
685
686 memset(&args, 0, sizeof(args));
687 args.clock = clock;
688 args.width = width;
689 args.height = height;
690 args.interlace = 0;
691
692 if (psb_intel_sdvo->is_lvds &&
693 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
694 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
695 args.scaled = 1;
696
697 return psb_intel_sdvo_set_value(psb_intel_sdvo,
698 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
699 &args, sizeof(args));
700 }
701
psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_dtd * dtd)702 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
703 struct psb_intel_sdvo_dtd *dtd)
704 {
705 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
706 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
707 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
708 &dtd->part1, sizeof(dtd->part1)) &&
709 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
710 &dtd->part2, sizeof(dtd->part2));
711 }
712
psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo * psb_intel_sdvo,u8 val)713 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
714 {
715 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
716 }
717
psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd * dtd,const struct drm_display_mode * mode)718 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
719 const struct drm_display_mode *mode)
720 {
721 uint16_t width, height;
722 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
723 uint16_t h_sync_offset, v_sync_offset;
724
725 width = mode->crtc_hdisplay;
726 height = mode->crtc_vdisplay;
727
728 /* do some mode translations */
729 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
730 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
731
732 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
733 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
734
735 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
736 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
737
738 dtd->part1.clock = mode->clock / 10;
739 dtd->part1.h_active = width & 0xff;
740 dtd->part1.h_blank = h_blank_len & 0xff;
741 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
742 ((h_blank_len >> 8) & 0xf);
743 dtd->part1.v_active = height & 0xff;
744 dtd->part1.v_blank = v_blank_len & 0xff;
745 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
746 ((v_blank_len >> 8) & 0xf);
747
748 dtd->part2.h_sync_off = h_sync_offset & 0xff;
749 dtd->part2.h_sync_width = h_sync_len & 0xff;
750 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
751 (v_sync_len & 0xf);
752 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
753 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
754 ((v_sync_len & 0x30) >> 4);
755
756 dtd->part2.dtd_flags = 0x18;
757 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
758 dtd->part2.dtd_flags |= 0x2;
759 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
760 dtd->part2.dtd_flags |= 0x4;
761
762 dtd->part2.sdvo_flags = 0;
763 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
764 dtd->part2.reserved = 0;
765 }
766
psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,const struct psb_intel_sdvo_dtd * dtd)767 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
768 const struct psb_intel_sdvo_dtd *dtd)
769 {
770 mode->hdisplay = dtd->part1.h_active;
771 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
772 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
773 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
774 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
775 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
776 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
777 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
778
779 mode->vdisplay = dtd->part1.v_active;
780 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
781 mode->vsync_start = mode->vdisplay;
782 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
783 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
784 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
785 mode->vsync_end = mode->vsync_start +
786 (dtd->part2.v_sync_off_width & 0xf);
787 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
788 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
789 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
790
791 mode->clock = dtd->part1.clock * 10;
792
793 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
794 if (dtd->part2.dtd_flags & 0x2)
795 mode->flags |= DRM_MODE_FLAG_PHSYNC;
796 if (dtd->part2.dtd_flags & 0x4)
797 mode->flags |= DRM_MODE_FLAG_PVSYNC;
798 }
799
psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo * psb_intel_sdvo)800 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
801 {
802 struct psb_intel_sdvo_encode encode;
803
804 BUILD_BUG_ON(sizeof(encode) != 2);
805 return psb_intel_sdvo_get_value(psb_intel_sdvo,
806 SDVO_CMD_GET_SUPP_ENCODE,
807 &encode, sizeof(encode));
808 }
809
psb_intel_sdvo_set_encode(struct psb_intel_sdvo * psb_intel_sdvo,uint8_t mode)810 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
811 uint8_t mode)
812 {
813 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
814 }
815
psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo * psb_intel_sdvo,uint8_t mode)816 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
817 uint8_t mode)
818 {
819 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
820 }
821
822 #if 0
823 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
824 {
825 int i, j;
826 uint8_t set_buf_index[2];
827 uint8_t av_split;
828 uint8_t buf_size;
829 uint8_t buf[48];
830 uint8_t *pos;
831
832 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
833
834 for (i = 0; i <= av_split; i++) {
835 set_buf_index[0] = i; set_buf_index[1] = 0;
836 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
837 set_buf_index, 2);
838 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
839 psb_intel_sdvo_read_response(encoder, &buf_size, 1);
840
841 pos = buf;
842 for (j = 0; j <= buf_size; j += 8) {
843 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
844 NULL, 0);
845 psb_intel_sdvo_read_response(encoder, pos, 8);
846 pos += 8;
847 }
848 }
849 }
850 #endif
851
psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo * psb_intel_sdvo)852 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
853 {
854 DRM_INFO("HDMI is not supported yet");
855
856 return false;
857 #if 0
858 struct dip_infoframe avi_if = {
859 .type = DIP_TYPE_AVI,
860 .ver = DIP_VERSION_AVI,
861 .len = DIP_LEN_AVI,
862 };
863 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
864 uint8_t set_buf_index[2] = { 1, 0 };
865 uint64_t *data = (uint64_t *)&avi_if;
866 unsigned i;
867
868 intel_dip_infoframe_csum(&avi_if);
869
870 if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
871 SDVO_CMD_SET_HBUF_INDEX,
872 set_buf_index, 2))
873 return false;
874
875 for (i = 0; i < sizeof(avi_if); i += 8) {
876 if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
877 SDVO_CMD_SET_HBUF_DATA,
878 data, 8))
879 return false;
880 data++;
881 }
882
883 return psb_intel_sdvo_set_value(psb_intel_sdvo,
884 SDVO_CMD_SET_HBUF_TXRATE,
885 &tx_rate, 1);
886 #endif
887 }
888
psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo * psb_intel_sdvo)889 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
890 {
891 struct psb_intel_sdvo_tv_format format;
892 uint32_t format_map;
893
894 format_map = 1 << psb_intel_sdvo->tv_format_index;
895 memset(&format, 0, sizeof(format));
896 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
897
898 BUILD_BUG_ON(sizeof(format) != 6);
899 return psb_intel_sdvo_set_value(psb_intel_sdvo,
900 SDVO_CMD_SET_TV_FORMAT,
901 &format, sizeof(format));
902 }
903
904 static bool
psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo * psb_intel_sdvo,const struct drm_display_mode * mode)905 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
906 const struct drm_display_mode *mode)
907 {
908 struct psb_intel_sdvo_dtd output_dtd;
909
910 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
911 psb_intel_sdvo->attached_output))
912 return false;
913
914 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
915 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
916 return false;
917
918 return true;
919 }
920
921 static bool
psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo * psb_intel_sdvo,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)922 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
923 const struct drm_display_mode *mode,
924 struct drm_display_mode *adjusted_mode)
925 {
926 /* Reset the input timing to the screen. Assume always input 0. */
927 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
928 return false;
929
930 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
931 mode->clock / 10,
932 mode->hdisplay,
933 mode->vdisplay))
934 return false;
935
936 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
937 &psb_intel_sdvo->input_dtd))
938 return false;
939
940 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
941
942 drm_mode_set_crtcinfo(adjusted_mode, 0);
943 return true;
944 }
945
psb_intel_sdvo_mode_fixup(struct drm_encoder * encoder,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)946 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
947 const struct drm_display_mode *mode,
948 struct drm_display_mode *adjusted_mode)
949 {
950 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
951 int multiplier;
952
953 /* We need to construct preferred input timings based on our
954 * output timings. To do that, we have to set the output
955 * timings, even though this isn't really the right place in
956 * the sequence to do it. Oh well.
957 */
958 if (psb_intel_sdvo->is_tv) {
959 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
960 return false;
961
962 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
963 mode,
964 adjusted_mode);
965 } else if (psb_intel_sdvo->is_lvds) {
966 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
967 psb_intel_sdvo->sdvo_lvds_fixed_mode))
968 return false;
969
970 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
971 mode,
972 adjusted_mode);
973 }
974
975 /* Make the CRTC code factor in the SDVO pixel multiplier. The
976 * SDVO device will factor out the multiplier during mode_set.
977 */
978 multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
979 psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
980
981 return true;
982 }
983
psb_intel_sdvo_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)984 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
985 struct drm_display_mode *mode,
986 struct drm_display_mode *adjusted_mode)
987 {
988 struct drm_device *dev = encoder->dev;
989 struct drm_crtc *crtc = encoder->crtc;
990 struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
991 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
992 u32 sdvox;
993 struct psb_intel_sdvo_in_out_map in_out;
994 struct psb_intel_sdvo_dtd input_dtd;
995 int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode);
996 int rate;
997
998 if (!mode)
999 return;
1000
1001 /* First, set the input mapping for the first input to our controlled
1002 * output. This is only correct if we're a single-input device, in
1003 * which case the first input is the output from the appropriate SDVO
1004 * channel on the motherboard. In a two-input device, the first input
1005 * will be SDVOB and the second SDVOC.
1006 */
1007 in_out.in0 = psb_intel_sdvo->attached_output;
1008 in_out.in1 = 0;
1009
1010 psb_intel_sdvo_set_value(psb_intel_sdvo,
1011 SDVO_CMD_SET_IN_OUT_MAP,
1012 &in_out, sizeof(in_out));
1013
1014 /* Set the output timings to the screen */
1015 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1016 psb_intel_sdvo->attached_output))
1017 return;
1018
1019 /* We have tried to get input timing in mode_fixup, and filled into
1020 * adjusted_mode.
1021 */
1022 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1023 input_dtd = psb_intel_sdvo->input_dtd;
1024 } else {
1025 /* Set the output timing to the screen */
1026 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1027 psb_intel_sdvo->attached_output))
1028 return;
1029
1030 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1031 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1032 }
1033
1034 /* Set the input timing to the screen. Assume always input 0. */
1035 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1036 return;
1037
1038 if (psb_intel_sdvo->has_hdmi_monitor) {
1039 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1040 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1041 SDVO_COLORIMETRY_RGB256);
1042 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1043 } else
1044 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1045
1046 if (psb_intel_sdvo->is_tv &&
1047 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1048 return;
1049
1050 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1051
1052 switch (pixel_multiplier) {
1053 default:
1054 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1055 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1056 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1057 }
1058 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1059 return;
1060
1061 /* Set the SDVO control regs. */
1062 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1063 switch (psb_intel_sdvo->sdvo_reg) {
1064 case SDVOB:
1065 sdvox &= SDVOB_PRESERVE_MASK;
1066 break;
1067 case SDVOC:
1068 sdvox &= SDVOC_PRESERVE_MASK;
1069 break;
1070 }
1071 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1072
1073 if (psb_intel_crtc->pipe == 1)
1074 sdvox |= SDVO_PIPE_B_SELECT;
1075 if (psb_intel_sdvo->has_hdmi_audio)
1076 sdvox |= SDVO_AUDIO_ENABLE;
1077
1078 /* FIXME: Check if this is needed for PSB
1079 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1080 */
1081
1082 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1083 sdvox |= SDVO_STALL_SELECT;
1084 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1085 }
1086
psb_intel_sdvo_dpms(struct drm_encoder * encoder,int mode)1087 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1088 {
1089 struct drm_device *dev = encoder->dev;
1090 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1091 u32 temp;
1092
1093 switch (mode) {
1094 case DRM_MODE_DPMS_ON:
1095 DRM_DEBUG("DPMS_ON");
1096 break;
1097 case DRM_MODE_DPMS_OFF:
1098 DRM_DEBUG("DPMS_OFF");
1099 break;
1100 default:
1101 DRM_DEBUG("DPMS: %d", mode);
1102 }
1103
1104 if (mode != DRM_MODE_DPMS_ON) {
1105 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1106 if (0)
1107 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1108
1109 if (mode == DRM_MODE_DPMS_OFF) {
1110 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1111 if ((temp & SDVO_ENABLE) != 0) {
1112 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1113 }
1114 }
1115 } else {
1116 bool input1, input2;
1117 int i;
1118 u8 status;
1119
1120 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1121 if ((temp & SDVO_ENABLE) == 0)
1122 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1123 for (i = 0; i < 2; i++)
1124 psb_intel_wait_for_vblank(dev);
1125
1126 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1127 /* Warn if the device reported failure to sync.
1128 * A lot of SDVO devices fail to notify of sync, but it's
1129 * a given it the status is a success, we succeeded.
1130 */
1131 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1132 DRM_DEBUG_KMS("First %s output reported failure to "
1133 "sync\n", SDVO_NAME(psb_intel_sdvo));
1134 }
1135
1136 if (0)
1137 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1138 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1139 }
1140 return;
1141 }
1142
psb_intel_sdvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)1143 static int psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1144 struct drm_display_mode *mode)
1145 {
1146 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1147
1148 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1149 return MODE_NO_DBLESCAN;
1150
1151 if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1152 return MODE_CLOCK_LOW;
1153
1154 if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1155 return MODE_CLOCK_HIGH;
1156
1157 if (psb_intel_sdvo->is_lvds) {
1158 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1159 return MODE_PANEL;
1160
1161 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1162 return MODE_PANEL;
1163 }
1164
1165 return MODE_OK;
1166 }
1167
psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_caps * caps)1168 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1169 {
1170 BUILD_BUG_ON(sizeof(*caps) != 8);
1171 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1172 SDVO_CMD_GET_DEVICE_CAPS,
1173 caps, sizeof(*caps)))
1174 return false;
1175
1176 DRM_DEBUG_KMS("SDVO capabilities:\n"
1177 " vendor_id: %d\n"
1178 " device_id: %d\n"
1179 " device_rev_id: %d\n"
1180 " sdvo_version_major: %d\n"
1181 " sdvo_version_minor: %d\n"
1182 " sdvo_inputs_mask: %d\n"
1183 " smooth_scaling: %d\n"
1184 " sharp_scaling: %d\n"
1185 " up_scaling: %d\n"
1186 " down_scaling: %d\n"
1187 " stall_support: %d\n"
1188 " output_flags: %d\n",
1189 caps->vendor_id,
1190 caps->device_id,
1191 caps->device_rev_id,
1192 caps->sdvo_version_major,
1193 caps->sdvo_version_minor,
1194 caps->sdvo_inputs_mask,
1195 caps->smooth_scaling,
1196 caps->sharp_scaling,
1197 caps->up_scaling,
1198 caps->down_scaling,
1199 caps->stall_support,
1200 caps->output_flags);
1201
1202 return true;
1203 }
1204
1205 /* No use! */
1206 #if 0
1207 struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB)
1208 {
1209 struct drm_connector *connector = NULL;
1210 struct psb_intel_sdvo *iout = NULL;
1211 struct psb_intel_sdvo *sdvo;
1212
1213 /* find the sdvo connector */
1214 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1215 iout = to_psb_intel_sdvo(connector);
1216
1217 if (iout->type != INTEL_OUTPUT_SDVO)
1218 continue;
1219
1220 sdvo = iout->dev_priv;
1221
1222 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1223 return connector;
1224
1225 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1226 return connector;
1227
1228 }
1229
1230 return NULL;
1231 }
1232
1233 int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector)
1234 {
1235 u8 response[2];
1236 u8 status;
1237 struct psb_intel_sdvo *psb_intel_sdvo;
1238 DRM_DEBUG_KMS("\n");
1239
1240 if (!connector)
1241 return 0;
1242
1243 psb_intel_sdvo = to_psb_intel_sdvo(connector);
1244
1245 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1246 &response, 2) && response[0];
1247 }
1248
1249 void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1250 {
1251 u8 response[2];
1252 u8 status;
1253 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector);
1254
1255 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1256 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1257
1258 if (on) {
1259 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1260 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1261
1262 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1263 } else {
1264 response[0] = 0;
1265 response[1] = 0;
1266 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1267 }
1268
1269 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1270 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1271 }
1272 #endif
1273
1274 static bool
psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo * psb_intel_sdvo)1275 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1276 {
1277 /* Is there more than one type of output? */
1278 int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1279 return caps & -caps;
1280 }
1281
1282 static struct edid *
psb_intel_sdvo_get_edid(struct drm_connector * connector)1283 psb_intel_sdvo_get_edid(struct drm_connector *connector)
1284 {
1285 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1286 return drm_get_edid(connector, &sdvo->ddc);
1287 }
1288
1289 /* Mac mini hack -- use the same DDC as the analog connector */
1290 static struct edid *
psb_intel_sdvo_get_analog_edid(struct drm_connector * connector)1291 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1292 {
1293 struct drm_psb_private *dev_priv = connector->dev->dev_private;
1294
1295 return drm_get_edid(connector,
1296 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1297 }
1298
1299 static enum drm_connector_status
psb_intel_sdvo_hdmi_sink_detect(struct drm_connector * connector)1300 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1301 {
1302 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1303 enum drm_connector_status status;
1304 struct edid *edid;
1305
1306 edid = psb_intel_sdvo_get_edid(connector);
1307
1308 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1309 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1310
1311 /*
1312 * Don't use the 1 as the argument of DDC bus switch to get
1313 * the EDID. It is used for SDVO SPD ROM.
1314 */
1315 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1316 psb_intel_sdvo->ddc_bus = ddc;
1317 edid = psb_intel_sdvo_get_edid(connector);
1318 if (edid)
1319 break;
1320 }
1321 /*
1322 * If we found the EDID on the other bus,
1323 * assume that is the correct DDC bus.
1324 */
1325 if (edid == NULL)
1326 psb_intel_sdvo->ddc_bus = saved_ddc;
1327 }
1328
1329 /*
1330 * When there is no edid and no monitor is connected with VGA
1331 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1332 */
1333 if (edid == NULL)
1334 edid = psb_intel_sdvo_get_analog_edid(connector);
1335
1336 status = connector_status_unknown;
1337 if (edid != NULL) {
1338 /* DDC bus is shared, match EDID to connector type */
1339 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1340 status = connector_status_connected;
1341 if (psb_intel_sdvo->is_hdmi) {
1342 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1343 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1344 }
1345 } else
1346 status = connector_status_disconnected;
1347 kfree(edid);
1348 }
1349
1350 if (status == connector_status_connected) {
1351 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1352 if (psb_intel_sdvo_connector->force_audio)
1353 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1354 }
1355
1356 return status;
1357 }
1358
1359 static enum drm_connector_status
psb_intel_sdvo_detect(struct drm_connector * connector,bool force)1360 psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1361 {
1362 uint16_t response;
1363 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1364 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1365 enum drm_connector_status ret;
1366
1367 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1368 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1369 return connector_status_unknown;
1370
1371 /* add 30ms delay when the output type might be TV */
1372 if (psb_intel_sdvo->caps.output_flags &
1373 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1374 mdelay(30);
1375
1376 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1377 return connector_status_unknown;
1378
1379 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1380 response & 0xff, response >> 8,
1381 psb_intel_sdvo_connector->output_flag);
1382
1383 if (response == 0)
1384 return connector_status_disconnected;
1385
1386 psb_intel_sdvo->attached_output = response;
1387
1388 psb_intel_sdvo->has_hdmi_monitor = false;
1389 psb_intel_sdvo->has_hdmi_audio = false;
1390
1391 if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1392 ret = connector_status_disconnected;
1393 else if (IS_TMDS(psb_intel_sdvo_connector))
1394 ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1395 else {
1396 struct edid *edid;
1397
1398 /* if we have an edid check it matches the connection */
1399 edid = psb_intel_sdvo_get_edid(connector);
1400 if (edid == NULL)
1401 edid = psb_intel_sdvo_get_analog_edid(connector);
1402 if (edid != NULL) {
1403 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1404 ret = connector_status_disconnected;
1405 else
1406 ret = connector_status_connected;
1407 kfree(edid);
1408 } else
1409 ret = connector_status_connected;
1410 }
1411
1412 /* May update encoder flag for like clock for SDVO TV, etc.*/
1413 if (ret == connector_status_connected) {
1414 psb_intel_sdvo->is_tv = false;
1415 psb_intel_sdvo->is_lvds = false;
1416 psb_intel_sdvo->base.needs_tv_clock = false;
1417
1418 if (response & SDVO_TV_MASK) {
1419 psb_intel_sdvo->is_tv = true;
1420 psb_intel_sdvo->base.needs_tv_clock = true;
1421 }
1422 if (response & SDVO_LVDS_MASK)
1423 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1424 }
1425
1426 return ret;
1427 }
1428
psb_intel_sdvo_get_ddc_modes(struct drm_connector * connector)1429 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1430 {
1431 struct edid *edid;
1432
1433 /* set the bus switch and get the modes */
1434 edid = psb_intel_sdvo_get_edid(connector);
1435
1436 /*
1437 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1438 * link between analog and digital outputs. So, if the regular SDVO
1439 * DDC fails, check to see if the analog output is disconnected, in
1440 * which case we'll look there for the digital DDC data.
1441 */
1442 if (edid == NULL)
1443 edid = psb_intel_sdvo_get_analog_edid(connector);
1444
1445 if (edid != NULL) {
1446 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1447 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1448 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1449
1450 if (connector_is_digital == monitor_is_digital) {
1451 drm_mode_connector_update_edid_property(connector, edid);
1452 drm_add_edid_modes(connector, edid);
1453 }
1454
1455 kfree(edid);
1456 }
1457 }
1458
1459 /*
1460 * Set of SDVO TV modes.
1461 * Note! This is in reply order (see loop in get_tv_modes).
1462 * XXX: all 60Hz refresh?
1463 */
1464 static const struct drm_display_mode sdvo_tv_modes[] = {
1465 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1466 416, 0, 200, 201, 232, 233, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1469 416, 0, 240, 241, 272, 273, 0,
1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1471 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1472 496, 0, 300, 301, 332, 333, 0,
1473 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1474 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1475 736, 0, 350, 351, 382, 383, 0,
1476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1477 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1478 736, 0, 400, 401, 432, 433, 0,
1479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1481 736, 0, 480, 481, 512, 513, 0,
1482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1483 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1484 800, 0, 480, 481, 512, 513, 0,
1485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1487 800, 0, 576, 577, 608, 609, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1490 816, 0, 350, 351, 382, 383, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1493 816, 0, 400, 401, 432, 433, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1496 816, 0, 480, 481, 512, 513, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1499 816, 0, 540, 541, 572, 573, 0,
1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1502 816, 0, 576, 577, 608, 609, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1505 864, 0, 576, 577, 608, 609, 0,
1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1508 896, 0, 600, 601, 632, 633, 0,
1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1511 928, 0, 624, 625, 656, 657, 0,
1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1514 1016, 0, 766, 767, 798, 799, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1517 1120, 0, 768, 769, 800, 801, 0,
1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1520 1376, 0, 1024, 1025, 1056, 1057, 0,
1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 };
1523
psb_intel_sdvo_get_tv_modes(struct drm_connector * connector)1524 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1525 {
1526 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1527 struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1528 uint32_t reply = 0, format_map = 0;
1529 int i;
1530
1531 /* Read the list of supported input resolutions for the selected TV
1532 * format.
1533 */
1534 format_map = 1 << psb_intel_sdvo->tv_format_index;
1535 memcpy(&tv_res, &format_map,
1536 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1537
1538 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1539 return;
1540
1541 BUILD_BUG_ON(sizeof(tv_res) != 3);
1542 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1543 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1544 &tv_res, sizeof(tv_res)))
1545 return;
1546 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1547 return;
1548
1549 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1550 if (reply & (1 << i)) {
1551 struct drm_display_mode *nmode;
1552 nmode = drm_mode_duplicate(connector->dev,
1553 &sdvo_tv_modes[i]);
1554 if (nmode)
1555 drm_mode_probed_add(connector, nmode);
1556 }
1557 }
1558
psb_intel_sdvo_get_lvds_modes(struct drm_connector * connector)1559 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1560 {
1561 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1562 struct drm_psb_private *dev_priv = connector->dev->dev_private;
1563 struct drm_display_mode *newmode;
1564
1565 /*
1566 * Attempt to get the mode list from DDC.
1567 * Assume that the preferred modes are
1568 * arranged in priority order.
1569 */
1570 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1571 if (list_empty(&connector->probed_modes) == false)
1572 goto end;
1573
1574 /* Fetch modes from VBT */
1575 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1576 newmode = drm_mode_duplicate(connector->dev,
1577 dev_priv->sdvo_lvds_vbt_mode);
1578 if (newmode != NULL) {
1579 /* Guarantee the mode is preferred */
1580 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1581 DRM_MODE_TYPE_DRIVER);
1582 drm_mode_probed_add(connector, newmode);
1583 }
1584 }
1585
1586 end:
1587 list_for_each_entry(newmode, &connector->probed_modes, head) {
1588 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1589 psb_intel_sdvo->sdvo_lvds_fixed_mode =
1590 drm_mode_duplicate(connector->dev, newmode);
1591
1592 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1593 0);
1594
1595 psb_intel_sdvo->is_lvds = true;
1596 break;
1597 }
1598 }
1599
1600 }
1601
psb_intel_sdvo_get_modes(struct drm_connector * connector)1602 static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1603 {
1604 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1605
1606 if (IS_TV(psb_intel_sdvo_connector))
1607 psb_intel_sdvo_get_tv_modes(connector);
1608 else if (IS_LVDS(psb_intel_sdvo_connector))
1609 psb_intel_sdvo_get_lvds_modes(connector);
1610 else
1611 psb_intel_sdvo_get_ddc_modes(connector);
1612
1613 return !list_empty(&connector->probed_modes);
1614 }
1615
1616 static void
psb_intel_sdvo_destroy_enhance_property(struct drm_connector * connector)1617 psb_intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1618 {
1619 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1620 struct drm_device *dev = connector->dev;
1621
1622 if (psb_intel_sdvo_connector->left)
1623 drm_property_destroy(dev, psb_intel_sdvo_connector->left);
1624 if (psb_intel_sdvo_connector->right)
1625 drm_property_destroy(dev, psb_intel_sdvo_connector->right);
1626 if (psb_intel_sdvo_connector->top)
1627 drm_property_destroy(dev, psb_intel_sdvo_connector->top);
1628 if (psb_intel_sdvo_connector->bottom)
1629 drm_property_destroy(dev, psb_intel_sdvo_connector->bottom);
1630 if (psb_intel_sdvo_connector->hpos)
1631 drm_property_destroy(dev, psb_intel_sdvo_connector->hpos);
1632 if (psb_intel_sdvo_connector->vpos)
1633 drm_property_destroy(dev, psb_intel_sdvo_connector->vpos);
1634 if (psb_intel_sdvo_connector->saturation)
1635 drm_property_destroy(dev, psb_intel_sdvo_connector->saturation);
1636 if (psb_intel_sdvo_connector->contrast)
1637 drm_property_destroy(dev, psb_intel_sdvo_connector->contrast);
1638 if (psb_intel_sdvo_connector->hue)
1639 drm_property_destroy(dev, psb_intel_sdvo_connector->hue);
1640 if (psb_intel_sdvo_connector->sharpness)
1641 drm_property_destroy(dev, psb_intel_sdvo_connector->sharpness);
1642 if (psb_intel_sdvo_connector->flicker_filter)
1643 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter);
1644 if (psb_intel_sdvo_connector->flicker_filter_2d)
1645 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter_2d);
1646 if (psb_intel_sdvo_connector->flicker_filter_adaptive)
1647 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter_adaptive);
1648 if (psb_intel_sdvo_connector->tv_luma_filter)
1649 drm_property_destroy(dev, psb_intel_sdvo_connector->tv_luma_filter);
1650 if (psb_intel_sdvo_connector->tv_chroma_filter)
1651 drm_property_destroy(dev, psb_intel_sdvo_connector->tv_chroma_filter);
1652 if (psb_intel_sdvo_connector->dot_crawl)
1653 drm_property_destroy(dev, psb_intel_sdvo_connector->dot_crawl);
1654 if (psb_intel_sdvo_connector->brightness)
1655 drm_property_destroy(dev, psb_intel_sdvo_connector->brightness);
1656 }
1657
psb_intel_sdvo_destroy(struct drm_connector * connector)1658 static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1659 {
1660 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1661
1662 if (psb_intel_sdvo_connector->tv_format)
1663 drm_property_destroy(connector->dev,
1664 psb_intel_sdvo_connector->tv_format);
1665
1666 psb_intel_sdvo_destroy_enhance_property(connector);
1667 drm_sysfs_connector_remove(connector);
1668 drm_connector_cleanup(connector);
1669 kfree(connector);
1670 }
1671
psb_intel_sdvo_detect_hdmi_audio(struct drm_connector * connector)1672 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1673 {
1674 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1675 struct edid *edid;
1676 bool has_audio = false;
1677
1678 if (!psb_intel_sdvo->is_hdmi)
1679 return false;
1680
1681 edid = psb_intel_sdvo_get_edid(connector);
1682 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1683 has_audio = drm_detect_monitor_audio(edid);
1684
1685 return has_audio;
1686 }
1687
1688 static int
psb_intel_sdvo_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t val)1689 psb_intel_sdvo_set_property(struct drm_connector *connector,
1690 struct drm_property *property,
1691 uint64_t val)
1692 {
1693 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1694 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1695 struct drm_psb_private *dev_priv = connector->dev->dev_private;
1696 uint16_t temp_value;
1697 uint8_t cmd;
1698 int ret;
1699
1700 ret = drm_object_property_set_value(&connector->base, property, val);
1701 if (ret)
1702 return ret;
1703
1704 if (property == dev_priv->force_audio_property) {
1705 int i = val;
1706 bool has_audio;
1707
1708 if (i == psb_intel_sdvo_connector->force_audio)
1709 return 0;
1710
1711 psb_intel_sdvo_connector->force_audio = i;
1712
1713 if (i == 0)
1714 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1715 else
1716 has_audio = i > 0;
1717
1718 if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1719 return 0;
1720
1721 psb_intel_sdvo->has_hdmi_audio = has_audio;
1722 goto done;
1723 }
1724
1725 if (property == dev_priv->broadcast_rgb_property) {
1726 if (val == !!psb_intel_sdvo->color_range)
1727 return 0;
1728
1729 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1730 goto done;
1731 }
1732
1733 #define CHECK_PROPERTY(name, NAME) \
1734 if (psb_intel_sdvo_connector->name == property) { \
1735 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1736 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1737 cmd = SDVO_CMD_SET_##NAME; \
1738 psb_intel_sdvo_connector->cur_##name = temp_value; \
1739 goto set_value; \
1740 }
1741
1742 if (property == psb_intel_sdvo_connector->tv_format) {
1743 if (val >= TV_FORMAT_NUM)
1744 return -EINVAL;
1745
1746 if (psb_intel_sdvo->tv_format_index ==
1747 psb_intel_sdvo_connector->tv_format_supported[val])
1748 return 0;
1749
1750 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1751 goto done;
1752 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1753 temp_value = val;
1754 if (psb_intel_sdvo_connector->left == property) {
1755 drm_object_property_set_value(&connector->base,
1756 psb_intel_sdvo_connector->right, val);
1757 if (psb_intel_sdvo_connector->left_margin == temp_value)
1758 return 0;
1759
1760 psb_intel_sdvo_connector->left_margin = temp_value;
1761 psb_intel_sdvo_connector->right_margin = temp_value;
1762 temp_value = psb_intel_sdvo_connector->max_hscan -
1763 psb_intel_sdvo_connector->left_margin;
1764 cmd = SDVO_CMD_SET_OVERSCAN_H;
1765 goto set_value;
1766 } else if (psb_intel_sdvo_connector->right == property) {
1767 drm_object_property_set_value(&connector->base,
1768 psb_intel_sdvo_connector->left, val);
1769 if (psb_intel_sdvo_connector->right_margin == temp_value)
1770 return 0;
1771
1772 psb_intel_sdvo_connector->left_margin = temp_value;
1773 psb_intel_sdvo_connector->right_margin = temp_value;
1774 temp_value = psb_intel_sdvo_connector->max_hscan -
1775 psb_intel_sdvo_connector->left_margin;
1776 cmd = SDVO_CMD_SET_OVERSCAN_H;
1777 goto set_value;
1778 } else if (psb_intel_sdvo_connector->top == property) {
1779 drm_object_property_set_value(&connector->base,
1780 psb_intel_sdvo_connector->bottom, val);
1781 if (psb_intel_sdvo_connector->top_margin == temp_value)
1782 return 0;
1783
1784 psb_intel_sdvo_connector->top_margin = temp_value;
1785 psb_intel_sdvo_connector->bottom_margin = temp_value;
1786 temp_value = psb_intel_sdvo_connector->max_vscan -
1787 psb_intel_sdvo_connector->top_margin;
1788 cmd = SDVO_CMD_SET_OVERSCAN_V;
1789 goto set_value;
1790 } else if (psb_intel_sdvo_connector->bottom == property) {
1791 drm_object_property_set_value(&connector->base,
1792 psb_intel_sdvo_connector->top, val);
1793 if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1794 return 0;
1795
1796 psb_intel_sdvo_connector->top_margin = temp_value;
1797 psb_intel_sdvo_connector->bottom_margin = temp_value;
1798 temp_value = psb_intel_sdvo_connector->max_vscan -
1799 psb_intel_sdvo_connector->top_margin;
1800 cmd = SDVO_CMD_SET_OVERSCAN_V;
1801 goto set_value;
1802 }
1803 CHECK_PROPERTY(hpos, HPOS)
1804 CHECK_PROPERTY(vpos, VPOS)
1805 CHECK_PROPERTY(saturation, SATURATION)
1806 CHECK_PROPERTY(contrast, CONTRAST)
1807 CHECK_PROPERTY(hue, HUE)
1808 CHECK_PROPERTY(brightness, BRIGHTNESS)
1809 CHECK_PROPERTY(sharpness, SHARPNESS)
1810 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1811 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1812 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1813 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1814 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1815 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1816 }
1817
1818 return -EINVAL; /* unknown property */
1819
1820 set_value:
1821 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1822 return -EIO;
1823
1824
1825 done:
1826 if (psb_intel_sdvo->base.base.crtc) {
1827 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1828 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1829 crtc->y, crtc->fb);
1830 }
1831
1832 return 0;
1833 #undef CHECK_PROPERTY
1834 }
1835
psb_intel_sdvo_save(struct drm_connector * connector)1836 static void psb_intel_sdvo_save(struct drm_connector *connector)
1837 {
1838 struct drm_device *dev = connector->dev;
1839 struct psb_intel_encoder *psb_intel_encoder =
1840 psb_intel_attached_encoder(connector);
1841 struct psb_intel_sdvo *sdvo =
1842 to_psb_intel_sdvo(&psb_intel_encoder->base);
1843
1844 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1845 }
1846
psb_intel_sdvo_restore(struct drm_connector * connector)1847 static void psb_intel_sdvo_restore(struct drm_connector *connector)
1848 {
1849 struct drm_device *dev = connector->dev;
1850 struct drm_encoder *encoder =
1851 &psb_intel_attached_encoder(connector)->base;
1852 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1853 struct drm_crtc *crtc = encoder->crtc;
1854
1855 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1856
1857 /* Force a full mode set on the crtc. We're supposed to have the
1858 mode_config lock already. */
1859 if (connector->status == connector_status_connected)
1860 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1861 NULL);
1862 }
1863
1864 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1865 .dpms = psb_intel_sdvo_dpms,
1866 .mode_fixup = psb_intel_sdvo_mode_fixup,
1867 .prepare = psb_intel_encoder_prepare,
1868 .mode_set = psb_intel_sdvo_mode_set,
1869 .commit = psb_intel_encoder_commit,
1870 };
1871
1872 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1873 .dpms = drm_helper_connector_dpms,
1874 .save = psb_intel_sdvo_save,
1875 .restore = psb_intel_sdvo_restore,
1876 .detect = psb_intel_sdvo_detect,
1877 .fill_modes = drm_helper_probe_single_connector_modes,
1878 .set_property = psb_intel_sdvo_set_property,
1879 .destroy = psb_intel_sdvo_destroy,
1880 };
1881
1882 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1883 .get_modes = psb_intel_sdvo_get_modes,
1884 .mode_valid = psb_intel_sdvo_mode_valid,
1885 .best_encoder = psb_intel_best_encoder,
1886 };
1887
psb_intel_sdvo_enc_destroy(struct drm_encoder * encoder)1888 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1889 {
1890 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1891
1892 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1893 drm_mode_destroy(encoder->dev,
1894 psb_intel_sdvo->sdvo_lvds_fixed_mode);
1895
1896 i2c_del_adapter(&psb_intel_sdvo->ddc);
1897 psb_intel_encoder_destroy(encoder);
1898 }
1899
1900 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1901 .destroy = psb_intel_sdvo_enc_destroy,
1902 };
1903
1904 static void
psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo * sdvo)1905 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1906 {
1907 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1908 * We need to figure out if this is true for all available poulsbo
1909 * hardware, or if we need to fiddle with the guessing code above.
1910 * The problem might go away if we can parse sdvo mappings from bios */
1911 sdvo->ddc_bus = 2;
1912
1913 #if 0
1914 uint16_t mask = 0;
1915 unsigned int num_bits;
1916
1917 /* Make a mask of outputs less than or equal to our own priority in the
1918 * list.
1919 */
1920 switch (sdvo->controlled_output) {
1921 case SDVO_OUTPUT_LVDS1:
1922 mask |= SDVO_OUTPUT_LVDS1;
1923 case SDVO_OUTPUT_LVDS0:
1924 mask |= SDVO_OUTPUT_LVDS0;
1925 case SDVO_OUTPUT_TMDS1:
1926 mask |= SDVO_OUTPUT_TMDS1;
1927 case SDVO_OUTPUT_TMDS0:
1928 mask |= SDVO_OUTPUT_TMDS0;
1929 case SDVO_OUTPUT_RGB1:
1930 mask |= SDVO_OUTPUT_RGB1;
1931 case SDVO_OUTPUT_RGB0:
1932 mask |= SDVO_OUTPUT_RGB0;
1933 break;
1934 }
1935
1936 /* Count bits to find what number we are in the priority list. */
1937 mask &= sdvo->caps.output_flags;
1938 num_bits = hweight16(mask);
1939 /* If more than 3 outputs, default to DDC bus 3 for now. */
1940 if (num_bits > 3)
1941 num_bits = 3;
1942
1943 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1944 sdvo->ddc_bus = 1 << num_bits;
1945 #endif
1946 }
1947
1948 /**
1949 * Choose the appropriate DDC bus for control bus switch command for this
1950 * SDVO output based on the controlled output.
1951 *
1952 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1953 * outputs, then LVDS outputs.
1954 */
1955 static void
psb_intel_sdvo_select_ddc_bus(struct drm_psb_private * dev_priv,struct psb_intel_sdvo * sdvo,u32 reg)1956 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1957 struct psb_intel_sdvo *sdvo, u32 reg)
1958 {
1959 struct sdvo_device_mapping *mapping;
1960
1961 if (IS_SDVOB(reg))
1962 mapping = &(dev_priv->sdvo_mappings[0]);
1963 else
1964 mapping = &(dev_priv->sdvo_mappings[1]);
1965
1966 if (mapping->initialized)
1967 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1968 else
1969 psb_intel_sdvo_guess_ddc_bus(sdvo);
1970 }
1971
1972 static void
psb_intel_sdvo_select_i2c_bus(struct drm_psb_private * dev_priv,struct psb_intel_sdvo * sdvo,u32 reg)1973 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1974 struct psb_intel_sdvo *sdvo, u32 reg)
1975 {
1976 struct sdvo_device_mapping *mapping;
1977 u8 pin, speed;
1978
1979 if (IS_SDVOB(reg))
1980 mapping = &dev_priv->sdvo_mappings[0];
1981 else
1982 mapping = &dev_priv->sdvo_mappings[1];
1983
1984 pin = GMBUS_PORT_DPB;
1985 speed = GMBUS_RATE_1MHZ >> 8;
1986 if (mapping->initialized) {
1987 pin = mapping->i2c_pin;
1988 speed = mapping->i2c_speed;
1989 }
1990
1991 if (pin < GMBUS_NUM_PORTS) {
1992 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1993 gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1994 gma_intel_gmbus_force_bit(sdvo->i2c, true);
1995 } else
1996 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1997 }
1998
1999 static bool
psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo * psb_intel_sdvo,int device)2000 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2001 {
2002 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
2003 }
2004
2005 static u8
psb_intel_sdvo_get_slave_addr(struct drm_device * dev,int sdvo_reg)2006 psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
2007 {
2008 struct drm_psb_private *dev_priv = dev->dev_private;
2009 struct sdvo_device_mapping *my_mapping, *other_mapping;
2010
2011 if (IS_SDVOB(sdvo_reg)) {
2012 my_mapping = &dev_priv->sdvo_mappings[0];
2013 other_mapping = &dev_priv->sdvo_mappings[1];
2014 } else {
2015 my_mapping = &dev_priv->sdvo_mappings[1];
2016 other_mapping = &dev_priv->sdvo_mappings[0];
2017 }
2018
2019 /* If the BIOS described our SDVO device, take advantage of it. */
2020 if (my_mapping->slave_addr)
2021 return my_mapping->slave_addr;
2022
2023 /* If the BIOS only described a different SDVO device, use the
2024 * address that it isn't using.
2025 */
2026 if (other_mapping->slave_addr) {
2027 if (other_mapping->slave_addr == 0x70)
2028 return 0x72;
2029 else
2030 return 0x70;
2031 }
2032
2033 /* No SDVO device info is found for another DVO port,
2034 * so use mapping assumption we had before BIOS parsing.
2035 */
2036 if (IS_SDVOB(sdvo_reg))
2037 return 0x70;
2038 else
2039 return 0x72;
2040 }
2041
2042 static void
psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector * connector,struct psb_intel_sdvo * encoder)2043 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
2044 struct psb_intel_sdvo *encoder)
2045 {
2046 drm_connector_init(encoder->base.base.dev,
2047 &connector->base.base,
2048 &psb_intel_sdvo_connector_funcs,
2049 connector->base.base.connector_type);
2050
2051 drm_connector_helper_add(&connector->base.base,
2052 &psb_intel_sdvo_connector_helper_funcs);
2053
2054 connector->base.base.interlace_allowed = 0;
2055 connector->base.base.doublescan_allowed = 0;
2056 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2057
2058 psb_intel_connector_attach_encoder(&connector->base, &encoder->base);
2059 drm_sysfs_connector_add(&connector->base.base);
2060 }
2061
2062 static void
psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector * connector)2063 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
2064 {
2065 /* FIXME: We don't support HDMI at the moment
2066 struct drm_device *dev = connector->base.base.dev;
2067
2068 intel_attach_force_audio_property(&connector->base.base);
2069 intel_attach_broadcast_rgb_property(&connector->base.base);
2070 */
2071 }
2072
2073 static bool
psb_intel_sdvo_dvi_init(struct psb_intel_sdvo * psb_intel_sdvo,int device)2074 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2075 {
2076 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2077 struct drm_connector *connector;
2078 struct psb_intel_connector *intel_connector;
2079 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2080
2081 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2082 if (!psb_intel_sdvo_connector)
2083 return false;
2084
2085 if (device == 0) {
2086 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2087 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2088 } else if (device == 1) {
2089 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2090 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2091 }
2092
2093 intel_connector = &psb_intel_sdvo_connector->base;
2094 connector = &intel_connector->base;
2095 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2096 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2097 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2098
2099 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
2100 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2101 psb_intel_sdvo->is_hdmi = true;
2102 }
2103 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2104 (1 << INTEL_ANALOG_CLONE_BIT));
2105
2106 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2107 if (psb_intel_sdvo->is_hdmi)
2108 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
2109
2110 return true;
2111 }
2112
2113 static bool
psb_intel_sdvo_tv_init(struct psb_intel_sdvo * psb_intel_sdvo,int type)2114 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
2115 {
2116 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2117 struct drm_connector *connector;
2118 struct psb_intel_connector *intel_connector;
2119 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2120
2121 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2122 if (!psb_intel_sdvo_connector)
2123 return false;
2124
2125 intel_connector = &psb_intel_sdvo_connector->base;
2126 connector = &intel_connector->base;
2127 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2128 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2129
2130 psb_intel_sdvo->controlled_output |= type;
2131 psb_intel_sdvo_connector->output_flag = type;
2132
2133 psb_intel_sdvo->is_tv = true;
2134 psb_intel_sdvo->base.needs_tv_clock = true;
2135 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2136
2137 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2138
2139 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2140 goto err;
2141
2142 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2143 goto err;
2144
2145 return true;
2146
2147 err:
2148 psb_intel_sdvo_destroy(connector);
2149 return false;
2150 }
2151
2152 static bool
psb_intel_sdvo_analog_init(struct psb_intel_sdvo * psb_intel_sdvo,int device)2153 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2154 {
2155 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2156 struct drm_connector *connector;
2157 struct psb_intel_connector *intel_connector;
2158 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2159
2160 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2161 if (!psb_intel_sdvo_connector)
2162 return false;
2163
2164 intel_connector = &psb_intel_sdvo_connector->base;
2165 connector = &intel_connector->base;
2166 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2167 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2168 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2169
2170 if (device == 0) {
2171 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2172 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2173 } else if (device == 1) {
2174 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2175 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2176 }
2177
2178 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2179 (1 << INTEL_ANALOG_CLONE_BIT));
2180
2181 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2182 psb_intel_sdvo);
2183 return true;
2184 }
2185
2186 static bool
psb_intel_sdvo_lvds_init(struct psb_intel_sdvo * psb_intel_sdvo,int device)2187 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2188 {
2189 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2190 struct drm_connector *connector;
2191 struct psb_intel_connector *intel_connector;
2192 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2193
2194 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2195 if (!psb_intel_sdvo_connector)
2196 return false;
2197
2198 intel_connector = &psb_intel_sdvo_connector->base;
2199 connector = &intel_connector->base;
2200 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2201 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2202
2203 if (device == 0) {
2204 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2205 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2206 } else if (device == 1) {
2207 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2208 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2209 }
2210
2211 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2212 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2213
2214 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2215 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2216 goto err;
2217
2218 return true;
2219
2220 err:
2221 psb_intel_sdvo_destroy(connector);
2222 return false;
2223 }
2224
2225 static bool
psb_intel_sdvo_output_setup(struct psb_intel_sdvo * psb_intel_sdvo,uint16_t flags)2226 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2227 {
2228 psb_intel_sdvo->is_tv = false;
2229 psb_intel_sdvo->base.needs_tv_clock = false;
2230 psb_intel_sdvo->is_lvds = false;
2231
2232 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2233
2234 if (flags & SDVO_OUTPUT_TMDS0)
2235 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2236 return false;
2237
2238 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2239 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2240 return false;
2241
2242 /* TV has no XXX1 function block */
2243 if (flags & SDVO_OUTPUT_SVID0)
2244 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2245 return false;
2246
2247 if (flags & SDVO_OUTPUT_CVBS0)
2248 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2249 return false;
2250
2251 if (flags & SDVO_OUTPUT_RGB0)
2252 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2253 return false;
2254
2255 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2256 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2257 return false;
2258
2259 if (flags & SDVO_OUTPUT_LVDS0)
2260 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2261 return false;
2262
2263 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2264 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2265 return false;
2266
2267 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2268 unsigned char bytes[2];
2269
2270 psb_intel_sdvo->controlled_output = 0;
2271 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2272 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2273 SDVO_NAME(psb_intel_sdvo),
2274 bytes[0], bytes[1]);
2275 return false;
2276 }
2277 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2278
2279 return true;
2280 }
2281
psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector,int type)2282 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2283 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2284 int type)
2285 {
2286 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2287 struct psb_intel_sdvo_tv_format format;
2288 uint32_t format_map, i;
2289
2290 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2291 return false;
2292
2293 BUILD_BUG_ON(sizeof(format) != 6);
2294 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2295 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2296 &format, sizeof(format)))
2297 return false;
2298
2299 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2300
2301 if (format_map == 0)
2302 return false;
2303
2304 psb_intel_sdvo_connector->format_supported_num = 0;
2305 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2306 if (format_map & (1 << i))
2307 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2308
2309
2310 psb_intel_sdvo_connector->tv_format =
2311 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2312 "mode", psb_intel_sdvo_connector->format_supported_num);
2313 if (!psb_intel_sdvo_connector->tv_format)
2314 return false;
2315
2316 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2317 drm_property_add_enum(
2318 psb_intel_sdvo_connector->tv_format, i,
2319 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2320
2321 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2322 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2323 psb_intel_sdvo_connector->tv_format, 0);
2324 return true;
2325
2326 }
2327
2328 #define ENHANCEMENT(name, NAME) do { \
2329 if (enhancements.name) { \
2330 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2331 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2332 return false; \
2333 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2334 psb_intel_sdvo_connector->cur_##name = response; \
2335 psb_intel_sdvo_connector->name = \
2336 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2337 if (!psb_intel_sdvo_connector->name) return false; \
2338 drm_object_attach_property(&connector->base, \
2339 psb_intel_sdvo_connector->name, \
2340 psb_intel_sdvo_connector->cur_##name); \
2341 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2342 data_value[0], data_value[1], response); \
2343 } \
2344 } while(0)
2345
2346 static bool
psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector,struct psb_intel_sdvo_enhancements_reply enhancements)2347 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2348 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2349 struct psb_intel_sdvo_enhancements_reply enhancements)
2350 {
2351 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2352 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2353 uint16_t response, data_value[2];
2354
2355 /* when horizontal overscan is supported, Add the left/right property */
2356 if (enhancements.overscan_h) {
2357 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2358 SDVO_CMD_GET_MAX_OVERSCAN_H,
2359 &data_value, 4))
2360 return false;
2361
2362 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2363 SDVO_CMD_GET_OVERSCAN_H,
2364 &response, 2))
2365 return false;
2366
2367 psb_intel_sdvo_connector->max_hscan = data_value[0];
2368 psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2369 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2370 psb_intel_sdvo_connector->left =
2371 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2372 if (!psb_intel_sdvo_connector->left)
2373 return false;
2374
2375 drm_object_attach_property(&connector->base,
2376 psb_intel_sdvo_connector->left,
2377 psb_intel_sdvo_connector->left_margin);
2378
2379 psb_intel_sdvo_connector->right =
2380 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2381 if (!psb_intel_sdvo_connector->right)
2382 return false;
2383
2384 drm_object_attach_property(&connector->base,
2385 psb_intel_sdvo_connector->right,
2386 psb_intel_sdvo_connector->right_margin);
2387 DRM_DEBUG_KMS("h_overscan: max %d, "
2388 "default %d, current %d\n",
2389 data_value[0], data_value[1], response);
2390 }
2391
2392 if (enhancements.overscan_v) {
2393 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2394 SDVO_CMD_GET_MAX_OVERSCAN_V,
2395 &data_value, 4))
2396 return false;
2397
2398 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2399 SDVO_CMD_GET_OVERSCAN_V,
2400 &response, 2))
2401 return false;
2402
2403 psb_intel_sdvo_connector->max_vscan = data_value[0];
2404 psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2405 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2406 psb_intel_sdvo_connector->top =
2407 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2408 if (!psb_intel_sdvo_connector->top)
2409 return false;
2410
2411 drm_object_attach_property(&connector->base,
2412 psb_intel_sdvo_connector->top,
2413 psb_intel_sdvo_connector->top_margin);
2414
2415 psb_intel_sdvo_connector->bottom =
2416 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2417 if (!psb_intel_sdvo_connector->bottom)
2418 return false;
2419
2420 drm_object_attach_property(&connector->base,
2421 psb_intel_sdvo_connector->bottom,
2422 psb_intel_sdvo_connector->bottom_margin);
2423 DRM_DEBUG_KMS("v_overscan: max %d, "
2424 "default %d, current %d\n",
2425 data_value[0], data_value[1], response);
2426 }
2427
2428 ENHANCEMENT(hpos, HPOS);
2429 ENHANCEMENT(vpos, VPOS);
2430 ENHANCEMENT(saturation, SATURATION);
2431 ENHANCEMENT(contrast, CONTRAST);
2432 ENHANCEMENT(hue, HUE);
2433 ENHANCEMENT(sharpness, SHARPNESS);
2434 ENHANCEMENT(brightness, BRIGHTNESS);
2435 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2436 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2437 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2438 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2439 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2440
2441 if (enhancements.dot_crawl) {
2442 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2443 return false;
2444
2445 psb_intel_sdvo_connector->max_dot_crawl = 1;
2446 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2447 psb_intel_sdvo_connector->dot_crawl =
2448 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2449 if (!psb_intel_sdvo_connector->dot_crawl)
2450 return false;
2451
2452 drm_object_attach_property(&connector->base,
2453 psb_intel_sdvo_connector->dot_crawl,
2454 psb_intel_sdvo_connector->cur_dot_crawl);
2455 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2456 }
2457
2458 return true;
2459 }
2460
2461 static bool
psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector,struct psb_intel_sdvo_enhancements_reply enhancements)2462 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2463 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2464 struct psb_intel_sdvo_enhancements_reply enhancements)
2465 {
2466 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2467 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2468 uint16_t response, data_value[2];
2469
2470 ENHANCEMENT(brightness, BRIGHTNESS);
2471
2472 return true;
2473 }
2474 #undef ENHANCEMENT
2475
psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector)2476 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2477 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2478 {
2479 union {
2480 struct psb_intel_sdvo_enhancements_reply reply;
2481 uint16_t response;
2482 } enhancements;
2483
2484 BUILD_BUG_ON(sizeof(enhancements) != 2);
2485
2486 enhancements.response = 0;
2487 psb_intel_sdvo_get_value(psb_intel_sdvo,
2488 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2489 &enhancements, sizeof(enhancements));
2490 if (enhancements.response == 0) {
2491 DRM_DEBUG_KMS("No enhancement is supported\n");
2492 return true;
2493 }
2494
2495 if (IS_TV(psb_intel_sdvo_connector))
2496 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2497 else if(IS_LVDS(psb_intel_sdvo_connector))
2498 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2499 else
2500 return true;
2501 }
2502
psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter * adapter,struct i2c_msg * msgs,int num)2503 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2504 struct i2c_msg *msgs,
2505 int num)
2506 {
2507 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2508
2509 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2510 return -EIO;
2511
2512 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2513 }
2514
psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter * adapter)2515 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2516 {
2517 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2518 return sdvo->i2c->algo->functionality(sdvo->i2c);
2519 }
2520
2521 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2522 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer,
2523 .functionality = psb_intel_sdvo_ddc_proxy_func
2524 };
2525
2526 static bool
psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo * sdvo,struct drm_device * dev)2527 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2528 struct drm_device *dev)
2529 {
2530 sdvo->ddc.owner = THIS_MODULE;
2531 sdvo->ddc.class = I2C_CLASS_DDC;
2532 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2533 sdvo->ddc.dev.parent = &dev->pdev->dev;
2534 sdvo->ddc.algo_data = sdvo;
2535 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2536
2537 return i2c_add_adapter(&sdvo->ddc) == 0;
2538 }
2539
psb_intel_sdvo_init(struct drm_device * dev,int sdvo_reg)2540 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2541 {
2542 struct drm_psb_private *dev_priv = dev->dev_private;
2543 struct psb_intel_encoder *psb_intel_encoder;
2544 struct psb_intel_sdvo *psb_intel_sdvo;
2545 int i;
2546
2547 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2548 if (!psb_intel_sdvo)
2549 return false;
2550
2551 psb_intel_sdvo->sdvo_reg = sdvo_reg;
2552 psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2553 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2554 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2555 kfree(psb_intel_sdvo);
2556 return false;
2557 }
2558
2559 /* encoder type will be decided later */
2560 psb_intel_encoder = &psb_intel_sdvo->base;
2561 psb_intel_encoder->type = INTEL_OUTPUT_SDVO;
2562 drm_encoder_init(dev, &psb_intel_encoder->base, &psb_intel_sdvo_enc_funcs, 0);
2563
2564 /* Read the regs to test if we can talk to the device */
2565 for (i = 0; i < 0x40; i++) {
2566 u8 byte;
2567
2568 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2569 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2570 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2571 goto err;
2572 }
2573 }
2574
2575 if (IS_SDVOB(sdvo_reg))
2576 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2577 else
2578 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2579
2580 drm_encoder_helper_add(&psb_intel_encoder->base, &psb_intel_sdvo_helper_funcs);
2581
2582 /* In default case sdvo lvds is false */
2583 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2584 goto err;
2585
2586 if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2587 psb_intel_sdvo->caps.output_flags) != true) {
2588 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2589 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2590 goto err;
2591 }
2592
2593 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2594
2595 /* Set the input timing to the screen. Assume always input 0. */
2596 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2597 goto err;
2598
2599 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2600 &psb_intel_sdvo->pixel_clock_min,
2601 &psb_intel_sdvo->pixel_clock_max))
2602 goto err;
2603
2604 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2605 "clock range %dMHz - %dMHz, "
2606 "input 1: %c, input 2: %c, "
2607 "output 1: %c, output 2: %c\n",
2608 SDVO_NAME(psb_intel_sdvo),
2609 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2610 psb_intel_sdvo->caps.device_rev_id,
2611 psb_intel_sdvo->pixel_clock_min / 1000,
2612 psb_intel_sdvo->pixel_clock_max / 1000,
2613 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2614 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2615 /* check currently supported outputs */
2616 psb_intel_sdvo->caps.output_flags &
2617 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2618 psb_intel_sdvo->caps.output_flags &
2619 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2620 return true;
2621
2622 err:
2623 drm_encoder_cleanup(&psb_intel_encoder->base);
2624 i2c_del_adapter(&psb_intel_sdvo->ddc);
2625 kfree(psb_intel_sdvo);
2626
2627 return false;
2628 }
2629