1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * Modifications for inclusion into the Linux staging tree are 19 * Copyright(c) 2010 Larry Finger. All rights reserved. 20 * 21 * Contact information: 22 * WLAN FAE <wlanfae@realtek.com> 23 * Larry Finger <Larry.Finger@lwfinger.net> 24 * 25 ******************************************************************************/ 26 #ifndef __RTL871X_MP_H_ 27 #define __RTL871X_MP_H_ 28 29 #define MPT_NOOP 0 30 #define MPT_READ_MAC_1BYTE 1 31 #define MPT_READ_MAC_2BYTE 2 32 #define MPT_READ_MAC_4BYTE 3 33 #define MPT_WRITE_MAC_1BYTE 4 34 #define MPT_WRITE_MAC_2BYTE 5 35 #define MPT_WRITE_MAC_4BYTE 6 36 #define MPT_READ_BB_CCK 7 37 #define MPT_WRITE_BB_CCK 8 38 #define MPT_READ_BB_OFDM 9 39 #define MPT_WRITE_BB_OFDM 10 40 #define MPT_READ_RF 11 41 #define MPT_WRITE_RF 12 42 #define MPT_READ_EEPROM_1BYTE 13 43 #define MPT_WRITE_EEPROM_1BYTE 14 44 #define MPT_READ_EEPROM_2BYTE 15 45 #define MPT_WRITE_EEPROM_2BYTE 16 46 #define MPT_SET_CSTHRESHOLD 21 47 #define MPT_SET_INITGAIN 22 48 #define MPT_SWITCH_BAND 23 49 #define MPT_SWITCH_CHANNEL 24 50 #define MPT_SET_DATARATE 25 51 #define MPT_SWITCH_ANTENNA 26 52 #define MPT_SET_TX_POWER 27 53 #define MPT_SET_CONT_TX 28 54 #define MPT_SET_SINGLE_CARRIER 29 55 #define MPT_SET_CARRIER_SUPPRESSION 30 56 #define MPT_GET_RATE_TABLE 31 57 #define MPT_READ_TSSI 32 58 #define MPT_GET_THERMAL_METER 33 59 #define MAX_MP_XMITBUF_SZ 2048 60 #define NR_MP_XMITFRAME 8 61 62 struct mp_xmit_frame { 63 struct list_head list; 64 struct pkt_attrib attrib; 65 _pkt *pkt; 66 int frame_tag; 67 struct _adapter *padapter; 68 u8 *mem_addr; 69 u16 sz[8]; 70 struct urb *pxmit_urb[8]; 71 u8 bpending[8]; 72 u8 last[8]; 73 }; 74 75 struct mp_wiparam { 76 u32 bcompleted; 77 u32 act_type; 78 u32 io_offset; 79 u32 io_value; 80 }; 81 82 struct mp_priv { 83 struct _adapter *papdater; 84 /*OID cmd handler*/ 85 struct mp_wiparam workparam; 86 u8 act_in_progress; 87 /*Tx Section*/ 88 u8 TID; 89 u32 tx_pktcount; 90 /*Rx Section*/ 91 u32 rx_pktcount; 92 u32 rx_crcerrpktcount; 93 u32 rx_pktloss; 94 struct recv_stat rxstat; 95 /*RF/BB relative*/ 96 u32 curr_ch; 97 u32 curr_rateidx; 98 u8 curr_bandwidth; 99 u8 curr_modem; 100 u8 curr_txpoweridx; 101 u32 curr_crystalcap; 102 u16 antenna_tx; 103 u16 antenna_rx; 104 u8 curr_rfpath; 105 u8 check_mp_pkt; 106 uint ForcedDataRate; 107 struct wlan_network mp_network; 108 unsigned char network_macaddr[6]; 109 /*Testing Flag*/ 110 u32 mode;/*0 for normal type packet, 111 * 1 for loopback packet (16bytes TXCMD)*/ 112 sint prev_fw_state; 113 u8 *pallocated_mp_xmitframe_buf; 114 u8 *pmp_xmtframe_buf; 115 struct __queue free_mp_xmitqueue; 116 u32 free_mp_xmitframe_cnt; 117 }; 118 119 struct IOCMD_STRUCT { 120 u8 cmdclass; 121 u16 value; 122 u8 index; 123 }; 124 125 struct rf_reg_param { 126 u32 path; 127 u32 offset; 128 u32 value; 129 }; 130 131 struct bb_reg_param { 132 u32 offset; 133 u32 value; 134 }; 135 /* ======================================================================= */ 136 137 #define LOWER true 138 #define RAISE false 139 #define IOCMD_CTRL_REG 0x10250370 140 #define IOCMD_DATA_REG 0x10250374 141 #define IOCMD_GET_THERMAL_METER 0xFD000028 142 #define IOCMD_CLASS_BB_RF 0xF0 143 #define IOCMD_BB_READ_IDX 0x00 144 #define IOCMD_BB_WRITE_IDX 0x01 145 #define IOCMD_RF_READ_IDX 0x02 146 #define IOCMD_RF_WRIT_IDX 0x03 147 #define BB_REG_BASE_ADDR 0x800 148 #define RF_PATH_A 0 149 #define RF_PATH_B 1 150 #define RF_PATH_C 2 151 #define RF_PATH_D 3 152 #define MAX_RF_PATH_NUMS 2 153 #define _2MAC_MODE_ 0 154 #define _LOOPBOOK_MODE_ 1 155 156 /* MP set force data rate base on the definition. */ 157 enum { 158 /* CCK rate. */ 159 MPT_RATE_1M, /* 0 */ 160 MPT_RATE_2M, 161 MPT_RATE_55M, 162 MPT_RATE_11M, /* 3 */ 163 164 /* OFDM rate. */ 165 MPT_RATE_6M, /* 4 */ 166 MPT_RATE_9M, 167 MPT_RATE_12M, 168 MPT_RATE_18M, 169 MPT_RATE_24M, 170 MPT_RATE_36M, 171 MPT_RATE_48M, 172 MPT_RATE_54M, /* 11 */ 173 174 /* HT rate. */ 175 MPT_RATE_MCS0, /* 12 */ 176 MPT_RATE_MCS1, 177 MPT_RATE_MCS2, 178 MPT_RATE_MCS3, 179 MPT_RATE_MCS4, 180 MPT_RATE_MCS5, 181 MPT_RATE_MCS6, 182 MPT_RATE_MCS7, /* 19 */ 183 MPT_RATE_MCS8, 184 MPT_RATE_MCS9, 185 MPT_RATE_MCS10, 186 MPT_RATE_MCS11, 187 MPT_RATE_MCS12, 188 MPT_RATE_MCS13, 189 MPT_RATE_MCS14, 190 MPT_RATE_MCS15, /* 27 */ 191 MPT_RATE_LAST 192 }; 193 194 /* Represent Channel Width in HT Capabilities */ 195 enum HT_CHANNEL_WIDTH { 196 HT_CHANNEL_WIDTH_20 = 0, 197 HT_CHANNEL_WIDTH_40 = 1, 198 }; 199 200 #define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */ 201 202 enum POWER_MODE { 203 POWER_LOW = 0, 204 POWER_NORMAL 205 }; 206 207 #define RX_PKT_BROADCAST 1 208 #define RX_PKT_DEST_ADDR 2 209 #define RX_PKT_PHY_MATCH 3 210 211 #define RPTMaxCount 0x000FFFFF; 212 213 /* parameter 1 : BitMask 214 * bit 0 : OFDM PPDU 215 * bit 1 : OFDM False Alarm 216 * bit 2 : OFDM MPDU OK 217 * bit 3 : OFDM MPDU Fail 218 * bit 4 : CCK PPDU 219 * bit 5 : CCK False Alarm 220 * bit 6 : CCK MPDU ok 221 * bit 7 : CCK MPDU fail 222 * bit 8 : HT PPDU counter 223 * bit 9 : HT false alarm 224 * bit 10 : HT MPDU total 225 * bit 11 : HT MPDU OK 226 * bit 12 : HT MPDU fail 227 * bit 15 : RX full drop 228 */ 229 enum RXPHY_BITMASK { 230 OFDM_PPDU_BIT = 0, 231 OFDM_MPDU_OK_BIT, 232 OFDM_MPDU_FAIL_BIT, 233 CCK_PPDU_BIT, 234 CCK_MPDU_OK_BIT, 235 CCK_MPDU_FAIL_BIT, 236 HT_PPDU_BIT, 237 HT_MPDU_BIT, 238 HT_MPDU_OK_BIT, 239 HT_MPDU_FAIL_BIT, 240 }; 241 242 enum ENCRY_CTRL_STATE { 243 HW_CONTROL, /*hw encryption& decryption*/ 244 SW_CONTROL, /*sw encryption& decryption*/ 245 HW_ENCRY_SW_DECRY, /*hw encryption & sw decryption*/ 246 SW_ENCRY_HW_DECRY /*sw encryption & hw decryption*/ 247 }; 248 249 /* Bandwidth Offset */ 250 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 251 #define HAL_PRIME_CHNL_OFFSET_LOWER 1 252 #define HAL_PRIME_CHNL_OFFSET_UPPER 2 253 /*=======================================================================*/ 254 void mp871xinit(struct _adapter *padapter); 255 void mp871xdeinit(struct _adapter *padapter); 256 u32 r8712_bb_reg_read(struct _adapter *Adapter, u16 offset); 257 u8 r8712_bb_reg_write(struct _adapter *Adapter, u16 offset, u32 value); 258 u32 r8712_rf_reg_read(struct _adapter *Adapter, u8 path, u8 offset); 259 u8 r8712_rf_reg_write(struct _adapter *Adapter, u8 path, 260 u8 offset, u32 value); 261 u32 r8712_get_bb_reg(struct _adapter *Adapter, u16 offset, u32 bitmask); 262 u8 r8712_set_bb_reg(struct _adapter *Adapter, u16 offset, 263 u32 bitmask, u32 value); 264 u32 r8712_get_rf_reg(struct _adapter *Adapter, u8 path, u8 offset, 265 u32 bitmask); 266 u8 r8712_set_rf_reg(struct _adapter *Adapter, u8 path, u8 offset, 267 u32 bitmask, u32 value); 268 269 void r8712_SetChannel(struct _adapter *pAdapter); 270 void r8712_SetTxPower(struct _adapter *pAdapte); 271 void r8712_SetTxAGCOffset(struct _adapter *pAdapter, u32 ulTxAGCOffset); 272 void r8712_SetDataRate(struct _adapter *pAdapter); 273 void r8712_SwitchBandwidth(struct _adapter *pAdapter); 274 void r8712_SwitchAntenna(struct _adapter *pAdapter); 275 void r8712_SetCrystalCap(struct _adapter *pAdapter); 276 void r8712_GetThermalMeter(struct _adapter *pAdapter, u32 *value); 277 void r8712_SetContinuousTx(struct _adapter *pAdapter, u8 bStart); 278 void r8712_SetSingleCarrierTx(struct _adapter *pAdapter, u8 bStart); 279 void r8712_SetSingleToneTx(struct _adapter *pAdapter, u8 bStart); 280 void r8712_SetCarrierSuppressionTx(struct _adapter *pAdapter, u8 bStart); 281 void r8712_ResetPhyRxPktCount(struct _adapter *pAdapter); 282 u32 r8712_GetPhyRxPktReceived(struct _adapter *pAdapter); 283 u32 r8712_GetPhyRxPktCRC32Error(struct _adapter *pAdapter); 284 285 #endif /*__RTL871X_MP_H_*/ 286 287