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1 /*
2  * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
3  *
4  * Original author:
5  * Ben Collins <bcollins@ubuntu.com>
6  *
7  * Additional work by:
8  * John Brooks <john.brooks@bluecherry.net>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23  */
24 
25 #ifndef __SOLO6X10_H
26 #define __SOLO6X10_H
27 
28 #include <linux/pci.h>
29 #include <linux/i2c.h>
30 #include <linux/mutex.h>
31 #include <linux/list.h>
32 #include <linux/wait.h>
33 #include <linux/stringify.h>
34 #include <linux/io.h>
35 #include <linux/atomic.h>
36 #include <linux/slab.h>
37 #include <linux/videodev2.h>
38 
39 #include <media/v4l2-dev.h>
40 #include <media/v4l2-device.h>
41 #include <media/v4l2-ctrls.h>
42 #include <media/videobuf2-core.h>
43 
44 #include "solo6x10-regs.h"
45 
46 #ifndef PCI_VENDOR_ID_SOFTLOGIC
47 #define PCI_VENDOR_ID_SOFTLOGIC		0x9413
48 #define PCI_DEVICE_ID_SOLO6010		0x6010
49 #define PCI_DEVICE_ID_SOLO6110		0x6110
50 #endif
51 
52 #ifndef PCI_VENDOR_ID_BLUECHERRY
53 #define PCI_VENDOR_ID_BLUECHERRY	0x1BB3
54 /* Neugent Softlogic 6010 based cards */
55 #define PCI_DEVICE_ID_NEUSOLO_4		0x4304
56 #define PCI_DEVICE_ID_NEUSOLO_9		0x4309
57 #define PCI_DEVICE_ID_NEUSOLO_16	0x4310
58 /* Bluecherry Softlogic 6010 based cards */
59 #define PCI_DEVICE_ID_BC_SOLO_4		0x4E04
60 #define PCI_DEVICE_ID_BC_SOLO_9		0x4E09
61 #define PCI_DEVICE_ID_BC_SOLO_16	0x4E10
62 /* Bluecherry Softlogic 6110 based cards */
63 #define PCI_DEVICE_ID_BC_6110_4		0x5304
64 #define PCI_DEVICE_ID_BC_6110_8		0x5308
65 #define PCI_DEVICE_ID_BC_6110_16	0x5310
66 #endif /* Bluecherry */
67 
68 /* Used in pci_device_id, and solo_dev->type */
69 #define SOLO_DEV_6010			0
70 #define SOLO_DEV_6110			1
71 
72 #define SOLO6X10_NAME			"solo6x10"
73 
74 #define SOLO_MAX_CHANNELS		16
75 
76 #define SOLO6X10_VERSION		"3.0.0"
77 
78 /*
79  * The SOLO6x10 actually has 8 i2c channels, but we only use 2.
80  * 0 - Techwell chip(s)
81  * 1 - SAA7128
82  */
83 #define SOLO_I2C_ADAPTERS		2
84 #define SOLO_I2C_TW			0
85 #define SOLO_I2C_SAA			1
86 
87 /* DMA Engine setup */
88 #define SOLO_NR_P2M			4
89 #define SOLO_NR_P2M_DESC		256
90 #define SOLO_P2M_DESC_SIZE		(SOLO_NR_P2M_DESC * 16)
91 
92 /* Encoder standard modes */
93 #define SOLO_ENC_MODE_CIF		2
94 #define SOLO_ENC_MODE_HD1		1
95 #define SOLO_ENC_MODE_D1		9
96 
97 #define SOLO_DEFAULT_GOP		30
98 #define SOLO_DEFAULT_QP			3
99 
100 #ifndef V4L2_BUF_FLAG_MOTION_ON
101 #define V4L2_BUF_FLAG_MOTION_ON		0x10000
102 #define V4L2_BUF_FLAG_MOTION_DETECTED	0x20000
103 #endif
104 
105 #define SOLO_CID_CUSTOM_BASE		(V4L2_CID_USER_BASE | 0xf000)
106 #define V4L2_CID_MOTION_MODE		(SOLO_CID_CUSTOM_BASE+0)
107 #define V4L2_CID_MOTION_THRESHOLD	(SOLO_CID_CUSTOM_BASE+1)
108 #define V4L2_CID_MOTION_TRACE		(SOLO_CID_CUSTOM_BASE+2)
109 #define V4L2_CID_OSD_TEXT		(SOLO_CID_CUSTOM_BASE+3)
110 
111 /*
112  * Motion thresholds are in a table of 64x64 samples, with
113  * each sample representing 16x16 pixels of the source. In
114  * effect, 44x30 samples are used for NTSC, and 44x36 for PAL.
115  * The 5th sample on the 10th row is (10*64)+5 = 645.
116  *
117  * Using a 64x64 array will result in a problem on some architectures like
118  * the powerpc where the size of the argument is limited to 13 bits.
119  * Since both PAL and NTSC do not use the full table anyway I've chosen
120  * to limit the array to 45x45 (45*16 = 720, which is the maximum PAL/NTSC
121  * width).
122  */
123 #define SOLO_MOTION_SZ (45)
124 struct solo_motion_thresholds {
125 	__u16	thresholds[SOLO_MOTION_SZ][SOLO_MOTION_SZ];
126 };
127 
128 #define SOLO_IOC_G_MOTION_THRESHOLDS	_IOR('V', BASE_VIDIOC_PRIVATE+0, struct solo_motion_thresholds)
129 #define SOLO_IOC_S_MOTION_THRESHOLDS	_IOW('V', BASE_VIDIOC_PRIVATE+1, struct solo_motion_thresholds)
130 
131 enum SOLO_I2C_STATE {
132 	IIC_STATE_IDLE,
133 	IIC_STATE_START,
134 	IIC_STATE_READ,
135 	IIC_STATE_WRITE,
136 	IIC_STATE_STOP
137 };
138 
139 /* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */
140 struct solo_p2m_desc {
141 	u32	ctrl;
142 	u32	cfg;
143 	u32	dma_addr;
144 	u32	ext_addr;
145 };
146 
147 struct solo_p2m_dev {
148 	struct mutex		mutex;
149 	struct completion	completion;
150 	int			desc_count;
151 	int			desc_idx;
152 	struct solo_p2m_desc	*descs;
153 	int			error;
154 };
155 
156 #define OSD_TEXT_MAX		44
157 
158 struct solo_vb2_buf {
159 	struct vb2_buffer vb;
160 	struct list_head list;
161 };
162 
163 enum solo_enc_types {
164 	SOLO_ENC_TYPE_STD,
165 	SOLO_ENC_TYPE_EXT,
166 };
167 
168 struct solo_enc_dev {
169 	struct solo_dev	*solo_dev;
170 	/* V4L2 Items */
171 	struct v4l2_ctrl_handler hdl;
172 	struct video_device	*vfd;
173 	/* General accounting */
174 	struct mutex		lock;
175 	spinlock_t		motion_lock;
176 	u8			ch;
177 	u8			mode, gop, qp, interlaced, interval;
178 	u8			bw_weight;
179 	u16			motion_thresh;
180 	struct solo_motion_thresholds motion_thresholds;
181 	bool			motion_global;
182 	bool			motion_enabled;
183 	u16			width;
184 	u16			height;
185 
186 	/* OSD buffers */
187 	char			osd_text[OSD_TEXT_MAX + 1];
188 	u8			osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
189 					__aligned(4);
190 
191 	/* VOP stuff */
192 	unsigned char		vop[64];
193 	int			vop_len;
194 	unsigned char		jpeg_header[1024];
195 	int			jpeg_len;
196 
197 	u32			fmt;
198 	enum solo_enc_types	type;
199 	u32			sequence;
200 	struct vb2_queue	vidq;
201 	struct list_head	vidq_active;
202 	int			desc_count;
203 	int			desc_nelts;
204 	struct solo_p2m_desc	*desc_items;
205 	dma_addr_t		desc_dma;
206 	spinlock_t		av_lock;
207 };
208 
209 /* The SOLO6x10 PCI Device */
210 struct solo_dev {
211 	/* General stuff */
212 	struct pci_dev		*pdev;
213 	int			type;
214 	unsigned int		time_sync;
215 	unsigned int		usec_lsb;
216 	unsigned int		clock_mhz;
217 	u8 __iomem		*reg_base;
218 	int			nr_chans;
219 	int			nr_ext;
220 	u32			irq_mask;
221 	u32			motion_mask;
222 	spinlock_t		reg_io_lock;
223 	struct v4l2_device	v4l2_dev;
224 
225 	/* tw28xx accounting */
226 	u8			tw2865, tw2864, tw2815;
227 	u8			tw28_cnt;
228 
229 	/* i2c related items */
230 	struct i2c_adapter	i2c_adap[SOLO_I2C_ADAPTERS];
231 	enum SOLO_I2C_STATE	i2c_state;
232 	struct mutex		i2c_mutex;
233 	int			i2c_id;
234 	wait_queue_head_t	i2c_wait;
235 	struct i2c_msg		*i2c_msg;
236 	unsigned int		i2c_msg_num;
237 	unsigned int		i2c_msg_ptr;
238 
239 	/* P2M DMA Engine */
240 	struct solo_p2m_dev	p2m_dev[SOLO_NR_P2M];
241 	atomic_t		p2m_count;
242 	int			p2m_jiffies;
243 	unsigned int		p2m_timeouts;
244 
245 	/* V4L2 Display items */
246 	struct video_device	*vfd;
247 	unsigned int		erasing;
248 	unsigned int		frame_blank;
249 	u8			cur_disp_ch;
250 	wait_queue_head_t	disp_thread_wait;
251 	struct v4l2_ctrl_handler disp_hdl;
252 
253 	/* V4L2 Encoder items */
254 	struct solo_enc_dev	*v4l2_enc[SOLO_MAX_CHANNELS];
255 	u16			enc_bw_remain;
256 	/* IDX into hw mp4 encoder */
257 	u8			enc_idx;
258 
259 	/* Current video settings */
260 	u32			video_type;
261 	u16			video_hsize, video_vsize;
262 	u16			vout_hstart, vout_vstart;
263 	u16			vin_hstart, vin_vstart;
264 	u8			fps;
265 
266 	/* JPEG Qp setting */
267 	spinlock_t      jpeg_qp_lock;
268 	u32		jpeg_qp[2];
269 
270 	/* Audio components */
271 	struct snd_card		*snd_card;
272 	struct snd_pcm		*snd_pcm;
273 	atomic_t		snd_users;
274 	int			g723_hw_idx;
275 
276 	/* sysfs stuffs */
277 	struct device		dev;
278 	int			sdram_size;
279 	struct bin_attribute	sdram_attr;
280 	unsigned int		sys_config;
281 
282 	/* Ring thread */
283 	struct task_struct	*ring_thread;
284 	wait_queue_head_t	ring_thread_wait;
285 
286 	/* VOP_HEADER handling */
287 	void                    *vh_buf;
288 	dma_addr_t		vh_dma;
289 	int			vh_size;
290 
291 	/* Buffer handling */
292 	struct vb2_queue	vidq;
293 	struct vb2_alloc_ctx	*alloc_ctx;
294 	u32			sequence;
295 	struct task_struct      *kthread;
296 	struct mutex		lock;
297 	spinlock_t		slock;
298 	int			old_write;
299 	struct list_head	vidq_active;
300 };
301 
solo_reg_read(struct solo_dev * solo_dev,int reg)302 static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
303 {
304 	unsigned long flags;
305 	u32 ret;
306 	u16 val;
307 
308 	spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
309 
310 	ret = readl(solo_dev->reg_base + reg);
311 	rmb();
312 	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
313 	rmb();
314 
315 	spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
316 
317 	return ret;
318 }
319 
solo_reg_write(struct solo_dev * solo_dev,int reg,u32 data)320 static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
321 				  u32 data)
322 {
323 	unsigned long flags;
324 	u16 val;
325 
326 	spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
327 
328 	writel(data, solo_dev->reg_base + reg);
329 	wmb();
330 	pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
331 	rmb();
332 
333 	spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
334 }
335 
solo_irq_on(struct solo_dev * dev,u32 mask)336 static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
337 {
338 	dev->irq_mask |= mask;
339 	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
340 }
341 
solo_irq_off(struct solo_dev * dev,u32 mask)342 static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
343 {
344 	dev->irq_mask &= ~mask;
345 	solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
346 }
347 
348 /* Init/exit routines for subsystems */
349 int solo_disp_init(struct solo_dev *solo_dev);
350 void solo_disp_exit(struct solo_dev *solo_dev);
351 
352 int solo_gpio_init(struct solo_dev *solo_dev);
353 void solo_gpio_exit(struct solo_dev *solo_dev);
354 
355 int solo_i2c_init(struct solo_dev *solo_dev);
356 void solo_i2c_exit(struct solo_dev *solo_dev);
357 
358 int solo_p2m_init(struct solo_dev *solo_dev);
359 void solo_p2m_exit(struct solo_dev *solo_dev);
360 
361 int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
362 void solo_v4l2_exit(struct solo_dev *solo_dev);
363 
364 int solo_enc_init(struct solo_dev *solo_dev);
365 void solo_enc_exit(struct solo_dev *solo_dev);
366 
367 int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
368 void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
369 
370 int solo_g723_init(struct solo_dev *solo_dev);
371 void solo_g723_exit(struct solo_dev *solo_dev);
372 
373 /* ISR's */
374 int solo_i2c_isr(struct solo_dev *solo_dev);
375 void solo_p2m_isr(struct solo_dev *solo_dev, int id);
376 void solo_p2m_error_isr(struct solo_dev *solo_dev);
377 void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
378 void solo_g723_isr(struct solo_dev *solo_dev);
379 void solo_motion_isr(struct solo_dev *solo_dev);
380 void solo_video_in_isr(struct solo_dev *solo_dev);
381 
382 /* i2c read/write */
383 u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
384 void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
385 			u8 data);
386 
387 /* P2M DMA */
388 int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
389 		   dma_addr_t dma_addr, u32 ext_addr, u32 size,
390 		   int repeat, u32 ext_size);
391 int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
392 		 void *sys_addr, u32 ext_addr, u32 size,
393 		 int repeat, u32 ext_size);
394 void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
395 			dma_addr_t dma_addr, u32 ext_addr, u32 size,
396 			int repeat, u32 ext_size);
397 int solo_p2m_dma_desc(struct solo_dev *solo_dev,
398 		      struct solo_p2m_desc *desc, dma_addr_t desc_dma,
399 		      int desc_cnt);
400 
401 /* Global s_std ioctl */
402 int solo_set_video_type(struct solo_dev *solo_dev, bool type);
403 void solo_update_mode(struct solo_enc_dev *solo_enc);
404 
405 /* Set the threshold for motion detection */
406 int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
407 int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
408 		const struct solo_motion_thresholds *thresholds);
409 #define SOLO_DEF_MOT_THRESH		0x0300
410 
411 /* Write text on OSD */
412 int solo_osd_print(struct solo_enc_dev *solo_enc);
413 
414 /* EEPROM commands */
415 unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
416 unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc);
417 int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
418 		      unsigned short data);
419 
420 /* JPEG Qp functions */
421 void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
422 		    unsigned int qp);
423 int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
424 
425 #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
426 
427 #endif /* __SOLO6X10_H */
428