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1 /*
2  * linux/drivers/mmc/host/tmio_mmc_pio.c
3  *
4  * Copyright (C) 2011 Guennadi Liakhovetski
5  * Copyright (C) 2007 Ian Molton
6  * Copyright (C) 2004 Ian Molton
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Driver for the MMC / SD / SDIO IP found in:
13  *
14  * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
15  *
16  * This driver draws mainly on scattered spec sheets, Reverse engineering
17  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18  * support). (Further 4 bit support from a later datasheet).
19  *
20  * TODO:
21  *   Investigate using a workqueue for PIO transfers
22  *   Eliminate FIXMEs
23  *   SDIO support
24  *   Better Power management
25  *   Handle MMC errors better
26  *   double buffer support
27  *
28  */
29 
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
34 #include <linux/io.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/scatterlist.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
50 
51 #include "tmio_mmc.h"
52 
tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host * host,u32 i)53 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
54 {
55 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
56 	sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
57 }
58 
tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host * host,u32 i)59 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
60 {
61 	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
62 	sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
63 }
64 
tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host * host,u32 i)65 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
66 {
67 	sd_ctrl_write32(host, CTL_STATUS, ~i);
68 }
69 
tmio_mmc_init_sg(struct tmio_mmc_host * host,struct mmc_data * data)70 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
71 {
72 	host->sg_len = data->sg_len;
73 	host->sg_ptr = data->sg;
74 	host->sg_orig = data->sg;
75 	host->sg_off = 0;
76 }
77 
tmio_mmc_next_sg(struct tmio_mmc_host * host)78 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
79 {
80 	host->sg_ptr = sg_next(host->sg_ptr);
81 	host->sg_off = 0;
82 	return --host->sg_len;
83 }
84 
85 #ifdef CONFIG_MMC_DEBUG
86 
87 #define STATUS_TO_TEXT(a, status, i) \
88 	do { \
89 		if (status & TMIO_STAT_##a) { \
90 			if (i++) \
91 				printk(" | "); \
92 			printk(#a); \
93 		} \
94 	} while (0)
95 
pr_debug_status(u32 status)96 static void pr_debug_status(u32 status)
97 {
98 	int i = 0;
99 	pr_debug("status: %08x = ", status);
100 	STATUS_TO_TEXT(CARD_REMOVE, status, i);
101 	STATUS_TO_TEXT(CARD_INSERT, status, i);
102 	STATUS_TO_TEXT(SIGSTATE, status, i);
103 	STATUS_TO_TEXT(WRPROTECT, status, i);
104 	STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
105 	STATUS_TO_TEXT(CARD_INSERT_A, status, i);
106 	STATUS_TO_TEXT(SIGSTATE_A, status, i);
107 	STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
108 	STATUS_TO_TEXT(STOPBIT_ERR, status, i);
109 	STATUS_TO_TEXT(ILL_FUNC, status, i);
110 	STATUS_TO_TEXT(CMD_BUSY, status, i);
111 	STATUS_TO_TEXT(CMDRESPEND, status, i);
112 	STATUS_TO_TEXT(DATAEND, status, i);
113 	STATUS_TO_TEXT(CRCFAIL, status, i);
114 	STATUS_TO_TEXT(DATATIMEOUT, status, i);
115 	STATUS_TO_TEXT(CMDTIMEOUT, status, i);
116 	STATUS_TO_TEXT(RXOVERFLOW, status, i);
117 	STATUS_TO_TEXT(TXUNDERRUN, status, i);
118 	STATUS_TO_TEXT(RXRDY, status, i);
119 	STATUS_TO_TEXT(TXRQ, status, i);
120 	STATUS_TO_TEXT(ILL_ACCESS, status, i);
121 	printk("\n");
122 }
123 
124 #else
125 #define pr_debug_status(s)  do { } while (0)
126 #endif
127 
tmio_mmc_enable_sdio_irq(struct mmc_host * mmc,int enable)128 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
129 {
130 	struct tmio_mmc_host *host = mmc_priv(mmc);
131 
132 	if (enable) {
133 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
134 					~TMIO_SDIO_STAT_IOIRQ;
135 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
136 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
137 	} else {
138 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
139 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
140 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
141 	}
142 }
143 
tmio_mmc_set_clock(struct tmio_mmc_host * host,int new_clock)144 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
145 {
146 	u32 clk = 0, clock;
147 
148 	if (new_clock) {
149 		for (clock = host->mmc->f_min, clk = 0x80000080;
150 			new_clock >= (clock<<1); clk >>= 1)
151 			clock <<= 1;
152 		clk |= 0x100;
153 	}
154 
155 	if (host->set_clk_div)
156 		host->set_clk_div(host->pdev, (clk>>22) & 1);
157 
158 	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
159 	msleep(10);
160 }
161 
tmio_mmc_clk_stop(struct tmio_mmc_host * host)162 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
163 {
164 	struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
165 
166 	/* implicit BUG_ON(!res) */
167 	if (resource_size(res) > 0x100) {
168 		sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
169 		msleep(10);
170 	}
171 
172 	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
173 		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
174 	msleep(10);
175 }
176 
tmio_mmc_clk_start(struct tmio_mmc_host * host)177 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
178 {
179 	struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
180 
181 	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
182 		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
183 	msleep(10);
184 
185 	/* implicit BUG_ON(!res) */
186 	if (resource_size(res) > 0x100) {
187 		sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
188 		msleep(10);
189 	}
190 }
191 
tmio_mmc_reset(struct tmio_mmc_host * host)192 static void tmio_mmc_reset(struct tmio_mmc_host *host)
193 {
194 	struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
195 
196 	/* FIXME - should we set stop clock reg here */
197 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
198 	/* implicit BUG_ON(!res) */
199 	if (resource_size(res) > 0x100)
200 		sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
201 	msleep(10);
202 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
203 	if (resource_size(res) > 0x100)
204 		sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
205 	msleep(10);
206 }
207 
tmio_mmc_reset_work(struct work_struct * work)208 static void tmio_mmc_reset_work(struct work_struct *work)
209 {
210 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
211 						  delayed_reset_work.work);
212 	struct mmc_request *mrq;
213 	unsigned long flags;
214 
215 	spin_lock_irqsave(&host->lock, flags);
216 	mrq = host->mrq;
217 
218 	/*
219 	 * is request already finished? Since we use a non-blocking
220 	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
221 	 * us, so, have to check for IS_ERR(host->mrq)
222 	 */
223 	if (IS_ERR_OR_NULL(mrq)
224 	    || time_is_after_jiffies(host->last_req_ts +
225 		msecs_to_jiffies(2000))) {
226 		spin_unlock_irqrestore(&host->lock, flags);
227 		return;
228 	}
229 
230 	dev_warn(&host->pdev->dev,
231 		"timeout waiting for hardware interrupt (CMD%u)\n",
232 		mrq->cmd->opcode);
233 
234 	if (host->data)
235 		host->data->error = -ETIMEDOUT;
236 	else if (host->cmd)
237 		host->cmd->error = -ETIMEDOUT;
238 	else
239 		mrq->cmd->error = -ETIMEDOUT;
240 
241 	host->cmd = NULL;
242 	host->data = NULL;
243 	host->force_pio = false;
244 
245 	spin_unlock_irqrestore(&host->lock, flags);
246 
247 	tmio_mmc_reset(host);
248 
249 	/* Ready for new calls */
250 	host->mrq = NULL;
251 
252 	tmio_mmc_abort_dma(host);
253 	mmc_request_done(host->mmc, mrq);
254 }
255 
256 /* called with host->lock held, interrupts disabled */
tmio_mmc_finish_request(struct tmio_mmc_host * host)257 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
258 {
259 	struct mmc_request *mrq;
260 	unsigned long flags;
261 
262 	spin_lock_irqsave(&host->lock, flags);
263 
264 	mrq = host->mrq;
265 	if (IS_ERR_OR_NULL(mrq)) {
266 		spin_unlock_irqrestore(&host->lock, flags);
267 		return;
268 	}
269 
270 	host->cmd = NULL;
271 	host->data = NULL;
272 	host->force_pio = false;
273 
274 	cancel_delayed_work(&host->delayed_reset_work);
275 
276 	host->mrq = NULL;
277 	spin_unlock_irqrestore(&host->lock, flags);
278 
279 	if (mrq->cmd->error || (mrq->data && mrq->data->error))
280 		tmio_mmc_abort_dma(host);
281 
282 	mmc_request_done(host->mmc, mrq);
283 }
284 
tmio_mmc_done_work(struct work_struct * work)285 static void tmio_mmc_done_work(struct work_struct *work)
286 {
287 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
288 						  done);
289 	tmio_mmc_finish_request(host);
290 }
291 
292 /* These are the bitmasks the tmio chip requires to implement the MMC response
293  * types. Note that R1 and R6 are the same in this scheme. */
294 #define APP_CMD        0x0040
295 #define RESP_NONE      0x0300
296 #define RESP_R1        0x0400
297 #define RESP_R1B       0x0500
298 #define RESP_R2        0x0600
299 #define RESP_R3        0x0700
300 #define DATA_PRESENT   0x0800
301 #define TRANSFER_READ  0x1000
302 #define TRANSFER_MULTI 0x2000
303 #define SECURITY_CMD   0x4000
304 
tmio_mmc_start_command(struct tmio_mmc_host * host,struct mmc_command * cmd)305 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
306 {
307 	struct mmc_data *data = host->data;
308 	int c = cmd->opcode;
309 	u32 irq_mask = TMIO_MASK_CMD;
310 
311 	/* CMD12 is handled by hardware */
312 	if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
313 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
314 		return 0;
315 	}
316 
317 	switch (mmc_resp_type(cmd)) {
318 	case MMC_RSP_NONE: c |= RESP_NONE; break;
319 	case MMC_RSP_R1:   c |= RESP_R1;   break;
320 	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
321 	case MMC_RSP_R2:   c |= RESP_R2;   break;
322 	case MMC_RSP_R3:   c |= RESP_R3;   break;
323 	default:
324 		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
325 		return -EINVAL;
326 	}
327 
328 	host->cmd = cmd;
329 
330 /* FIXME - this seems to be ok commented out but the spec suggest this bit
331  *         should be set when issuing app commands.
332  *	if(cmd->flags & MMC_FLAG_ACMD)
333  *		c |= APP_CMD;
334  */
335 	if (data) {
336 		c |= DATA_PRESENT;
337 		if (data->blocks > 1) {
338 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
339 			c |= TRANSFER_MULTI;
340 		}
341 		if (data->flags & MMC_DATA_READ)
342 			c |= TRANSFER_READ;
343 	}
344 
345 	if (!host->native_hotplug)
346 		irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
347 	tmio_mmc_enable_mmc_irqs(host, irq_mask);
348 
349 	/* Fire off the command */
350 	sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
351 	sd_ctrl_write16(host, CTL_SD_CMD, c);
352 
353 	return 0;
354 }
355 
356 /*
357  * This chip always returns (at least?) as much data as you ask for.
358  * I'm unsure what happens if you ask for less than a block. This should be
359  * looked into to ensure that a funny length read doesn't hose the controller.
360  */
tmio_mmc_pio_irq(struct tmio_mmc_host * host)361 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
362 {
363 	struct mmc_data *data = host->data;
364 	void *sg_virt;
365 	unsigned short *buf;
366 	unsigned int count;
367 	unsigned long flags;
368 
369 	if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
370 		pr_err("PIO IRQ in DMA mode!\n");
371 		return;
372 	} else if (!data) {
373 		pr_debug("Spurious PIO IRQ\n");
374 		return;
375 	}
376 
377 	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
378 	buf = (unsigned short *)(sg_virt + host->sg_off);
379 
380 	count = host->sg_ptr->length - host->sg_off;
381 	if (count > data->blksz)
382 		count = data->blksz;
383 
384 	pr_debug("count: %08x offset: %08x flags %08x\n",
385 		 count, host->sg_off, data->flags);
386 
387 	/* Transfer the data */
388 	if (data->flags & MMC_DATA_READ)
389 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
390 	else
391 		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
392 
393 	host->sg_off += count;
394 
395 	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
396 
397 	if (host->sg_off == host->sg_ptr->length)
398 		tmio_mmc_next_sg(host);
399 
400 	return;
401 }
402 
tmio_mmc_check_bounce_buffer(struct tmio_mmc_host * host)403 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
404 {
405 	if (host->sg_ptr == &host->bounce_sg) {
406 		unsigned long flags;
407 		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
408 		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
409 		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
410 	}
411 }
412 
413 /* needs to be called with host->lock held */
tmio_mmc_do_data_irq(struct tmio_mmc_host * host)414 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
415 {
416 	struct mmc_data *data = host->data;
417 	struct mmc_command *stop;
418 
419 	host->data = NULL;
420 
421 	if (!data) {
422 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
423 		return;
424 	}
425 	stop = data->stop;
426 
427 	/* FIXME - return correct transfer count on errors */
428 	if (!data->error)
429 		data->bytes_xfered = data->blocks * data->blksz;
430 	else
431 		data->bytes_xfered = 0;
432 
433 	pr_debug("Completed data request\n");
434 
435 	/*
436 	 * FIXME: other drivers allow an optional stop command of any given type
437 	 *        which we dont do, as the chip can auto generate them.
438 	 *        Perhaps we can be smarter about when to use auto CMD12 and
439 	 *        only issue the auto request when we know this is the desired
440 	 *        stop command, allowing fallback to the stop command the
441 	 *        upper layers expect. For now, we do what works.
442 	 */
443 
444 	if (data->flags & MMC_DATA_READ) {
445 		if (host->chan_rx && !host->force_pio)
446 			tmio_mmc_check_bounce_buffer(host);
447 		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
448 			host->mrq);
449 	} else {
450 		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
451 			host->mrq);
452 	}
453 
454 	if (stop) {
455 		if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
456 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
457 		else
458 			BUG();
459 	}
460 
461 	schedule_work(&host->done);
462 }
463 
tmio_mmc_data_irq(struct tmio_mmc_host * host)464 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
465 {
466 	struct mmc_data *data;
467 	spin_lock(&host->lock);
468 	data = host->data;
469 
470 	if (!data)
471 		goto out;
472 
473 	if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
474 		/*
475 		 * Has all data been written out yet? Testing on SuperH showed,
476 		 * that in most cases the first interrupt comes already with the
477 		 * BUSY status bit clear, but on some operations, like mount or
478 		 * in the beginning of a write / sync / umount, there is one
479 		 * DATAEND interrupt with the BUSY bit set, in this cases
480 		 * waiting for one more interrupt fixes the problem.
481 		 */
482 		if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
483 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
484 			tasklet_schedule(&host->dma_complete);
485 		}
486 	} else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
487 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
488 		tasklet_schedule(&host->dma_complete);
489 	} else {
490 		tmio_mmc_do_data_irq(host);
491 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
492 	}
493 out:
494 	spin_unlock(&host->lock);
495 }
496 
tmio_mmc_cmd_irq(struct tmio_mmc_host * host,unsigned int stat)497 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
498 	unsigned int stat)
499 {
500 	struct mmc_command *cmd = host->cmd;
501 	int i, addr;
502 
503 	spin_lock(&host->lock);
504 
505 	if (!host->cmd) {
506 		pr_debug("Spurious CMD irq\n");
507 		goto out;
508 	}
509 
510 	host->cmd = NULL;
511 
512 	/* This controller is sicker than the PXA one. Not only do we need to
513 	 * drop the top 8 bits of the first response word, we also need to
514 	 * modify the order of the response for short response command types.
515 	 */
516 
517 	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
518 		cmd->resp[i] = sd_ctrl_read32(host, addr);
519 
520 	if (cmd->flags &  MMC_RSP_136) {
521 		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
522 		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
523 		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
524 		cmd->resp[3] <<= 8;
525 	} else if (cmd->flags & MMC_RSP_R3) {
526 		cmd->resp[0] = cmd->resp[3];
527 	}
528 
529 	if (stat & TMIO_STAT_CMDTIMEOUT)
530 		cmd->error = -ETIMEDOUT;
531 	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
532 		cmd->error = -EILSEQ;
533 
534 	/* If there is data to handle we enable data IRQs here, and
535 	 * we will ultimatley finish the request in the data_end handler.
536 	 * If theres no data or we encountered an error, finish now.
537 	 */
538 	if (host->data && !cmd->error) {
539 		if (host->data->flags & MMC_DATA_READ) {
540 			if (host->force_pio || !host->chan_rx)
541 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
542 			else
543 				tasklet_schedule(&host->dma_issue);
544 		} else {
545 			if (host->force_pio || !host->chan_tx)
546 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
547 			else
548 				tasklet_schedule(&host->dma_issue);
549 		}
550 	} else {
551 		schedule_work(&host->done);
552 	}
553 
554 out:
555 	spin_unlock(&host->lock);
556 }
557 
tmio_mmc_card_irq_status(struct tmio_mmc_host * host,int * ireg,int * status)558 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
559 				       int *ireg, int *status)
560 {
561 	*status = sd_ctrl_read32(host, CTL_STATUS);
562 	*ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
563 
564 	pr_debug_status(*status);
565 	pr_debug_status(*ireg);
566 }
567 
__tmio_mmc_card_detect_irq(struct tmio_mmc_host * host,int ireg,int status)568 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
569 				      int ireg, int status)
570 {
571 	struct mmc_host *mmc = host->mmc;
572 
573 	/* Card insert / remove attempts */
574 	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
575 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
576 			TMIO_STAT_CARD_REMOVE);
577 		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
578 		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
579 		    !work_pending(&mmc->detect.work))
580 			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
581 		return true;
582 	}
583 
584 	return false;
585 }
586 
tmio_mmc_card_detect_irq(int irq,void * devid)587 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
588 {
589 	unsigned int ireg, status;
590 	struct tmio_mmc_host *host = devid;
591 
592 	tmio_mmc_card_irq_status(host, &ireg, &status);
593 	__tmio_mmc_card_detect_irq(host, ireg, status);
594 
595 	return IRQ_HANDLED;
596 }
597 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
598 
__tmio_mmc_sdcard_irq(struct tmio_mmc_host * host,int ireg,int status)599 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
600 				 int ireg, int status)
601 {
602 	/* Command completion */
603 	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
604 		tmio_mmc_ack_mmc_irqs(host,
605 			     TMIO_STAT_CMDRESPEND |
606 			     TMIO_STAT_CMDTIMEOUT);
607 		tmio_mmc_cmd_irq(host, status);
608 		return true;
609 	}
610 
611 	/* Data transfer */
612 	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
613 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
614 		tmio_mmc_pio_irq(host);
615 		return true;
616 	}
617 
618 	/* Data transfer completion */
619 	if (ireg & TMIO_STAT_DATAEND) {
620 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
621 		tmio_mmc_data_irq(host);
622 		return true;
623 	}
624 
625 	return false;
626 }
627 
tmio_mmc_sdcard_irq(int irq,void * devid)628 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
629 {
630 	unsigned int ireg, status;
631 	struct tmio_mmc_host *host = devid;
632 
633 	tmio_mmc_card_irq_status(host, &ireg, &status);
634 	__tmio_mmc_sdcard_irq(host, ireg, status);
635 
636 	return IRQ_HANDLED;
637 }
638 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
639 
tmio_mmc_sdio_irq(int irq,void * devid)640 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
641 {
642 	struct tmio_mmc_host *host = devid;
643 	struct mmc_host *mmc = host->mmc;
644 	struct tmio_mmc_data *pdata = host->pdata;
645 	unsigned int ireg, status;
646 
647 	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
648 		return IRQ_HANDLED;
649 
650 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
651 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
652 
653 	sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
654 
655 	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
656 		mmc_signal_sdio_irq(mmc);
657 
658 	return IRQ_HANDLED;
659 }
660 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
661 
tmio_mmc_irq(int irq,void * devid)662 irqreturn_t tmio_mmc_irq(int irq, void *devid)
663 {
664 	struct tmio_mmc_host *host = devid;
665 	unsigned int ireg, status;
666 
667 	pr_debug("MMC IRQ begin\n");
668 
669 	tmio_mmc_card_irq_status(host, &ireg, &status);
670 	if (__tmio_mmc_card_detect_irq(host, ireg, status))
671 		return IRQ_HANDLED;
672 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
673 		return IRQ_HANDLED;
674 
675 	tmio_mmc_sdio_irq(irq, devid);
676 
677 	return IRQ_HANDLED;
678 }
679 EXPORT_SYMBOL(tmio_mmc_irq);
680 
tmio_mmc_start_data(struct tmio_mmc_host * host,struct mmc_data * data)681 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
682 	struct mmc_data *data)
683 {
684 	struct tmio_mmc_data *pdata = host->pdata;
685 
686 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
687 		 data->blksz, data->blocks);
688 
689 	/* Some hardware cannot perform 2 byte requests in 4 bit mode */
690 	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
691 		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
692 
693 		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
694 			pr_err("%s: %d byte block unsupported in 4 bit mode\n",
695 			       mmc_hostname(host->mmc), data->blksz);
696 			return -EINVAL;
697 		}
698 	}
699 
700 	tmio_mmc_init_sg(host, data);
701 	host->data = data;
702 
703 	/* Set transfer length / blocksize */
704 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
705 	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
706 
707 	tmio_mmc_start_dma(host, data);
708 
709 	return 0;
710 }
711 
712 /* Process requests from the MMC layer */
tmio_mmc_request(struct mmc_host * mmc,struct mmc_request * mrq)713 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
714 {
715 	struct tmio_mmc_host *host = mmc_priv(mmc);
716 	unsigned long flags;
717 	int ret;
718 
719 	spin_lock_irqsave(&host->lock, flags);
720 
721 	if (host->mrq) {
722 		pr_debug("request not null\n");
723 		if (IS_ERR(host->mrq)) {
724 			spin_unlock_irqrestore(&host->lock, flags);
725 			mrq->cmd->error = -EAGAIN;
726 			mmc_request_done(mmc, mrq);
727 			return;
728 		}
729 	}
730 
731 	host->last_req_ts = jiffies;
732 	wmb();
733 	host->mrq = mrq;
734 
735 	spin_unlock_irqrestore(&host->lock, flags);
736 
737 	if (mrq->data) {
738 		ret = tmio_mmc_start_data(host, mrq->data);
739 		if (ret)
740 			goto fail;
741 	}
742 
743 	ret = tmio_mmc_start_command(host, mrq->cmd);
744 	if (!ret) {
745 		schedule_delayed_work(&host->delayed_reset_work,
746 				      msecs_to_jiffies(2000));
747 		return;
748 	}
749 
750 fail:
751 	host->force_pio = false;
752 	host->mrq = NULL;
753 	mrq->cmd->error = ret;
754 	mmc_request_done(mmc, mrq);
755 }
756 
tmio_mmc_clk_update(struct mmc_host * mmc)757 static int tmio_mmc_clk_update(struct mmc_host *mmc)
758 {
759 	struct tmio_mmc_host *host = mmc_priv(mmc);
760 	struct tmio_mmc_data *pdata = host->pdata;
761 	int ret;
762 
763 	if (!pdata->clk_enable)
764 		return -ENOTSUPP;
765 
766 	ret = pdata->clk_enable(host->pdev, &mmc->f_max);
767 	if (!ret)
768 		mmc->f_min = mmc->f_max / 512;
769 
770 	return ret;
771 }
772 
tmio_mmc_power_on(struct tmio_mmc_host * host,unsigned short vdd)773 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
774 {
775 	struct mmc_host *mmc = host->mmc;
776 	int ret = 0;
777 
778 	/* .set_ios() is returning void, so, no chance to report an error */
779 
780 	if (host->set_pwr)
781 		host->set_pwr(host->pdev, 1);
782 
783 	if (!IS_ERR(mmc->supply.vmmc)) {
784 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
785 		/*
786 		 * Attention: empiric value. With a b43 WiFi SDIO card this
787 		 * delay proved necessary for reliable card-insertion probing.
788 		 * 100us were not enough. Is this the same 140us delay, as in
789 		 * tmio_mmc_set_ios()?
790 		 */
791 		udelay(200);
792 	}
793 	/*
794 	 * It seems, VccQ should be switched on after Vcc, this is also what the
795 	 * omap_hsmmc.c driver does.
796 	 */
797 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
798 		regulator_enable(mmc->supply.vqmmc);
799 		udelay(200);
800 	}
801 }
802 
tmio_mmc_power_off(struct tmio_mmc_host * host)803 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
804 {
805 	struct mmc_host *mmc = host->mmc;
806 
807 	if (!IS_ERR(mmc->supply.vqmmc))
808 		regulator_disable(mmc->supply.vqmmc);
809 
810 	if (!IS_ERR(mmc->supply.vmmc))
811 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
812 
813 	if (host->set_pwr)
814 		host->set_pwr(host->pdev, 0);
815 }
816 
817 /* Set MMC clock / power.
818  * Note: This controller uses a simple divider scheme therefore it cannot
819  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
820  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
821  * slowest setting.
822  */
tmio_mmc_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)823 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
824 {
825 	struct tmio_mmc_host *host = mmc_priv(mmc);
826 	struct device *dev = &host->pdev->dev;
827 	unsigned long flags;
828 
829 	mutex_lock(&host->ios_lock);
830 
831 	spin_lock_irqsave(&host->lock, flags);
832 	if (host->mrq) {
833 		if (IS_ERR(host->mrq)) {
834 			dev_dbg(dev,
835 				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
836 				current->comm, task_pid_nr(current),
837 				ios->clock, ios->power_mode);
838 			host->mrq = ERR_PTR(-EINTR);
839 		} else {
840 			dev_dbg(dev,
841 				"%s.%d: CMD%u active since %lu, now %lu!\n",
842 				current->comm, task_pid_nr(current),
843 				host->mrq->cmd->opcode, host->last_req_ts, jiffies);
844 		}
845 		spin_unlock_irqrestore(&host->lock, flags);
846 
847 		mutex_unlock(&host->ios_lock);
848 		return;
849 	}
850 
851 	host->mrq = ERR_PTR(-EBUSY);
852 
853 	spin_unlock_irqrestore(&host->lock, flags);
854 
855 	/*
856 	 * host->power toggles between false and true in both cases - either
857 	 * or not the controller can be runtime-suspended during inactivity.
858 	 * But if the controller has to be kept on, the runtime-pm usage_count
859 	 * is kept positive, so no suspending actually takes place.
860 	 */
861 	if (ios->power_mode == MMC_POWER_ON && ios->clock) {
862 		if (!host->power) {
863 			tmio_mmc_clk_update(mmc);
864 			pm_runtime_get_sync(dev);
865 		}
866 		tmio_mmc_set_clock(host, ios->clock);
867 		if (!host->power) {
868 			/* power up SD card and the bus */
869 			tmio_mmc_power_on(host, ios->vdd);
870 			host->power = true;
871 		}
872 		/* start bus clock */
873 		tmio_mmc_clk_start(host);
874 	} else if (ios->power_mode != MMC_POWER_UP) {
875 		if (host->power) {
876 			struct tmio_mmc_data *pdata = host->pdata;
877 			if (ios->power_mode == MMC_POWER_OFF)
878 				tmio_mmc_power_off(host);
879 			tmio_mmc_clk_stop(host);
880 			host->power = false;
881 			pm_runtime_put(dev);
882 			if (pdata->clk_disable)
883 				pdata->clk_disable(host->pdev);
884 		}
885 	}
886 
887 	if (host->power) {
888 		switch (ios->bus_width) {
889 		case MMC_BUS_WIDTH_1:
890 			sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
891 		break;
892 		case MMC_BUS_WIDTH_4:
893 			sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
894 		break;
895 		}
896 	}
897 
898 	/* Let things settle. delay taken from winCE driver */
899 	udelay(140);
900 	if (PTR_ERR(host->mrq) == -EINTR)
901 		dev_dbg(&host->pdev->dev,
902 			"%s.%d: IOS interrupted: clk %u, mode %u",
903 			current->comm, task_pid_nr(current),
904 			ios->clock, ios->power_mode);
905 	host->mrq = NULL;
906 
907 	mutex_unlock(&host->ios_lock);
908 }
909 
tmio_mmc_get_ro(struct mmc_host * mmc)910 static int tmio_mmc_get_ro(struct mmc_host *mmc)
911 {
912 	struct tmio_mmc_host *host = mmc_priv(mmc);
913 	struct tmio_mmc_data *pdata = host->pdata;
914 	int ret = mmc_gpio_get_ro(mmc);
915 	if (ret >= 0)
916 		return ret;
917 
918 	return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
919 		 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
920 }
921 
tmio_mmc_get_cd(struct mmc_host * mmc)922 static int tmio_mmc_get_cd(struct mmc_host *mmc)
923 {
924 	struct tmio_mmc_host *host = mmc_priv(mmc);
925 	struct tmio_mmc_data *pdata = host->pdata;
926 	int ret = mmc_gpio_get_cd(mmc);
927 	if (ret >= 0)
928 		return ret;
929 
930 	if (!pdata->get_cd)
931 		return -ENOSYS;
932 	else
933 		return pdata->get_cd(host->pdev);
934 }
935 
936 static const struct mmc_host_ops tmio_mmc_ops = {
937 	.request	= tmio_mmc_request,
938 	.set_ios	= tmio_mmc_set_ios,
939 	.get_ro         = tmio_mmc_get_ro,
940 	.get_cd		= tmio_mmc_get_cd,
941 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
942 };
943 
tmio_mmc_init_ocr(struct tmio_mmc_host * host)944 static void tmio_mmc_init_ocr(struct tmio_mmc_host *host)
945 {
946 	struct tmio_mmc_data *pdata = host->pdata;
947 	struct mmc_host *mmc = host->mmc;
948 
949 	mmc_regulator_get_supply(mmc);
950 
951 	if (!mmc->ocr_avail)
952 		mmc->ocr_avail = pdata->ocr_mask ? : MMC_VDD_32_33 | MMC_VDD_33_34;
953 	else if (pdata->ocr_mask)
954 		dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n");
955 }
956 
tmio_mmc_of_parse(struct platform_device * pdev,struct tmio_mmc_data * pdata)957 static void tmio_mmc_of_parse(struct platform_device *pdev,
958 			      struct tmio_mmc_data *pdata)
959 {
960 	const struct device_node *np = pdev->dev.of_node;
961 	if (!np)
962 		return;
963 
964 	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
965 		pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
966 }
967 
tmio_mmc_host_probe(struct tmio_mmc_host ** host,struct platform_device * pdev,struct tmio_mmc_data * pdata)968 int tmio_mmc_host_probe(struct tmio_mmc_host **host,
969 				  struct platform_device *pdev,
970 				  struct tmio_mmc_data *pdata)
971 {
972 	struct tmio_mmc_host *_host;
973 	struct mmc_host *mmc;
974 	struct resource *res_ctl;
975 	int ret;
976 	u32 irq_mask = TMIO_MASK_CMD;
977 
978 	tmio_mmc_of_parse(pdev, pdata);
979 
980 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
981 		pdata->write16_hook = NULL;
982 
983 	res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
984 	if (!res_ctl)
985 		return -EINVAL;
986 
987 	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
988 	if (!mmc)
989 		return -ENOMEM;
990 
991 	mmc_of_parse(mmc);
992 
993 	pdata->dev = &pdev->dev;
994 	_host = mmc_priv(mmc);
995 	_host->pdata = pdata;
996 	_host->mmc = mmc;
997 	_host->pdev = pdev;
998 	platform_set_drvdata(pdev, mmc);
999 
1000 	_host->set_pwr = pdata->set_pwr;
1001 	_host->set_clk_div = pdata->set_clk_div;
1002 
1003 	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
1004 	_host->bus_shift = resource_size(res_ctl) >> 10;
1005 
1006 	_host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
1007 	if (!_host->ctl) {
1008 		ret = -ENOMEM;
1009 		goto host_free;
1010 	}
1011 
1012 	mmc->ops = &tmio_mmc_ops;
1013 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1014 	mmc->caps2 = pdata->capabilities2;
1015 	mmc->max_segs = 32;
1016 	mmc->max_blk_size = 512;
1017 	mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
1018 		mmc->max_segs;
1019 	mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1020 	mmc->max_seg_size = mmc->max_req_size;
1021 	tmio_mmc_init_ocr(_host);
1022 
1023 	_host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1024 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1025 				  mmc->caps & MMC_CAP_NONREMOVABLE ||
1026 				  mmc->slot.cd_irq >= 0);
1027 
1028 	_host->power = false;
1029 	pm_runtime_enable(&pdev->dev);
1030 	ret = pm_runtime_resume(&pdev->dev);
1031 	if (ret < 0)
1032 		goto pm_disable;
1033 
1034 	if (tmio_mmc_clk_update(mmc) < 0) {
1035 		mmc->f_max = pdata->hclk;
1036 		mmc->f_min = mmc->f_max / 512;
1037 	}
1038 
1039 	/*
1040 	 * There are 4 different scenarios for the card detection:
1041 	 *  1) an external gpio irq handles the cd (best for power savings)
1042 	 *  2) internal sdhi irq handles the cd
1043 	 *  3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
1044 	 *  4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
1045 	 *
1046 	 *  While we increment the runtime PM counter for all scenarios when
1047 	 *  the mmc core activates us by calling an appropriate set_ios(), we
1048 	 *  must additionally ensure that in case 2) the tmio mmc hardware stays
1049 	 *  powered on during runtime for the card detection to work.
1050 	 */
1051 	if (_host->native_hotplug)
1052 		pm_runtime_get_noresume(&pdev->dev);
1053 
1054 	tmio_mmc_clk_stop(_host);
1055 	tmio_mmc_reset(_host);
1056 
1057 	_host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
1058 	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1059 
1060 	/* Unmask the IRQs we want to know about */
1061 	if (!_host->chan_rx)
1062 		irq_mask |= TMIO_MASK_READOP;
1063 	if (!_host->chan_tx)
1064 		irq_mask |= TMIO_MASK_WRITEOP;
1065 	if (!_host->native_hotplug)
1066 		irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1067 
1068 	_host->sdcard_irq_mask &= ~irq_mask;
1069 
1070 	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1071 		tmio_mmc_enable_sdio_irq(mmc, 0);
1072 
1073 	spin_lock_init(&_host->lock);
1074 	mutex_init(&_host->ios_lock);
1075 
1076 	/* Init delayed work for request timeouts */
1077 	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1078 	INIT_WORK(&_host->done, tmio_mmc_done_work);
1079 
1080 	/* See if we also get DMA */
1081 	tmio_mmc_request_dma(_host, pdata);
1082 
1083 	ret = mmc_add_host(mmc);
1084 	if (pdata->clk_disable)
1085 		pdata->clk_disable(pdev);
1086 	if (ret < 0) {
1087 		tmio_mmc_host_remove(_host);
1088 		return ret;
1089 	}
1090 
1091 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1092 
1093 	if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1094 		ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio);
1095 		if (ret < 0) {
1096 			tmio_mmc_host_remove(_host);
1097 			return ret;
1098 		}
1099 	}
1100 
1101 	*host = _host;
1102 
1103 	return 0;
1104 
1105 pm_disable:
1106 	pm_runtime_disable(&pdev->dev);
1107 	iounmap(_host->ctl);
1108 host_free:
1109 	mmc_free_host(mmc);
1110 
1111 	return ret;
1112 }
1113 EXPORT_SYMBOL(tmio_mmc_host_probe);
1114 
tmio_mmc_host_remove(struct tmio_mmc_host * host)1115 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1116 {
1117 	struct platform_device *pdev = host->pdev;
1118 	struct mmc_host *mmc = host->mmc;
1119 
1120 	if (!host->native_hotplug)
1121 		pm_runtime_get_sync(&pdev->dev);
1122 
1123 	dev_pm_qos_hide_latency_limit(&pdev->dev);
1124 
1125 	mmc_remove_host(mmc);
1126 	cancel_work_sync(&host->done);
1127 	cancel_delayed_work_sync(&host->delayed_reset_work);
1128 	tmio_mmc_release_dma(host);
1129 
1130 	pm_runtime_put_sync(&pdev->dev);
1131 	pm_runtime_disable(&pdev->dev);
1132 
1133 	iounmap(host->ctl);
1134 	mmc_free_host(mmc);
1135 }
1136 EXPORT_SYMBOL(tmio_mmc_host_remove);
1137 
1138 #ifdef CONFIG_PM
tmio_mmc_host_suspend(struct device * dev)1139 int tmio_mmc_host_suspend(struct device *dev)
1140 {
1141 	struct mmc_host *mmc = dev_get_drvdata(dev);
1142 	struct tmio_mmc_host *host = mmc_priv(mmc);
1143 	int ret = mmc_suspend_host(mmc);
1144 
1145 	if (!ret)
1146 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1147 
1148 	return ret;
1149 }
1150 EXPORT_SYMBOL(tmio_mmc_host_suspend);
1151 
tmio_mmc_host_resume(struct device * dev)1152 int tmio_mmc_host_resume(struct device *dev)
1153 {
1154 	struct mmc_host *mmc = dev_get_drvdata(dev);
1155 	struct tmio_mmc_host *host = mmc_priv(mmc);
1156 
1157 	tmio_mmc_reset(host);
1158 	tmio_mmc_enable_dma(host, true);
1159 
1160 	/* The MMC core will perform the complete set up */
1161 	return mmc_resume_host(mmc);
1162 }
1163 EXPORT_SYMBOL(tmio_mmc_host_resume);
1164 
1165 #endif	/* CONFIG_PM */
1166 
tmio_mmc_host_runtime_suspend(struct device * dev)1167 int tmio_mmc_host_runtime_suspend(struct device *dev)
1168 {
1169 	return 0;
1170 }
1171 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1172 
tmio_mmc_host_runtime_resume(struct device * dev)1173 int tmio_mmc_host_runtime_resume(struct device *dev)
1174 {
1175 	struct mmc_host *mmc = dev_get_drvdata(dev);
1176 	struct tmio_mmc_host *host = mmc_priv(mmc);
1177 
1178 	tmio_mmc_reset(host);
1179 	tmio_mmc_enable_dma(host, true);
1180 
1181 	return 0;
1182 }
1183 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1184 
1185 MODULE_LICENSE("GPL v2");
1186