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Searched defs:x2 (Results 1 – 23 of 23) sorted by relevance

/arch/x86/crypto/
Dserpent-avx-x86_64-asm_64.S68 #define S0_1(x0, x1, x2, x3, x4) \ argument
77 #define S0_2(x0, x1, x2, x3, x4) \ argument
87 #define S1_1(x0, x1, x2, x3, x4) \ argument
96 #define S1_2(x0, x1, x2, x3, x4) \ argument
107 #define S2_1(x0, x1, x2, x3, x4) \ argument
116 #define S2_2(x0, x1, x2, x3, x4) \ argument
126 #define S3_1(x0, x1, x2, x3, x4) \ argument
136 #define S3_2(x0, x1, x2, x3, x4) \ argument
147 #define S4_1(x0, x1, x2, x3, x4) \ argument
156 #define S4_2(x0, x1, x2, x3, x4) \ argument
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Dserpent-sse2-x86_64-asm_64.S56 #define S0_1(x0, x1, x2, x3, x4) \ argument
66 #define S0_2(x0, x1, x2, x3, x4) \ argument
76 #define S1_1(x0, x1, x2, x3, x4) \ argument
86 #define S1_2(x0, x1, x2, x3, x4) \ argument
97 #define S2_1(x0, x1, x2, x3, x4) \ argument
107 #define S2_2(x0, x1, x2, x3, x4) \ argument
117 #define S3_1(x0, x1, x2, x3, x4) \ argument
128 #define S3_2(x0, x1, x2, x3, x4) \ argument
139 #define S4_1(x0, x1, x2, x3, x4) \ argument
149 #define S4_2(x0, x1, x2, x3, x4) \ argument
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Dserpent-avx2-asm_64.S60 #define S0_1(x0, x1, x2, x3, x4) \ argument
69 #define S0_2(x0, x1, x2, x3, x4) \ argument
79 #define S1_1(x0, x1, x2, x3, x4) \ argument
88 #define S1_2(x0, x1, x2, x3, x4) \ argument
99 #define S2_1(x0, x1, x2, x3, x4) \ argument
108 #define S2_2(x0, x1, x2, x3, x4) \ argument
118 #define S3_1(x0, x1, x2, x3, x4) \ argument
128 #define S3_2(x0, x1, x2, x3, x4) \ argument
139 #define S4_1(x0, x1, x2, x3, x4) \ argument
148 #define S4_2(x0, x1, x2, x3, x4) \ argument
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Dserpent-sse2-i586-asm_32.S57 #define K(x0, x1, x2, x3, x4, i) \ argument
67 #define LK(x0, x1, x2, x3, x4, i) \ argument
113 #define KL(x0, x1, x2, x3, x4, i) \ argument
152 #define S0(x0, x1, x2, x3, x4) \ argument
171 #define S1(x0, x1, x2, x3, x4) \ argument
191 #define S2(x0, x1, x2, x3, x4) \ argument
210 #define S3(x0, x1, x2, x3, x4) \ argument
231 #define S4(x0, x1, x2, x3, x4) \ argument
250 #define S5(x0, x1, x2, x3, x4) \ argument
269 #define S6(x0, x1, x2, x3, x4) \ argument
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Dglue_helper-asm-avx.S18 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
28 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
38 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
54 #define load_ctr_8way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2) \ argument
82 #define store_ctr_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
100 #define load_xts_8way(iv, src, dst, x0, x1, x2, x3, x4, x5, x6, x7, tiv, t0, \ argument
141 #define store_xts_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
Dglue_helper-asm-avx2.S13 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
23 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
33 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument
60 #define load_ctr_16way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t0x, t1, \ argument
93 #define store_ctr_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
123 #define load_xts_16way(iv, src, dst, x0, x1, x2, x3, x4, x5, x6, x7, tiv, \ argument
171 #define store_xts_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
Dcamellia-aesni-avx-asm_64.S49 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
211 #define two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
230 #define dummy_store(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab) /* do nothing */ argument
232 #define store_ab_state(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab) \ argument
243 #define enc_rounds16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
252 #define dec_rounds16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
418 #define transpose_4x4(x0, x1, x2, x3, t1, t2) \ argument
481 #define inpack16_pre(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
504 #define inpack16_post(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
527 #define outunpack16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, \ argument
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Dcamellia-aesni-avx2-asm_64.S76 #define roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
232 #define two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
251 #define dummy_store(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab) /* do nothing */ argument
253 #define store_ab_state(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab) \ argument
264 #define enc_rounds32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
273 #define dec_rounds32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
439 #define transpose_4x4(x0, x1, x2, x3, t1, t2) \ argument
502 #define inpack32_pre(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
525 #define inpack32_post(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
548 #define outunpack32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, \ argument
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Dtwofish-avx-x86_64-asm_64.S132 #define round_head_2(a, b, x1, y1, x2, y2) \ argument
221 #define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \ argument
232 #define inpack_blocks(x0, x1, x2, x3, wkey, t0, t1, t2) \ argument
240 #define outunpack_blocks(x0, x1, x2, x3, wkey, t0, t1, t2) \ argument
Dcast6-avx-x86_64-asm_64.S200 #define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \ argument
211 #define inpack_blocks(x0, x1, x2, x3, t0, t1, t2, rmask) \ argument
219 #define outunpack_blocks(x0, x1, x2, x3, t0, t1, t2, rmask) \ argument
Dtwofish-avx2-asm_64.S294 #define transpose_4x4(x0,x1,x2,x3,t1,t2) \ argument
/arch/sparc/lib/
DNG2memcpy.S82 #define FREG_FROB(x0, x1, x2, x3, x4, x5, x6, x7, x8) \ argument
97 #define FREG_MOVE_3(x0, x1, x2) \ argument
101 #define FREG_MOVE_4(x0, x1, x2, x3) \ argument
106 #define FREG_MOVE_5(x0, x1, x2, x3, x4) \ argument
112 #define FREG_MOVE_6(x0, x1, x2, x3, x4, x5) \ argument
119 #define FREG_MOVE_7(x0, x1, x2, x3, x4, x5, x6) \ argument
127 #define FREG_MOVE_8(x0, x1, x2, x3, x4, x5, x6, x7) \ argument
141 #define FREG_LOAD_3(base, x0, x1, x2) \ argument
145 #define FREG_LOAD_4(base, x0, x1, x2, x3) \ argument
150 #define FREG_LOAD_5(base, x0, x1, x2, x3, x4) \ argument
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/arch/sparc/include/asm/
Dsfp-machine_32.h78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
158 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
160 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y… argument
162 #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ argument
/arch/x86/math-emu/
Dpoly.h73 static inline void add_Xsig_Xsig(Xsig *dest, const Xsig *x2) in add_Xsig_Xsig()
87 static inline void add_two_Xsig(Xsig *dest, const Xsig *x2, long int *exp) in add_two_Xsig()
/arch/s390/include/asm/
Dsfp-machine.h75 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \ argument
101 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \ argument
127 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
/arch/arm/mach-at91/
Dat91rm9200_time.c48 unsigned long x1, x2; in read_CRTR() local
/arch/x86/kernel/
Dmmconf-fam10h_64.c34 static int __cpuinit cmp_range(const void *x1, const void *x2) in cmp_range()
/arch/ia64/include/asm/
Dkprobes.h48 unsigned long long x2 : 2; member
/arch/alpha/include/asm/
Dbitops.h303 unsigned long sum, x1, x2, x4; in ffz_b() local
/arch/blackfin/mach-bf527/include/mach/
DdefBF527.h252 #define SET_WF_OFFS(x0,x1,x2,x3) (SET_WF0_OFF((x0))|SET_WF1_OFF((x1))|SET_WF2_OFF((x2))|SET_WF3_OFF… argument
/arch/blackfin/mach-bf537/include/mach/
DdefBF537.h245 #define SET_WF_OFFS(x0,x1,x2,x3) (SET_WF0_OFF((x0))|SET_WF1_OFF((x1))|SET_WF2_OFF((x2))|SET_WF3_OF… argument
/arch/blackfin/mach-bf518/include/mach/
DdefBF516.h253 #define SET_WF_OFFS(x0,x1,x2,x3) (SET_WF0_OFF((x0))|SET_WF1_OFF((x1))|SET_WF2_OFF((x2))|SET_WF3_OFF… argument
/arch/ia64/kvm/
Dvcpu.h105 struct { unsigned long qp:6, :7, imm:7, ar3:7, x4:4, x2:2, member
137 struct { unsigned long qp:6, imm20a:20, :1, x4:4, x2:2, x3:3, member