1AMD64 specific boot options 2 3There are many others (usually documented in driver documentation), but 4only the AMD64 specific ones are listed here. 5 6Machine check 7 8 Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables. 9 10 mce=off 11 Disable machine check 12 mce=no_cmci 13 Disable CMCI(Corrected Machine Check Interrupt) that 14 Intel processor supports. Usually this disablement is 15 not recommended, but it might be handy if your hardware 16 is misbehaving. 17 Note that you'll get more problems without CMCI than with 18 due to the shared banks, i.e. you might get duplicated 19 error logs. 20 mce=dont_log_ce 21 Don't make logs for corrected errors. All events reported 22 as corrected are silently cleared by OS. 23 This option will be useful if you have no interest in any 24 of corrected errors. 25 mce=ignore_ce 26 Disable features for corrected errors, e.g. polling timer 27 and CMCI. All events reported as corrected are not cleared 28 by OS and remained in its error banks. 29 Usually this disablement is not recommended, however if 30 there is an agent checking/clearing corrected errors 31 (e.g. BIOS or hardware monitoring applications), conflicting 32 with OS's error handling, and you cannot deactivate the agent, 33 then this option will be a help. 34 mce=bootlog 35 Enable logging of machine checks left over from booting. 36 Disabled by default on AMD because some BIOS leave bogus ones. 37 If your BIOS doesn't do that it's a good idea to enable though 38 to make sure you log even machine check events that result 39 in a reboot. On Intel systems it is enabled by default. 40 mce=nobootlog 41 Disable boot machine check logging. 42 mce=tolerancelevel[,monarchtimeout] (number,number) 43 tolerance levels: 44 0: always panic on uncorrected errors, log corrected errors 45 1: panic or SIGBUS on uncorrected errors, log corrected errors 46 2: SIGBUS or log uncorrected errors, log corrected errors 47 3: never panic or SIGBUS, log all errors (for testing only) 48 Default is 1 49 Can be also set using sysfs which is preferable. 50 monarchtimeout: 51 Sets the time in us to wait for other CPUs on machine checks. 0 52 to disable. 53 mce=bios_cmci_threshold 54 Don't overwrite the bios-set CMCI threshold. This boot option 55 prevents Linux from overwriting the CMCI threshold set by the 56 bios. Without this option, Linux always sets the CMCI 57 threshold to 1. Enabling this may make memory predictive failure 58 analysis less effective if the bios sets thresholds for memory 59 errors since we will not see details for all errors. 60 61 nomce (for compatibility with i386): same as mce=off 62 63 Everything else is in sysfs now. 64 65APICs 66 67 apic Use IO-APIC. Default 68 69 noapic Don't use the IO-APIC. 70 71 disableapic Don't use the local APIC 72 73 nolapic Don't use the local APIC (alias for i386 compatibility) 74 75 pirq=... See Documentation/x86/i386/IO-APIC.txt 76 77 noapictimer Don't set up the APIC timer 78 79 no_timer_check Don't check the IO-APIC timer. This can work around 80 problems with incorrect timer initialization on some boards. 81 82 apicmaintimer Run time keeping from the local APIC timer instead 83 of using the PIT/HPET interrupt for this. This is useful 84 when the PIT/HPET interrupts are unreliable. 85 86 noapicmaintimer Don't do time keeping using the APIC timer. 87 Useful when this option was auto selected, but doesn't work. 88 89 apicpmtimer 90 Do APIC timer calibration using the pmtimer. Implies 91 apicmaintimer. Useful when your PIT timer is totally 92 broken. 93 94Timing 95 96 notsc 97 Don't use the CPU time stamp counter to read the wall time. 98 This can be used to work around timing problems on multiprocessor systems 99 with not properly synchronized CPUs. 100 101 nohpet 102 Don't use the HPET timer. 103 104Idle loop 105 106 idle=poll 107 Don't do power saving in the idle loop using HLT, but poll for rescheduling 108 event. This will make the CPUs eat a lot more power, but may be useful 109 to get slightly better performance in multiprocessor benchmarks. It also 110 makes some profiling using performance counters more accurate. 111 Please note that on systems with MONITOR/MWAIT support (like Intel EM64T 112 CPUs) this option has no performance advantage over the normal idle loop. 113 It may also interact badly with hyperthreading. 114 115Rebooting 116 117 reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old] 118 bios Use the CPU reboot vector for warm reset 119 warm Don't set the cold reboot flag 120 cold Set the cold reboot flag 121 triple Force a triple fault (init) 122 kbd Use the keyboard controller. cold reset (default) 123 acpi Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the 124 ACPI reset does not work, the reboot path attempts the reset using 125 the keyboard controller. 126 efi Use efi reset_system runtime service. If EFI is not configured or the 127 EFI reset does not work, the reboot path attempts the reset using 128 the keyboard controller. 129 130 Using warm reset will be much faster especially on big memory 131 systems because the BIOS will not go through the memory check. 132 Disadvantage is that not all hardware will be completely reinitialized 133 on reboot so there may be boot problems on some systems. 134 135 reboot=force 136 137 Don't stop other CPUs on reboot. This can make reboot more reliable 138 in some cases. 139 140Non Executable Mappings 141 142 noexec=on|off 143 144 on Enable(default) 145 off Disable 146 147SMP 148 149 additional_cpus=NUM Allow NUM more CPUs for hotplug 150 (defaults are specified by the BIOS, see Documentation/x86/x86_64/cpu-hotplug-spec) 151 152NUMA 153 154 numa=off Only set up a single NUMA node spanning all memory. 155 156 numa=noacpi Don't parse the SRAT table for NUMA setup 157 158 numa=fake=<size>[MG] 159 If given as a memory unit, fills all system RAM with nodes of 160 size interleaved over physical nodes. 161 162 numa=fake=<N> 163 If given as an integer, fills all system RAM with N fake nodes 164 interleaved over physical nodes. 165 166ACPI 167 168 acpi=off Don't enable ACPI 169 acpi=ht Use ACPI boot table parsing, but don't enable ACPI 170 interpreter 171 acpi=force Force ACPI on (currently not needed) 172 173 acpi=strict Disable out of spec ACPI workarounds. 174 175 acpi_sci={edge,level,high,low} Set up ACPI SCI interrupt. 176 177 acpi=noirq Don't route interrupts 178 179PCI 180 181 pci=off Don't use PCI 182 pci=conf1 Use conf1 access. 183 pci=conf2 Use conf2 access. 184 pci=rom Assign ROMs. 185 pci=assign-busses Assign busses 186 pci=irqmask=MASK Set PCI interrupt mask to MASK 187 pci=lastbus=NUMBER Scan up to NUMBER busses, no matter what the mptable says. 188 pci=noacpi Don't use ACPI to set up PCI interrupt routing. 189 190IOMMU (input/output memory management unit) 191 192 Currently four x86-64 PCI-DMA mapping implementations exist: 193 194 1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all 195 (e.g. because you have < 3 GB memory). 196 Kernel boot message: "PCI-DMA: Disabling IOMMU" 197 198 2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU. 199 Kernel boot message: "PCI-DMA: using GART IOMMU" 200 201 3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used 202 e.g. if there is no hardware IOMMU in the system and it is need because 203 you have >3GB memory or told the kernel to us it (iommu=soft)) 204 Kernel boot message: "PCI-DMA: Using software bounce buffering 205 for IO (SWIOTLB)" 206 207 4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM 208 pSeries and xSeries servers. This hardware IOMMU supports DMA address 209 mapping with memory protection, etc. 210 Kernel boot message: "PCI-DMA: Using Calgary IOMMU" 211 212 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>] 213 [,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge] 214 [,noaperture][,calgary] 215 216 General iommu options: 217 off Don't initialize and use any kind of IOMMU. 218 noforce Don't force hardware IOMMU usage when it is not needed. 219 (default). 220 force Force the use of the hardware IOMMU even when it is 221 not actually needed (e.g. because < 3 GB memory). 222 soft Use software bounce buffering (SWIOTLB) (default for 223 Intel machines). This can be used to prevent the usage 224 of an available hardware IOMMU. 225 226 iommu options only relevant to the AMD GART hardware IOMMU: 227 <size> Set the size of the remapping area in bytes. 228 allowed Overwrite iommu off workarounds for specific chipsets. 229 fullflush Flush IOMMU on each allocation (default). 230 nofullflush Don't use IOMMU fullflush. 231 leak Turn on simple iommu leak tracing (only when 232 CONFIG_IOMMU_LEAK is on). Default number of leak pages 233 is 20. 234 memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order. 235 (default: order=1, i.e. 64MB) 236 merge Do scatter-gather (SG) merging. Implies "force" 237 (experimental). 238 nomerge Don't do scatter-gather (SG) merging. 239 noaperture Ask the IOMMU not to touch the aperture for AGP. 240 forcesac Force single-address cycle (SAC) mode for masks <40bits 241 (experimental). 242 noagp Don't initialize the AGP driver and use full aperture. 243 allowdac Allow double-address cycle (DAC) mode, i.e. DMA >4GB. 244 DAC is used with 32-bit PCI to push a 64-bit address in 245 two cycles. When off all DMA over >4GB is forced through 246 an IOMMU or software bounce buffering. 247 nodac Forbid DAC mode, i.e. DMA >4GB. 248 panic Always panic when IOMMU overflows. 249 calgary Use the Calgary IOMMU if it is available 250 251 iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU 252 implementation: 253 swiotlb=<pages>[,force] 254 <pages> Prereserve that many 128K pages for the software IO 255 bounce buffering. 256 force Force all IO through the software TLB. 257 258 Settings for the IBM Calgary hardware IOMMU currently found in IBM 259 pSeries and xSeries machines: 260 261 calgary=[64k,128k,256k,512k,1M,2M,4M,8M] 262 calgary=[translate_empty_slots] 263 calgary=[disable=<PCI bus number>] 264 panic Always panic when IOMMU overflows 265 266 64k,...,8M - Set the size of each PCI slot's translation table 267 when using the Calgary IOMMU. This is the size of the translation 268 table itself in main memory. The smallest table, 64k, covers an IO 269 space of 32MB; the largest, 8MB table, can cover an IO space of 270 4GB. Normally the kernel will make the right choice by itself. 271 272 translate_empty_slots - Enable translation even on slots that have 273 no devices attached to them, in case a device will be hotplugged 274 in the future. 275 276 disable=<PCI bus number> - Disable translation on a given PHB. For 277 example, the built-in graphics adapter resides on the first bridge 278 (PCI bus number 0); if translation (isolation) is enabled on this 279 bridge, X servers that access the hardware directly from user 280 space might stop working. Use this option if you have devices that 281 are accessed from userspace directly on some PCI host bridge. 282 283Debugging 284 285 kstack=N Print N words from the kernel stack in oops dumps. 286 287 pagefaulttrace Dump all page faults. Only useful for extreme debugging 288 and will create a lot of output. 289 290 call_trace=[old|both|newfallback|new] 291 old: use old inexact backtracer 292 new: use new exact dwarf2 unwinder 293 both: print entries from both 294 newfallback: use new unwinder but fall back to old if it gets 295 stuck (default) 296 297Miscellaneous 298 299 nogbpages 300 Do not use GB pages for kernel direct mappings. 301 gbpages 302 Use GB pages for kernel direct mappings. 303