1/* 2 * B4420DS Device Tree Source 3 * 4 * Copyright 2012 Freescale Semiconductor, Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * This software is provided by Freescale Semiconductor "as is" and any 24 * express or implied warranties, including, but not limited to, the implied 25 * warranties of merchantability and fitness for a particular purpose are 26 * disclaimed. In no event shall Freescale Semiconductor be liable for any 27 * direct, indirect, incidental, special, exemplary, or consequential damages 28 * (including, but not limited to, procurement of substitute goods or services; 29 * loss of use, data, or profits; or business interruption) however caused and 30 * on any theory of liability, whether in contract, strict liability, or tort 31 * (including negligence or otherwise) arising in any way out of the use of 32 * this software, even if advised of the possibility of such damage. 33 */ 34 35/ { 36 model = "fsl,B4QDS"; 37 compatible = "fsl,B4QDS"; 38 #address-cells = <2>; 39 #size-cells = <2>; 40 interrupt-parent = <&mpic>; 41 42 ifc: localbus@ffe124000 { 43 reg = <0xf 0xfe124000 0 0x2000>; 44 ranges = <0 0 0xf 0xe8000000 0x08000000 45 2 0 0xf 0xff800000 0x00010000 46 3 0 0xf 0xffdf0000 0x00008000>; 47 48 nor@0,0 { 49 #address-cells = <1>; 50 #size-cells = <1>; 51 compatible = "cfi-flash"; 52 reg = <0x0 0x0 0x8000000>; 53 bank-width = <2>; 54 device-width = <1>; 55 }; 56 57 nand@2,0 { 58 #address-cells = <1>; 59 #size-cells = <1>; 60 compatible = "fsl,ifc-nand"; 61 reg = <0x2 0x0 0x10000>; 62 63 partition@0 { 64 /* This location must not be altered */ 65 /* 1MB for u-boot Bootloader Image */ 66 reg = <0x0 0x00100000>; 67 label = "NAND U-Boot Image"; 68 read-only; 69 }; 70 71 partition@100000 { 72 /* 1MB for DTB Image */ 73 reg = <0x00100000 0x00100000>; 74 label = "NAND DTB Image"; 75 }; 76 77 partition@200000 { 78 /* 10MB for Linux Kernel Image */ 79 reg = <0x00200000 0x00A00000>; 80 label = "NAND Linux Kernel Image"; 81 }; 82 83 partition@c00000 { 84 /* 500MB for Root file System Image */ 85 reg = <0x00c00000 0x1F400000>; 86 label = "NAND RFS Image"; 87 }; 88 }; 89 90 board-control@3,0 { 91 compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis"; 92 reg = <3 0 0x300>; 93 }; 94 }; 95 96 memory { 97 device_type = "memory"; 98 }; 99 100 dcsr: dcsr@f00000000 { 101 ranges = <0x00000000 0xf 0x00000000 0x01052000>; 102 }; 103 104 soc: soc@ffe000000 { 105 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 106 reg = <0xf 0xfe000000 0 0x00001000>; 107 spi@110000 { 108 flash@0 { 109 #address-cells = <1>; 110 #size-cells = <1>; 111 compatible = "sst,sst25wf040"; 112 reg = <0>; 113 spi-max-frequency = <40000000>; /* input clock */ 114 }; 115 }; 116 117 sdhc@114000 { 118 /*Disabled as there is no sdhc connector on B4420QDS board*/ 119 status = "disabled"; 120 }; 121 122 i2c@118000 { 123 eeprom@50 { 124 compatible = "at24,24c64"; 125 reg = <0x50>; 126 }; 127 eeprom@51 { 128 compatible = "at24,24c256"; 129 reg = <0x51>; 130 }; 131 eeprom@53 { 132 compatible = "at24,24c256"; 133 reg = <0x53>; 134 }; 135 eeprom@57 { 136 compatible = "at24,24c256"; 137 reg = <0x57>; 138 }; 139 rtc@68 { 140 compatible = "dallas,ds3232"; 141 reg = <0x68>; 142 }; 143 }; 144 145 usb@210000 { 146 dr_mode = "host"; 147 phy_type = "ulpi"; 148 }; 149 150 }; 151 152 pci0: pcie@ffe200000 { 153 reg = <0xf 0xfe200000 0 0x10000>; 154 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 155 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 156 pcie@0 { 157 ranges = <0x02000000 0 0xe0000000 158 0x02000000 0 0xe0000000 159 0 0x20000000 160 161 0x01000000 0 0x00000000 162 0x01000000 0 0x00000000 163 0 0x00010000>; 164 }; 165 }; 166 167}; 168 169/include/ "fsl/b4si-post.dtsi" 170