/arch/c6x/lib/ |
D | llshru.S | 28 cmplt .l1 0,A0,A2 29 [A2] shl .s1 A5,A0,A0 31 [!A2] neg .l1 A0,A4 32 || [A2] shru .s1 A4,A1,A4 33 [!A2] shru .s1 A5,A4,A4 34 || [A2] or .d1 A4,A0,A4 35 || [!A2] mvk .l1 0,A5 36 [A2] shru .s1 A5,A1,A5
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D | llshr.S | 28 cmplt .l1 0,A0,A2 29 [A2] shl .s1 A5,A0,A0 31 [!A2] neg .l1 A0,A4 32 || [A2] shru .s1 A4,A1,A4 33 [!A2] shr .s1 A5,A4,A4 34 || [A2] or .d1 A4,A0,A4 35 [!A2] shr .s1 A5,0x1f,A5 36 [A2] shr .s1 A5,A1,A5
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D | llshl.S | 28 cmplt .l1 0,A0,A2 29 [A2] shru .s1 A4,A0,A0 30 [!A2] neg .l1 A0,A5 31 || [A2] shl .s1 A5,A1,A5 32 [!A2] shl .s1 A4,A5,A5 33 || [A2] or .d1 A5,A0,A5 34 || [!A2] mvk .l1 0,A4 35 [A2] shl .s1 A4,A1,A4
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D | divu.S | 22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4 46 ;; placed in A2. 58 cmpltu .l1x A4, B4, A2 59 [!A2] sub .l1x A4, B4, A4 61 || xor .s1 1, A2, A2 63 shl .s1 A2, 31, A2 95 or .l1 A2, A4, A4
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D | divremu.S | 29 ;; placed in A2. 46 cmpltu .l1x A4, B4, A2 47 [!A2] sub .l1x A4, B4, A4 49 || xor .s1 1, A2, A2 51 shl .s1 A2, 31, A2 84 or .l1 A2, A4, A4
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D | csum_64plus.S | 67 || MVK .L1 1,A2 75 || MPYU .M1 A7,A2,A8 331 || MV .L1 A1,A2 336 ADD .L1 A2,A0,A2 339 || CMPGTU .L1 A1,A2,A0 341 ADD .L1 A0,A2,A6 372 EXTU .S1 A1,16,24,A2 377 [B0] OR .L1 A0,A2,A1
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D | negll.S | 26 subu .l1 A0,A4,A3:A2 30 mv .s1 A2,A4
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D | divi.S | 22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
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D | remi.S | 22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
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D | remu.S | 22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
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D | mpyll.S | 47 add .l1x A2,B0,A5
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/arch/mips/mm/ |
D | page.c | 45 #define A2 6 macro 275 pg_addiu(&buf, A2, A0, off); 277 uasm_i_ori(&buf, A2, A0, off); 299 uasm_il_bne(&buf, &r, A0, A2, label_clear_pref); 305 pg_addiu(&buf, A2, A0, pref_bias_clear_store); 316 uasm_il_bne(&buf, &r, A0, A2, 426 pg_addiu(&buf, A2, A0, off); 428 uasm_i_ori(&buf, A2, A0, off); 485 uasm_il_bne(&buf, &r, A2, A0, label_copy_pref_both); 491 pg_addiu(&buf, A2, A0, [all …]
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/arch/c6x/kernel/ |
D | entry.S | 90 || STDW .D1T1 A3:A2,*A15--[1] 154 LDDW .D1T1 *++A15[1],A3:A2 244 AND .D1 _TIF_SYSCALL_TRACE,A2,A0 253 AND .D1 _TIF_NEED_RESCHED,A2,A0 312 LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2 316 AND .D1 A1,A2,A0 356 LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2 361 ; A2 = thread_info flags 362 AND .D1 _TIF_SYSCALL_TRACE,A2,A2 363 [A2] BNOP .S1 tracesys_on,5
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/arch/m68k/fpsp040/ |
D | satan.S | 317 |--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U 319 |--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3)) 320 |--WHAT WE HAVE HERE IS MERELY A1 = A3, A2 = A1/A3, A3 = A2/A3. 322 |--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED 331 faddd ATANA2,%fp2 | ...A2+V*(A3+V) 333 fmulx %fp2,%fp1 | ...A1*U*V*(A2+V*(A3+V))
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D | slogn.S | 388 |--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS 389 |--[U + V*(A1+V*(A3+V*A5))] + [U*V*(A2+V*(A4+V*A6))] 403 faddd LOGA2,%fp1 | ...A2+V*(A4+V*A6) 406 fmulx %fp3,%fp1 | ...V*(A2+V*(A4+V*A6)) 410 fmulx %fp0,%fp1 | ...U*V*(A2+V*(A4+V*A6)) 413 faddx (%a0),%fp1 | ...LOG(F)+U*V*(A2+V*(A4+V*A6))
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D | setox.S | 128 | p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5)))) 131 | are single precision; A2 and A3 are double precision. 137 | p = [ R + R*S*(A2 + S*A4) ] + 513 |-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5)))) 515 |--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))] 528 faddd EXPA2,%fp3 | ...fp3 IS A2+S*A4 536 fmulx %fp1,%fp3 | ...fp3 IS S*(A2+S*A4) 539 fmulx %fp0,%fp3 | ...fp3 IS R*S*(A2+S*A4) 542 faddx %fp3,%fp0 | ...fp0 IS R+R*S*(A2+S*A4), 680 |-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*(A5 + R*A6))))) [all …]
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D | ssin.S | 47 | r + r*s*(A1+s*(A2+ ... + s*A7)), s = r*r. 233 |--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE 264 faddx SINA2,%fp2 | ...A2+T(A4+TA6) 268 fmulx %fp0,%fp2 | ...S(A2+T(A4+TA6)) 631 faddx SINA2,%fp1 | ...A2+S(A3+...) 634 fmulx %fp0,%fp1 | ...S(A2+...) 637 faddx SINA1,%fp1 | ...A1+S(A2+...) 700 faddx SINA2,%fp2 | ...A2+S(A3+...) 703 fmulx %fp0,%fp2 | ...S(A2+...) 706 faddx SINA1,%fp2 | ...A1+S(A2+...)
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D | binstr.S | 25 | A2. Beginning of the loop: 81 | A2. Copy d2:d3 to d4:d5. Start loop.
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D | stwotox.S | 62 | P = r + r*r*(A1+r*(A2+...+r*A5)).
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D | bindec.S | 18 | Saves and Modifies: D2-D7,A2,FP2 28 | A2. Set X = abs(input). 208 | A2. Set X = abs(input).
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D | decbin.S | 30 | A2. Convert the bcd mantissa to binary by successive
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/arch/mn10300/mm/ |
D | cache-inv-by-reg.S | 147 mov d0,a2 # A2 = start address
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/arch/arc/kernel/ |
D | troubleshoot.c | 194 STS_BIT(regs, AE), STS_BIT(regs, A2), STS_BIT(regs, A1), in show_regs()
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/arch/m68k/ifpsp060/src/ |
D | fplsp.S | 4939 # r + r*s*(A1+s*(A2+ ... + s*A7)), s = r*r. # 5076 #--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE 5109 fadd.x SINA2(%pc),%fp2 # A2+T(A4+TA6) 5113 fmul.x %fp0,%fp2 # S(A2+T(A4+TA6)) 6785 # p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5)))) # 6788 # and A5 are single precision; A2 and A3 are double # 6795 # p = [ R + R*S*(A2 + S*A4) ] + # 7152 #-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5)))) 7154 #--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))] 7166 fadd.d EEXPA2(%pc),%fp3 # fp3 IS A2+S*A4 [all …]
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/arch/mn10300/kernel/ |
D | entry.S | 63 GET_THREAD_INFO a2 # A2 must be set on return from sys_exit()
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