Searched refs:CHCTR (Results 1 – 11 of 11) sorted by relevance
/arch/mn10300/mm/ |
D | cache.inc | 16 # A0: Should hold CHCTR 17 # D0: Should have been read from CHCTR 77 # A0: Should hold CHCTR 78 # D0: Should have been read from CHCTR
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D | cache-dbg-flush-by-reg.S | 35 movhu (CHCTR),d0 76 mov CHCTR,a0
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D | cache-dbg-flush-by-tag.S | 36 movhu (CHCTR),d0 88 movhu (CHCTR),d1
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D | cache-dbg-inv.S | 38 mov CHCTR,a0
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D | cache-inv-by-reg.S | 60 mov CHCTR,a0 82 mov CHCTR,a0
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D | cache-flush-by-tag.S | 52 movhu (CHCTR),d0
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D | cache-flush-by-reg.S | 52 movhu (CHCTR),d0 112 movhu (CHCTR),d2 188 movhu (CHCTR),d0 245 movhu (CHCTR),d2
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D | cache-inv-by-tag.S | 68 mov CHCTR,a0 90 mov CHCTR,a0
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/arch/mn10300/kernel/ |
D | head.S | 99 mov CHCTR,a0 395 mov (CHCTR),d0
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D | smp.c | 1018 : "a"(&CHCTR), in hotplug_cpu_disable_cache() 1032 : "a"(&CHCTR), in hotplug_cpu_enable_cache() 1045 : "a"(&CHCTR), in hotplug_cpu_invalidate_cache()
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/arch/mn10300/include/asm/ |
D | cpu-regs.h | 172 #define CHCTR __SYSREG(0xc0000070, u16) /* cache control */ macro
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