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/arch/sh/kernel/cpu/sh4a/
Dclock-sh7734.c70 enum { DIV4_I, DIV4_S, DIV4_B, DIV4_M, DIV4_S1, DIV4_P, DIV4_NR }; enumerator
79 [DIV4_M] = DIV4(FRQMR1, 12, 0x0004, CLK_ENABLE_ON_INIT),
189 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_M]),