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Searched refs:DMA0_NEXT_DESC_PTR (Results 1 – 22 of 22) sorted by relevance

/arch/blackfin/mach-bf533/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf518/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf537/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf527/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf538/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf548/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf609/
Ddma.c15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h187 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ macro
DcdefBF532.h143 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
144 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR,val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h221 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ macro
DcdefBF522.h396 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
397 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h221 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ macro
DcdefBF512.h379 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
380 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h197 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register … macro
DcdefBF534.h358 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
359 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h198 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ macro
DcdefBF538.h486 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_readPTR(DMA0_NEXT_DESC_PTR)
487 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_writePTR(DMA0_NEXT_DESC_PTR, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h207 #define DMA0_NEXT_DESC_PTR 0xffc00c00 /* DMA Channel 0 Next Descriptor Pointer Reg… macro
DcdefBF54x_base.h309 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
310 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h1510 #define DMA0_NEXT_DESC_PTR 0xFFC41000 /* DMA0 Pointer to Next Initial Descriptor */ macro
DcdefBF60x_base.h327 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
328 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c821 # define DMA0_NEXT_DESC_PTR DMA2_0_NEXT_DESC_PTR in bfin_debug_mmrs_init() macro