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Searched refs:DMA13_IRQ_STATUS (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h517 #define DMA13_IRQ_STATUS 0xFFC01D68 /* DMA Channel 13 Interrupt/Status Register */ macro
DcdefBF538.h846 #define bfin_read_DMA13_IRQ_STATUS() bfin_read16(DMA13_IRQ_STATUS)
847 #define bfin_write_DMA13_IRQ_STATUS(val) bfin_write16(DMA13_IRQ_STATUS, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h722 #define DMA13_IRQ_STATUS 0xffc01c68 /* DMA Channel 13 Interrupt/Status Register … macro
DcdefBF54x_base.h1210 #define bfin_read_DMA13_IRQ_STATUS() bfin_read16(DMA13_IRQ_STATUS)
1211 #define bfin_write_DMA13_IRQ_STATUS(val) bfin_write16(DMA13_IRQ_STATUS, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h1793 #define DMA13_IRQ_STATUS 0xFFC07030 /* DMA13 Status Register */ macro
DcdefBF60x_base.h828 #define bfin_read_DMA13_IRQ_STATUS() bfin_read32(DMA13_IRQ_STATUS)
829 #define bfin_write_DMA13_IRQ_STATUS(val) bfin_write32(DMA13_IRQ_STATUS, val)