Searched refs:DMA_CH_VALID (Results 1 – 6 of 6) sorted by relevance
| /arch/arm/mach-s3c24xx/ |
| D | dma-s3c2440.c | 35 .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
39 .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
43 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
44 .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID,
45 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
46 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
50 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
54 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
58 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
62 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
[all …]
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| D | dma-s3c2410.c | 35 .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
39 .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
43 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
44 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
45 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
49 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
53 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
57 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
61 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
65 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
[all …]
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| D | dma-s3c2443.c | 33 [0] = (x) | DMA_CH_VALID, \
34 [1] = (x) | DMA_CH_VALID, \
35 [2] = (x) | DMA_CH_VALID, \
36 [3] = (x) | DMA_CH_VALID, \
37 [4] = (x) | DMA_CH_VALID, \
38 [5] = (x) | DMA_CH_VALID, \
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| D | dma-s3c2412.c | 32 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
138 chsel &= ~DMA_CH_VALID; in s3c2412_dma_direction()
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| D | dma.c | 1349 return (channel & DMA_CH_VALID); in is_channel_valid()
1387 tmp = ord->list[ch] & ~DMA_CH_VALID; in s3c2410_dma_map_channel()
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| /arch/arm/plat-samsung/include/plat/ |
| D | dma-s3c24xx.h | 18 #define DMA_CH_VALID (1<<31) macro
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