Searched refs:DMC0_TR1 (Results 1 – 2 of 2) sorted by relevance
2651 #define DMC0_TR1 0xFFC80048 /* DMC0 Timing Register 1 */ macro
305 #define bfin_read_DMC0_TR1() bfin_read32(DMC0_TR1)306 #define bfin_write_DMC0_TR1(val) bfin_write32(DMC0_TR1, val)