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Searched refs:EDMA_CTLR_CHAN (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-davinci/
Ddevices.c144 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
147 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
181 .start = EDMA_CTLR_CHAN(0, 30), /* rx */
184 .start = EDMA_CTLR_CHAN(0, 31), /* tx */
Ddevices-tnetv107x.c183 .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
187 .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
207 .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
211 .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
Ddevices-da8xx.c58 #define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
59 #define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
60 #define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
61 #define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
62 #define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
63 #define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
64 #define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
65 #define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
Ddma.c570 return EDMA_CTLR_CHAN(ctlr, i - num_slots + 1); in reserve_contiguous_slots()
685 edma_stop(EDMA_CTLR_CHAN(ctlr, channel)); in edma_alloc_channel()
690 setup_dma_interrupt(EDMA_CTLR_CHAN(ctlr, channel), in edma_alloc_channel()
695 return EDMA_CTLR_CHAN(ctlr, channel); in edma_alloc_channel()
772 return EDMA_CTLR_CHAN(ctlr, slot); in edma_alloc_slot()
997 edma_read_slot(EDMA_CTLR_CHAN(ctlr, slot), &temp); in edma_get_position()
/arch/arm/mach-davinci/include/mach/
Dedma.h187 #define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan)) macro