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Searched refs:EP93XX_SYSCON_I2SCLKDIV (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-ep93xx/
Dsoc.h173 #define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c) macro
Dclock.c119 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
127 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
135 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
Dcore.c747 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); in ep93xx_i2s_acquire()
750 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); in ep93xx_i2s_acquire()