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Searched refs:IE_SW0 (Results 1 – 4 of 4) sorted by relevance

/arch/mips/kernel/
Dsmp-bmips.c212 set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE); in bmips_smp_finish()
345 change_c0_status(IE_IRQ5 | IE_IRQ1 | IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV, in play_dead()
346 IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV); in play_dead()
/arch/mips/include/asm/sn/sn0/
Dip27.h51 #define SRB_SWTIMO IE_SW0 /* 0x0100 */
/arch/mips/lantiq/
Dirq.c441 mips_smp_c0_status_mask |= (IE_SW0 | IE_SW1); in icu_of_init()
448 set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ0 | IE_IRQ1 | in icu_of_init()
/arch/mips/include/asm/
Dmipsregs.h279 #define IE_SW0 (_ULCAST_(1) << 8) macro