Searched refs:IPI (Results 1 – 7 of 7) sorted by relevance
/arch/mn10300/kernel/ |
D | smp-low.S | 27 # IPI interrupt handler 54 # Cache flush IPI interrupt handler 75 # SMP boot CPU IPI interrupt handler
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D | entry.S | 310 bne nmi_not_debugger # if not kernel debugger NMI IPI, jump 312 # kernel debugger NMI IPI
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D | head.S | 52 # Set up the Boot IPI for each secondary CPU
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/arch/m32r/boot/ |
D | setup.S | 107 ldi r6, #0x2 ; IPI to CPU1 164 ;; enable only IPI
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/arch/sh/kernel/cpu/sh4a/ |
D | setup-sh7770.c | 505 HAC, IPI, SPDIF, HUDI, I2C, enumerator 531 INTC_VECT(HAC, 0x580), INTC_VECT(IPI, 0x5c0), 591 DMAC, I2C, HUDI, SPDIF, IPI, HAC, TMU, GPIO } }, 596 { 0xffe00004, 0, 32, 8, /* INT2PRI1 */ { IPI, SPDIF, HUDI, I2C } },
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/arch/m32r/kernel/ |
D | head.S | 221 ;; SLEEP and wait IPI
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/arch/arm/ |
D | Kconfig | 1368 which sends an IPI to the CPUs that are running the same ASID 1588 legacy IPI broadcast method. Local timers allows the system
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