Home
last modified time | relevance | path

Searched refs:L2CTL0_EADDR1 (Results 1 – 2 of 2) sorted by relevance

/arch/blackfin/mm/
Dsram-alloc.c201 bfin_read32(L2CTL0_ET1), bfin_read32(L2CTL0_EADDR1)); in l2_ecc_err()
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h2694 #define L2CTL0_EADDR1 0xFFCA308C /* L2CTL0 L2 AXI Error 1 Address Register */ macro