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Searched refs:MCFSIM_ICR_LEVEL4 (Results 1 – 3 of 3) sorted by relevance

/arch/m68k/include/asm/
Dmcfintc.h35 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */ macro
/arch/m68k/platform/coldfire/
Dm525x.c52 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m525x_qspi_init()
Dm5249.c79 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m5249_qspi_init()